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crypto: hisilicon/sec - enabling clock gating of the address prefetch module

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Change the value of clock gating register to 0x7fff to enable
clock gating of the address prefetch module. When the device is
idle, the clock is turned off to save power.

Signed-off-by: Weili Qian <qianweili@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
Weili Qian 2022-09-24 18:34:45 +08:00 committed by Herbert Xu
parent f57e292897
commit 94adb03fd5
1 changed files with 1 additions and 1 deletions
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2
drivers/crypto/hisilicon/sec2/sec_main.c
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@ -55,7 +55,7 @@
#define SEC_CONTROL_REG 0x301200
#define SEC_DYNAMIC_GATE_REG 0x30121c
#define SEC_CORE_AUTO_GATE 0x30212c
#define SEC_DYNAMIC_GATE_EN 0x7bff
#define SEC_DYNAMIC_GATE_EN 0x7fff
#define SEC_CORE_AUTO_GATE_EN GENMASK(3, 0)
#define SEC_CLK_GATE_ENABLE BIT(3)
#define SEC_CLK_GATE_DISABLE (~BIT(3))