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clk: multiplier: add explicit big endian support

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Add a clock specific flag to switch register accesses to big endian, to
allow runtime configuration of big endian multiplier clocks.

Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
Jonas Gorski 2019-04-18 13:12:07 +02:00 committed by Stephen Boyd
parent d1c8a501ec
commit 9427b71a85
2 changed files with 23 additions and 3 deletions
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22
drivers/clk/clk-multiplier.c
View File

@ -11,6 +11,22 @@
#include <linux/of.h> #include <linux/of.h>
#include <linux/slab.h> #include <linux/slab.h>
static inline u32 clk_mult_readl(struct clk_multiplier *mult)
{
if (mult->flags & CLK_MULTIPLIER_BIG_ENDIAN)
return ioread32be(mult->reg);
return clk_readl(mult->reg);
}
static inline void clk_mult_writel(struct clk_multiplier *mult, u32 val)
{
if (mult->flags & CLK_MULTIPLIER_BIG_ENDIAN)
iowrite32be(val, mult->reg);
else
clk_writel(val, mult->reg);
}
static unsigned long __get_mult(struct clk_multiplier *mult, static unsigned long __get_mult(struct clk_multiplier *mult,
unsigned long rate, unsigned long rate,
unsigned long parent_rate) unsigned long parent_rate)
@ -27,7 +43,7 @@ static unsigned long clk_multiplier_recalc_rate(struct clk_hw *hw,
struct clk_multiplier *mult = to_clk_multiplier(hw); struct clk_multiplier *mult = to_clk_multiplier(hw);
unsigned long val; unsigned long val;
val = clk_readl(mult->reg) >> mult->shift; val = clk_mult_readl(mult) >> mult->shift;
val &= GENMASK(mult->width - 1, 0); val &= GENMASK(mult->width - 1, 0);
if (!val && mult->flags & CLK_MULTIPLIER_ZERO_BYPASS) if (!val && mult->flags & CLK_MULTIPLIER_ZERO_BYPASS)
@ -118,10 +134,10 @@ static int clk_multiplier_set_rate(struct clk_hw *hw, unsigned long rate,
else else
__acquire(mult->lock); __acquire(mult->lock);
val = clk_readl(mult->reg); val = clk_mult_readl(mult);
val &= ~GENMASK(mult->width + mult->shift - 1, mult->shift); val &= ~GENMASK(mult->width + mult->shift - 1, mult->shift);
val |= factor << mult->shift; val |= factor << mult->shift;
clk_writel(val, mult->reg); clk_mult_writel(mult, val);
if (mult->lock) if (mult->lock)
spin_unlock_irqrestore(mult->lock, flags); spin_unlock_irqrestore(mult->lock, flags);

4
include/linux/clk-provider.h
View File

@ -666,6 +666,9 @@ void clk_hw_unregister_fractional_divider(struct clk_hw *hw);
* leaving the parent rate unmodified. * leaving the parent rate unmodified.
* CLK_MULTIPLIER_ROUND_CLOSEST - Makes the best calculated divider to be * CLK_MULTIPLIER_ROUND_CLOSEST - Makes the best calculated divider to be
* rounded to the closest integer instead of the down one. * rounded to the closest integer instead of the down one.
* CLK_MULTIPLIER_BIG_ENDIAN - By default little endian register accesses are
* used for the multiplier register. Setting this flag makes the register
* accesses big endian.
*/ */
struct clk_multiplier { struct clk_multiplier {
struct clk_hw hw; struct clk_hw hw;
@ -680,6 +683,7 @@ struct clk_multiplier {
#define CLK_MULTIPLIER_ZERO_BYPASS BIT(0) #define CLK_MULTIPLIER_ZERO_BYPASS BIT(0)
#define CLK_MULTIPLIER_ROUND_CLOSEST BIT(1) #define CLK_MULTIPLIER_ROUND_CLOSEST BIT(1)
#define CLK_MULTIPLIER_BIG_ENDIAN BIT(2)
extern const struct clk_ops clk_multiplier_ops; extern const struct clk_ops clk_multiplier_ops;