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ARM: shmobile: r8a7791 GPIO platform device support
Add GPIO controller platform devices for the r8a7791 SoC. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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@ -22,6 +22,7 @@
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#include <linux/irq.h>
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#include <linux/irq.h>
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#include <linux/kernel.h>
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#include <linux/kernel.h>
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#include <linux/of_platform.h>
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#include <linux/of_platform.h>
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#include <linux/platform_data/gpio-rcar.h>
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#include <linux/platform_data/irq-renesas-irqc.h>
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#include <linux/platform_data/irq-renesas-irqc.h>
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#include <linux/serial_sci.h>
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#include <linux/serial_sci.h>
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#include <linux/sh_timer.h>
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#include <linux/sh_timer.h>
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@ -39,9 +40,48 @@ static const struct resource pfc_resources[] __initconst = {
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platform_device_register_simple("pfc-r8a7791", -1, pfc_resources, \
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platform_device_register_simple("pfc-r8a7791", -1, pfc_resources, \
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ARRAY_SIZE(pfc_resources))
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ARRAY_SIZE(pfc_resources))
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#define R8A7791_GPIO(idx, base, nr) \
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static const struct resource r8a7791_gpio##idx##_resources[] __initconst = { \
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DEFINE_RES_MEM((base), 0x50), \
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DEFINE_RES_IRQ(gic_spi(4 + (idx))), \
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}; \
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\
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static const struct gpio_rcar_config \
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r8a7791_gpio##idx##_platform_data __initconst = { \
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.gpio_base = 32 * (idx), \
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.irq_base = 0, \
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.number_of_pins = (nr), \
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.pctl_name = "pfc-r8a7791", \
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.has_both_edge_trigger = 1, \
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}; \
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R8A7791_GPIO(0, 0xe6050000, 32);
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R8A7791_GPIO(1, 0xe6051000, 32);
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R8A7791_GPIO(2, 0xe6052000, 32);
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R8A7791_GPIO(3, 0xe6053000, 32);
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R8A7791_GPIO(4, 0xe6054000, 32);
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R8A7791_GPIO(5, 0xe6055000, 32);
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R8A7791_GPIO(6, 0xe6055400, 32);
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R8A7791_GPIO(7, 0xe6055800, 26);
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#define r8a7791_register_gpio(idx) \
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platform_device_register_resndata(&platform_bus, "gpio_rcar", idx, \
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r8a7791_gpio##idx##_resources, \
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ARRAY_SIZE(r8a7791_gpio##idx##_resources), \
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&r8a7791_gpio##idx##_platform_data, \
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sizeof(r8a7791_gpio##idx##_platform_data))
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void __init r8a7791_pinmux_init(void)
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void __init r8a7791_pinmux_init(void)
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{
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{
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r8a7791_register_pfc();
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r8a7791_register_pfc();
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r8a7791_register_gpio(0);
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r8a7791_register_gpio(1);
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r8a7791_register_gpio(2);
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r8a7791_register_gpio(3);
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r8a7791_register_gpio(4);
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r8a7791_register_gpio(5);
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r8a7791_register_gpio(6);
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r8a7791_register_gpio(7);
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}
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}
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#define SCIF_COMMON(scif_type, baseaddr, irq) \
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#define SCIF_COMMON(scif_type, baseaddr, irq) \
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