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powerpc/6xx: Store PGDIR physical address in a SPRG
Use SPRN_SPRG2 to store the current thread PGDIR and avoid reading thread_struct.pgdir at every TLB miss. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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@ -1167,6 +1167,7 @@
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#ifdef CONFIG_PPC_BOOK3S_32
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#define SPRN_SPRG_SCRATCH0 SPRN_SPRG0
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#define SPRN_SPRG_SCRATCH1 SPRN_SPRG1
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#define SPRN_SPRG_PGDIR SPRN_SPRG2
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#define SPRN_SPRG_603_LRU SPRN_SPRG4
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#endif
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@ -24,6 +24,10 @@ BEGIN_MMU_FTR_SECTION
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li r10,0
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mtspr SPRN_SPRG_603_LRU,r10 /* init SW LRU tracking */
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END_MMU_FTR_SECTION_IFSET(MMU_FTR_NEED_DTLB_SW_LRU)
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lis r10, (swapper_pg_dir - PAGE_OFFSET)@h
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ori r10, r10, (swapper_pg_dir - PAGE_OFFSET)@l
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mtspr SPRN_SPRG_PGDIR, r10
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BEGIN_FTR_SECTION
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bl __init_fpu_registers
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END_FTR_SECTION_IFCLR(CPU_FTR_FPU_UNAVAILABLE)
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@ -500,16 +500,15 @@ InstructionTLBMiss:
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mfspr r3,SPRN_IMISS
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lis r1,PAGE_OFFSET@h /* check if kernel address */
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cmplw 0,r1,r3
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mfspr r2,SPRN_SPRG_THREAD
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mfspr r2, SPRN_SPRG_PGDIR
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li r1,_PAGE_USER|_PAGE_PRESENT|_PAGE_EXEC /* low addresses tested as user */
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lwz r2,PGDIR(r2)
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bge- 112f
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mfspr r2,SPRN_SRR1 /* and MSR_PR bit from SRR1 */
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rlwimi r1,r2,32-12,29,29 /* shift MSR_PR to _PAGE_USER posn */
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lis r2,swapper_pg_dir@ha /* if kernel address, use */
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addi r2,r2,swapper_pg_dir@l /* kernel page table */
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112: tophys(r2,r2)
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rlwimi r2,r3,12,20,29 /* insert top 10 bits of address */
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tophys(r2,r2)
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112: rlwimi r2,r3,12,20,29 /* insert top 10 bits of address */
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lwz r2,0(r2) /* get pmd entry */
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rlwinm. r2,r2,0,0,19 /* extract address of pte page */
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beq- InstructionAddressInvalid /* return if no mapping */
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@ -574,16 +573,15 @@ DataLoadTLBMiss:
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mfspr r3,SPRN_DMISS
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lis r1,PAGE_OFFSET@h /* check if kernel address */
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cmplw 0,r1,r3
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mfspr r2,SPRN_SPRG_THREAD
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mfspr r2, SPRN_SPRG_PGDIR
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li r1,_PAGE_USER|_PAGE_PRESENT /* low addresses tested as user */
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lwz r2,PGDIR(r2)
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bge- 112f
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mfspr r2,SPRN_SRR1 /* and MSR_PR bit from SRR1 */
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rlwimi r1,r2,32-12,29,29 /* shift MSR_PR to _PAGE_USER posn */
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lis r2,swapper_pg_dir@ha /* if kernel address, use */
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addi r2,r2,swapper_pg_dir@l /* kernel page table */
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112: tophys(r2,r2)
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rlwimi r2,r3,12,20,29 /* insert top 10 bits of address */
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tophys(r2,r2)
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112: rlwimi r2,r3,12,20,29 /* insert top 10 bits of address */
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lwz r2,0(r2) /* get pmd entry */
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rlwinm. r2,r2,0,0,19 /* extract address of pte page */
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beq- DataAddressInvalid /* return if no mapping */
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@ -658,16 +656,15 @@ DataStoreTLBMiss:
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mfspr r3,SPRN_DMISS
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lis r1,PAGE_OFFSET@h /* check if kernel address */
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cmplw 0,r1,r3
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mfspr r2,SPRN_SPRG_THREAD
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mfspr r2, SPRN_SPRG_PGDIR
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li r1,_PAGE_RW|_PAGE_USER|_PAGE_PRESENT /* access flags */
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lwz r2,PGDIR(r2)
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bge- 112f
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mfspr r2,SPRN_SRR1 /* and MSR_PR bit from SRR1 */
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rlwimi r1,r2,32-12,29,29 /* shift MSR_PR to _PAGE_USER posn */
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lis r2,swapper_pg_dir@ha /* if kernel address, use */
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addi r2,r2,swapper_pg_dir@l /* kernel page table */
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112: tophys(r2,r2)
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rlwimi r2,r3,12,20,29 /* insert top 10 bits of address */
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tophys(r2,r2)
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112: rlwimi r2,r3,12,20,29 /* insert top 10 bits of address */
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lwz r2,0(r2) /* get pmd entry */
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rlwinm. r2,r2,0,0,19 /* extract address of pte page */
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beq- DataAddressInvalid /* return if no mapping */
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@ -1024,14 +1021,16 @@ _ENTRY(switch_mmu_context)
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li r0,NUM_USER_SEGMENTS
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mtctr r0
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lwz r4, MM_PGD(r4)
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#ifdef CONFIG_BDI_SWITCH
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/* Context switch the PTE pointer for the Abatron BDI2000.
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* The PGDIR is passed as second argument.
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*/
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lwz r4,MM_PGD(r4)
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lis r5, abatron_pteptrs@ha
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stw r4, abatron_pteptrs@l + 0x4(r5)
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#endif
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tophys(r4, r4)
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mtspr SPRN_SPRG_PGDIR, r4
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li r4,0
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isync
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3:
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@ -70,9 +70,8 @@ _GLOBAL(hash_page)
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/* Get PTE (linux-style) and check access */
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lis r0,KERNELBASE@h /* check if kernel address */
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cmplw 0,r4,r0
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mfspr r8,SPRN_SPRG_THREAD /* current task's THREAD (phys) */
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ori r3,r3,_PAGE_USER|_PAGE_PRESENT /* test low addresses as user */
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lwz r5,PGDIR(r8) /* virt page-table root */
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mfspr r5, SPRN_SPRG_PGDIR /* virt page-table root */
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blt+ 112f /* assume user more likely */
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lis r5,swapper_pg_dir@ha /* if kernel address, use */
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addi r5,r5,swapper_pg_dir@l /* kernel page table */
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