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gpio: 104-dio-48e: Add Counter/Timer support
The 104-DIO-48E features an 8254 Counter/Timer chip providing three counter/timers which can be used for frequency measurement, frequency output, pulse width modulation, pulse width measurement, event count, etc. The counter/timers use the same addresses as PPI 0 (addresses 0x0 to 0x3), so a raw_spinlock_t is used to synchronize operations between the two regmap mappings to prevent clobbering. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: William Breathitt Gray <william.gray@linaro.org> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
This commit is contained in:
William Breathitt Gray
Bartosz Golaszewski
parent
27d5a3cc21
commit
92f7a35836
@ -858,6 +858,7 @@ config GPIO_104_DIO_48E
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select REGMAP_IRQ
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select GPIOLIB_IRQCHIP
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select GPIO_I8255
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select I8254
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help
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Enables GPIO support for the ACCES 104-DIO-48E series (104-DIO-48E,
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104-DIO-24E). The base port addresses for the devices may be
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@ -9,6 +9,7 @@
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#include <linux/bits.h>
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/i8254.h>
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#include <linux/ioport.h>
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#include <linux/irq.h>
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#include <linux/isa.h>
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@ -16,6 +17,7 @@
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/regmap.h>
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#include <linux/spinlock.h>
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#include <linux/types.h>
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#include "gpio-i8255.h"
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@ -37,6 +39,8 @@ MODULE_PARM_DESC(irq, "ACCES 104-DIO-48E interrupt line numbers");
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#define DIO48E_ENABLE_INTERRUPT 0xB
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#define DIO48E_DISABLE_INTERRUPT DIO48E_ENABLE_INTERRUPT
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#define DIO48E_ENABLE_COUNTER_TIMER_ADDRESSING 0xD
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#define DIO48E_DISABLE_COUNTER_TIMER_ADDRESSING DIO48E_ENABLE_COUNTER_TIMER_ADDRESSING
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#define DIO48E_CLEAR_INTERRUPT 0xF
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#define DIO48E_NUM_PPI 2
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@ -75,18 +79,20 @@ static const struct regmap_access_table dio48e_precious_table = {
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.yes_ranges = dio48e_precious_ranges,
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.n_yes_ranges = ARRAY_SIZE(dio48e_precious_ranges),
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};
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static const struct regmap_config dio48e_regmap_config = {
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.reg_bits = 8,
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.reg_stride = 1,
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.val_bits = 8,
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.io_port = true,
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.max_register = 0xF,
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.wr_table = &dio48e_wr_table,
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.rd_table = &dio48e_rd_table,
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.volatile_table = &dio48e_volatile_table,
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.precious_table = &dio48e_precious_table,
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.cache_type = REGCACHE_FLAT,
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.use_raw_spinlock = true,
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static const struct regmap_range pit_wr_ranges[] = {
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regmap_reg_range(0x0, 0x3),
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};
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static const struct regmap_range pit_rd_ranges[] = {
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regmap_reg_range(0x0, 0x2),
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};
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static const struct regmap_access_table pit_wr_table = {
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.yes_ranges = pit_wr_ranges,
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.n_yes_ranges = ARRAY_SIZE(pit_wr_ranges),
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};
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static const struct regmap_access_table pit_rd_table = {
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.yes_ranges = pit_rd_ranges,
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.n_yes_ranges = ARRAY_SIZE(pit_rd_ranges),
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};
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/* only bit 3 on each respective Port C supports interrupts */
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@ -102,14 +108,56 @@ static const struct regmap_irq dio48e_regmap_irqs[] = {
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/**
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* struct dio48e_gpio - GPIO device private data structure
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* @lock: synchronization lock to prevent I/O race conditions
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* @map: Regmap for the device
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* @regs: virtual mapping for device registers
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* @flags: IRQ flags saved during locking
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* @irq_mask: Current IRQ mask state on the device
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*/
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struct dio48e_gpio {
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raw_spinlock_t lock;
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struct regmap *map;
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void __iomem *regs;
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unsigned long flags;
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unsigned int irq_mask;
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};
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static void dio48e_regmap_lock(void *lock_arg) __acquires(&dio48egpio->lock)
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{
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struct dio48e_gpio *const dio48egpio = lock_arg;
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unsigned long flags;
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raw_spin_lock_irqsave(&dio48egpio->lock, flags);
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dio48egpio->flags = flags;
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}
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static void dio48e_regmap_unlock(void *lock_arg) __releases(&dio48egpio->lock)
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{
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struct dio48e_gpio *const dio48egpio = lock_arg;
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raw_spin_unlock_irqrestore(&dio48egpio->lock, dio48egpio->flags);
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}
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static void pit_regmap_lock(void *lock_arg) __acquires(&dio48egpio->lock)
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{
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struct dio48e_gpio *const dio48egpio = lock_arg;
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unsigned long flags;
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raw_spin_lock_irqsave(&dio48egpio->lock, flags);
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dio48egpio->flags = flags;
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iowrite8(0x00, dio48egpio->regs + DIO48E_ENABLE_COUNTER_TIMER_ADDRESSING);
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}
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static void pit_regmap_unlock(void *lock_arg) __releases(&dio48egpio->lock)
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{
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struct dio48e_gpio *const dio48egpio = lock_arg;
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ioread8(dio48egpio->regs + DIO48E_DISABLE_COUNTER_TIMER_ADDRESSING);
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raw_spin_unlock_irqrestore(&dio48egpio->lock, dio48egpio->flags);
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}
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static int dio48e_handle_mask_sync(const int index,
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const unsigned int mask_buf_def,
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const unsigned int mask_buf,
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@ -176,6 +224,9 @@ static int dio48e_probe(struct device *dev, unsigned int id)
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struct i8255_regmap_config config = {};
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void __iomem *regs;
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struct regmap *map;
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struct regmap_config dio48e_regmap_config;
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struct regmap_config pit_regmap_config;
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struct i8254_regmap_config pit_config;
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int err;
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struct regmap_irq_chip *chip;
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struct dio48e_gpio *dio48egpio;
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@ -187,21 +238,58 @@ static int dio48e_probe(struct device *dev, unsigned int id)
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return -EBUSY;
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}
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dio48egpio = devm_kzalloc(dev, sizeof(*dio48egpio), GFP_KERNEL);
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if (!dio48egpio)
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return -ENOMEM;
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regs = devm_ioport_map(dev, base[id], DIO48E_EXTENT);
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if (!regs)
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return -ENOMEM;
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dio48egpio->regs = regs;
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raw_spin_lock_init(&dio48egpio->lock);
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dio48e_regmap_config = (struct regmap_config) {
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.reg_bits = 8,
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.reg_stride = 1,
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.val_bits = 8,
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.lock = dio48e_regmap_lock,
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.unlock = dio48e_regmap_unlock,
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.lock_arg = dio48egpio,
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.io_port = true,
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.wr_table = &dio48e_wr_table,
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.rd_table = &dio48e_rd_table,
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.volatile_table = &dio48e_volatile_table,
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.precious_table = &dio48e_precious_table,
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.cache_type = REGCACHE_FLAT,
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};
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map = devm_regmap_init_mmio(dev, regs, &dio48e_regmap_config);
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if (IS_ERR(map))
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return dev_err_probe(dev, PTR_ERR(map),
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"Unable to initialize register map\n");
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dio48egpio = devm_kzalloc(dev, sizeof(*dio48egpio), GFP_KERNEL);
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if (!dio48egpio)
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return -ENOMEM;
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dio48egpio->map = map;
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pit_regmap_config = (struct regmap_config) {
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.name = "i8254",
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.reg_bits = 8,
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.reg_stride = 1,
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.val_bits = 8,
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.lock = pit_regmap_lock,
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.unlock = pit_regmap_unlock,
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.lock_arg = dio48egpio,
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.io_port = true,
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.wr_table = &pit_wr_table,
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.rd_table = &pit_rd_table,
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};
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pit_config.map = devm_regmap_init_mmio(dev, regs, &pit_regmap_config);
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if (IS_ERR(pit_config.map))
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return dev_err_probe(dev, PTR_ERR(pit_config.map),
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"Unable to initialize i8254 register map\n");
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chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL);
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if (!chip)
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return -ENOMEM;
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@ -225,6 +313,12 @@ static int dio48e_probe(struct device *dev, unsigned int id)
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if (err)
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return dev_err_probe(dev, err, "IRQ registration failed\n");
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pit_config.parent = dev;
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err = devm_i8254_regmap_register(dev, &pit_config);
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if (err)
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return err;
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config.parent = dev;
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config.map = map;
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config.num_ppi = DIO48E_NUM_PPI;
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@ -245,3 +339,4 @@ module_isa_driver_with_irq(dio48e_driver, num_dio48e, num_irq);
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MODULE_AUTHOR("William Breathitt Gray <vilhelm.gray@gmail.com>");
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MODULE_DESCRIPTION("ACCES 104-DIO-48E GPIO driver");
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MODULE_LICENSE("GPL v2");
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MODULE_IMPORT_NS(I8254);
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