soc: mediatek: pm_domains: Make bus protection generic

Bus protection is not exclusively done by calling the infracfg misc driver.
Make the calls for setting and clearing the bus protection generic so
that we can use other blocks for it as well.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20201030113622.201188-6-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This commit is contained in:
Matthias Brugger 2020-10-30 12:36:11 +01:00 committed by Matthias Brugger
parent 916d6d71ba
commit 928296ea5d
4 changed files with 55 additions and 25 deletions

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@ -48,7 +48,6 @@ config MTK_SCPSYS_PM_DOMAINS
bool "MediaTek SCPSYS generic power domain" bool "MediaTek SCPSYS generic power domain"
default ARCH_MEDIATEK default ARCH_MEDIATEK
depends on PM depends on PM
depends on MTK_INFRACFG
select PM_GENERIC_DOMAINS select PM_GENERIC_DOMAINS
select REGMAP select REGMAP
help help

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@ -12,11 +12,6 @@
#define MTK_POLL_DELAY_US 10 #define MTK_POLL_DELAY_US 10
#define MTK_POLL_TIMEOUT (jiffies_to_usecs(HZ)) #define MTK_POLL_TIMEOUT (jiffies_to_usecs(HZ))
#define INFRA_TOPAXI_PROTECTEN 0x0220
#define INFRA_TOPAXI_PROTECTSTA1 0x0228
#define INFRA_TOPAXI_PROTECTEN_SET 0x0260
#define INFRA_TOPAXI_PROTECTEN_CLR 0x0264
/** /**
* mtk_infracfg_set_bus_protection - enable bus protection * mtk_infracfg_set_bus_protection - enable bus protection
* @infracfg: The infracfg regmap * @infracfg: The infracfg regmap

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@ -86,18 +86,59 @@ static int scpsys_sram_disable(struct scpsys_domain *pd)
MTK_POLL_TIMEOUT); MTK_POLL_TIMEOUT);
} }
static int scpsys_bus_protect_enable(struct scpsys_domain *pd) static int _scpsys_bus_protect_enable(const struct scpsys_bus_prot_data *bpd, struct regmap *regmap)
{ {
const struct scpsys_bus_prot_data *bpd = pd->data->bp_infracfg;
int i, ret; int i, ret;
for (i = 0; i < SPM_MAX_BUS_PROT_DATA; i++) { for (i = 0; i < SPM_MAX_BUS_PROT_DATA; i++) {
if (!bpd[i].bus_prot_mask) u32 val, mask = bpd[i].bus_prot_mask;
if (!mask)
break; break;
ret = mtk_infracfg_set_bus_protection(pd->infracfg, if (bpd[i].bus_prot_reg_update)
bpd[i].bus_prot_mask, regmap_set_bits(regmap, bpd[i].bus_prot_set, mask);
bpd[i].bus_prot_reg_update); else
regmap_write(regmap, INFRA_TOPAXI_PROTECTEN_SET, mask);
ret = regmap_read_poll_timeout(regmap, INFRA_TOPAXI_PROTECTSTA1,
val, (val & mask) == mask,
MTK_POLL_DELAY_US, MTK_POLL_TIMEOUT);
if (ret)
return ret;
}
return 0;
}
static int scpsys_bus_protect_enable(struct scpsys_domain *pd)
{
int ret;
ret = _scpsys_bus_protect_enable(pd->data->bp_infracfg, pd->infracfg);
return ret;
}
static int _scpsys_bus_protect_disable(const struct scpsys_bus_prot_data *bpd,
struct regmap *regmap)
{
int i, ret;
for (i = SPM_MAX_BUS_PROT_DATA - 1; i >= 0; i--) {
u32 val, mask = bpd[i].bus_prot_mask;
if (!mask)
continue;
if (bpd[i].bus_prot_reg_update)
regmap_clear_bits(regmap, bpd[i].bus_prot_clr, mask);
else
regmap_write(regmap, INFRA_TOPAXI_PROTECTEN_CLR, mask);
ret = regmap_read_poll_timeout(regmap, INFRA_TOPAXI_PROTECTSTA1,
val, !(val & mask),
MTK_POLL_DELAY_US, MTK_POLL_TIMEOUT);
if (ret) if (ret)
return ret; return ret;
} }
@ -107,23 +148,13 @@ static int scpsys_bus_protect_enable(struct scpsys_domain *pd)
static int scpsys_bus_protect_disable(struct scpsys_domain *pd) static int scpsys_bus_protect_disable(struct scpsys_domain *pd)
{ {
const struct scpsys_bus_prot_data *bpd = pd->data->bp_infracfg; int ret;
int i, ret;
for (i = SPM_MAX_BUS_PROT_DATA; i > 0; i--) { ret = _scpsys_bus_protect_disable(pd->data->bp_infracfg, pd->infracfg);
if (!bpd[i].bus_prot_mask)
continue;
ret = mtk_infracfg_clear_bus_protection(pd->infracfg,
bpd[i].bus_prot_mask,
bpd[i].bus_prot_reg_update);
if (ret)
return ret; return ret;
} }
return 0;
}
static int scpsys_power_on(struct generic_pm_domain *genpd) static int scpsys_power_on(struct generic_pm_domain *genpd)
{ {
struct scpsys_domain *pd = container_of(genpd, struct scpsys_domain, genpd); struct scpsys_domain *pd = container_of(genpd, struct scpsys_domain, genpd);

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@ -32,6 +32,11 @@
#define MT7622_TOP_AXI_PROT_EN_WB (BIT(2) | BIT(6) | \ #define MT7622_TOP_AXI_PROT_EN_WB (BIT(2) | BIT(6) | \
BIT(7) | BIT(8)) BIT(7) | BIT(8))
#define INFRA_TOPAXI_PROTECTEN 0x0220
#define INFRA_TOPAXI_PROTECTSTA1 0x0228
#define INFRA_TOPAXI_PROTECTEN_SET 0x0260
#define INFRA_TOPAXI_PROTECTEN_CLR 0x0264
#define REG_INFRA_MISC 0xf00 #define REG_INFRA_MISC 0xf00
#define F_DDR_4GB_SUPPORT_EN BIT(13) #define F_DDR_4GB_SUPPORT_EN BIT(13)