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perf/x86/intel/uncore: Add new data structures for free running counters
There are a number of free running counters introduced for uncore, which provide highly valuable information to a wide array of customers. For example, Skylake Server has IIO free running counters to collect Input/Output x BW/Utilization. There is NO event available on the general purpose counters, that is exactly the same as the free running counters. The generic uncore code needs to be enhanced to support the new counters. In the uncore document, there is no event-code assigned to free running counters. Some events need to be defined to indicate the free running counters. The events are encoded as event-code + umask-code. The event-code for all free running counters is 0xff, which is the same as the fixed counters: - It has not been decided what code will be used for common events on future platforms. 0xff is the only one which will definitely not be used as any common event-code. - Cannot re-use current events on the general purpose counters. Because there is NO event available, that is exactly the same as the free running counters. - Even in the existing codes, the fixed counters for core, that have the same event-code, may count different things. Hence, it should not surprise the users if the free running counters that share the same event-code also count different things. Umask will be used to distinguish the counters. The umask-code is used to distinguish a fixed counter and a free running counter, and different types of free running counters. For fixed counters, the umask-code is 0x0X, where X indicates the index of the fixed counter, which starts from 0. - Compatible with the old event encoding. - Currently, there is only one fixed counter. There are still 15 reserved spaces for extension. For free running counters, the umask-code uses the rest of the space. It would follow the format of 0xXY: - X stands for the type of free running counters, which starts from 1. - Y stands for the index of free running counters of same type, which starts from 0. - The free running counters do different thing. It can be categorized to several types, according to the MSR location, bit width and definition. E.g. there are three types of IIO free running counters on Skylake server to monitor IO CLOCKS, BANDWIDTH and UTILIZATION on different ports. It makes it easy to locate the free running counter of a specific type. - So far, there are at most 8 counters of each type. There are still 8 reserved spaces for extension. Introducing a new index to indicate the free running counters. Only one index is enough for all free running counters. Because the free running counters are always active, and the event and free running counter are always 1:1 mapped, it does not need extra index to indicate the assigned counter. Introducing a new data structure to store free running counters related information for each type. It includes the number of counters, bit width, base address, offset between counters and offset between boxes. Introducing several inline helpers to check index for fixed counter and free running counter, validate free running counter event, and retrieve the free running counter information according to box and event. Signed-off-by: Kan Liang <kan.liang@intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: acme@kernel.org Cc: eranian@google.com Link: http://lkml.kernel.org/r/1525371913-10597-4-git-send-email-kan.liang@intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
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@ -12,8 +12,13 @@
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#define UNCORE_FIXED_EVENT 0xff
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#define UNCORE_PMC_IDX_MAX_GENERIC 8
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#define UNCORE_PMC_IDX_MAX_FIXED 1
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#define UNCORE_PMC_IDX_MAX_FREERUNNING 1
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#define UNCORE_PMC_IDX_FIXED UNCORE_PMC_IDX_MAX_GENERIC
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#define UNCORE_PMC_IDX_MAX (UNCORE_PMC_IDX_FIXED + 1)
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#define UNCORE_PMC_IDX_FREERUNNING (UNCORE_PMC_IDX_FIXED + \
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UNCORE_PMC_IDX_MAX_FIXED)
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#define UNCORE_PMC_IDX_MAX (UNCORE_PMC_IDX_FREERUNNING + \
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UNCORE_PMC_IDX_MAX_FREERUNNING)
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#define UNCORE_PCI_DEV_FULL_DATA(dev, func, type, idx) \
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((dev << 24) | (func << 16) | (type << 8) | idx)
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@ -35,6 +40,7 @@ struct intel_uncore_ops;
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struct intel_uncore_pmu;
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struct intel_uncore_box;
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struct uncore_event_desc;
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struct freerunning_counters;
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struct intel_uncore_type {
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const char *name;
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@ -42,6 +48,7 @@ struct intel_uncore_type {
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int num_boxes;
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int perf_ctr_bits;
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int fixed_ctr_bits;
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int num_freerunning_types;
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unsigned perf_ctr;
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unsigned event_ctl;
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unsigned event_mask;
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@ -59,6 +66,7 @@ struct intel_uncore_type {
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struct intel_uncore_pmu *pmus;
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struct intel_uncore_ops *ops;
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struct uncore_event_desc *event_descs;
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struct freerunning_counters *freerunning;
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const struct attribute_group *attr_groups[4];
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struct pmu *pmu; /* for custom pmu ops */
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};
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@ -129,6 +137,14 @@ struct uncore_event_desc {
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const char *config;
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};
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struct freerunning_counters {
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unsigned int counter_base;
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unsigned int counter_offset;
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unsigned int box_offset;
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unsigned int num_counters;
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unsigned int bits;
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};
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struct pci2phy_map {
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struct list_head list;
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int segment;
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@ -157,6 +173,16 @@ static ssize_t __uncore_##_var##_show(struct kobject *kobj, \
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static struct kobj_attribute format_attr_##_var = \
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__ATTR(_name, 0444, __uncore_##_var##_show, NULL)
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static inline bool uncore_pmc_fixed(int idx)
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{
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return idx == UNCORE_PMC_IDX_FIXED;
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}
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static inline bool uncore_pmc_freerunning(int idx)
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{
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return idx == UNCORE_PMC_IDX_FREERUNNING;
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}
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static inline unsigned uncore_pci_box_ctl(struct intel_uncore_box *box)
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{
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return box->pmu->type->box_ctl;
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@ -214,6 +240,60 @@ static inline unsigned uncore_msr_fixed_ctr(struct intel_uncore_box *box)
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return box->pmu->type->fixed_ctr + uncore_msr_box_offset(box);
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}
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/*
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* In the uncore document, there is no event-code assigned to free running
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* counters. Some events need to be defined to indicate the free running
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* counters. The events are encoded as event-code + umask-code.
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*
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* The event-code for all free running counters is 0xff, which is the same as
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* the fixed counters.
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*
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* The umask-code is used to distinguish a fixed counter and a free running
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* counter, and different types of free running counters.
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* - For fixed counters, the umask-code is 0x0X.
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* X indicates the index of the fixed counter, which starts from 0.
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* - For free running counters, the umask-code uses the rest of the space.
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* It would bare the format of 0xXY.
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* X stands for the type of free running counters, which starts from 1.
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* Y stands for the index of free running counters of same type, which
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* starts from 0.
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*
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* For example, there are three types of IIO free running counters on Skylake
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* server, IO CLOCKS counters, BANDWIDTH counters and UTILIZATION counters.
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* The event-code for all the free running counters is 0xff.
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* 'ioclk' is the first counter of IO CLOCKS. IO CLOCKS is the first type,
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* which umask-code starts from 0x10.
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* So 'ioclk' is encoded as event=0xff,umask=0x10
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* 'bw_in_port2' is the third counter of BANDWIDTH counters. BANDWIDTH is
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* the second type, which umask-code starts from 0x20.
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* So 'bw_in_port2' is encoded as event=0xff,umask=0x22
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*/
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static inline unsigned int uncore_freerunning_idx(u64 config)
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{
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return ((config >> 8) & 0xf);
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}
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#define UNCORE_FREERUNNING_UMASK_START 0x10
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static inline unsigned int uncore_freerunning_type(u64 config)
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{
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return ((((config >> 8) - UNCORE_FREERUNNING_UMASK_START) >> 4) & 0xf);
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}
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static inline
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unsigned int uncore_freerunning_counter(struct intel_uncore_box *box,
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struct perf_event *event)
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{
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unsigned int type = uncore_freerunning_type(event->attr.config);
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unsigned int idx = uncore_freerunning_idx(event->attr.config);
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struct intel_uncore_pmu *pmu = box->pmu;
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return pmu->type->freerunning[type].counter_base +
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pmu->type->freerunning[type].counter_offset * idx +
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pmu->type->freerunning[type].box_offset * pmu->pmu_idx;
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}
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static inline
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unsigned uncore_msr_event_ctl(struct intel_uncore_box *box, int idx)
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{
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@ -276,11 +356,52 @@ static inline int uncore_fixed_ctr_bits(struct intel_uncore_box *box)
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return box->pmu->type->fixed_ctr_bits;
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}
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static inline
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unsigned int uncore_freerunning_bits(struct intel_uncore_box *box,
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struct perf_event *event)
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{
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unsigned int type = uncore_freerunning_type(event->attr.config);
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return box->pmu->type->freerunning[type].bits;
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}
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static inline int uncore_num_freerunning(struct intel_uncore_box *box,
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struct perf_event *event)
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{
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unsigned int type = uncore_freerunning_type(event->attr.config);
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return box->pmu->type->freerunning[type].num_counters;
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}
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static inline int uncore_num_freerunning_types(struct intel_uncore_box *box,
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struct perf_event *event)
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{
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return box->pmu->type->num_freerunning_types;
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}
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static inline bool check_valid_freerunning_event(struct intel_uncore_box *box,
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struct perf_event *event)
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{
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unsigned int type = uncore_freerunning_type(event->attr.config);
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unsigned int idx = uncore_freerunning_idx(event->attr.config);
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return (type < uncore_num_freerunning_types(box, event)) &&
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(idx < uncore_num_freerunning(box, event));
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}
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static inline int uncore_num_counters(struct intel_uncore_box *box)
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{
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return box->pmu->type->num_counters;
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}
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static inline bool is_freerunning_event(struct perf_event *event)
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{
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u64 cfg = event->attr.config;
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return ((cfg & UNCORE_FIXED_EVENT) == UNCORE_FIXED_EVENT) &&
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(((cfg >> 8) & 0xff) >= UNCORE_FREERUNNING_UMASK_START);
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}
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static inline void uncore_disable_box(struct intel_uncore_box *box)
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{
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if (box->pmu->type->ops->disable_box)
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