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arm64: dts: mt8192: Add cpu-idle-states

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Add idle states for cpu-off and cluster-off.

Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Link: https://lore.kernel.org/r/20201222045820.26355-1-jamesjj.liao@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This commit is contained in:
James Liao 2020-12-22 12:58:20 +08:00 committed by Matthias Brugger
parent 9e1b7d00bb
commit 9260918d3a
1 changed files with 44 additions and 0 deletions
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44
arch/arm64/boot/dts/mediatek/mt8192.dtsi
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@ -39,6 +39,7 @@
reg = <0x000>; reg = <0x000>;
enable-method = "psci"; enable-method = "psci";
clock-frequency = <1701000000>; clock-frequency = <1701000000>;
cpu-idle-states = <&cpuoff_l &clusteroff_l>;
next-level-cache = <&l2_0>; next-level-cache = <&l2_0>;
capacity-dmips-mhz = <530>; capacity-dmips-mhz = <530>;
}; };
@ -49,6 +50,7 @@
reg = <0x100>; reg = <0x100>;
enable-method = "psci"; enable-method = "psci";
clock-frequency = <1701000000>; clock-frequency = <1701000000>;
cpu-idle-states = <&cpuoff_l &clusteroff_l>;
next-level-cache = <&l2_0>; next-level-cache = <&l2_0>;
capacity-dmips-mhz = <530>; capacity-dmips-mhz = <530>;
}; };
@ -59,6 +61,7 @@
reg = <0x200>; reg = <0x200>;
enable-method = "psci"; enable-method = "psci";
clock-frequency = <1701000000>; clock-frequency = <1701000000>;
cpu-idle-states = <&cpuoff_l &clusteroff_l>;
next-level-cache = <&l2_0>; next-level-cache = <&l2_0>;
capacity-dmips-mhz = <530>; capacity-dmips-mhz = <530>;
}; };
@ -69,6 +72,7 @@
reg = <0x300>; reg = <0x300>;
enable-method = "psci"; enable-method = "psci";
clock-frequency = <1701000000>; clock-frequency = <1701000000>;
cpu-idle-states = <&cpuoff_l &clusteroff_l>;
next-level-cache = <&l2_0>; next-level-cache = <&l2_0>;
capacity-dmips-mhz = <530>; capacity-dmips-mhz = <530>;
}; };
@ -79,6 +83,7 @@
reg = <0x400>; reg = <0x400>;
enable-method = "psci"; enable-method = "psci";
clock-frequency = <2171000000>; clock-frequency = <2171000000>;
cpu-idle-states = <&cpuoff_b &clusteroff_b>;
next-level-cache = <&l2_1>; next-level-cache = <&l2_1>;
capacity-dmips-mhz = <1024>; capacity-dmips-mhz = <1024>;
}; };
@ -89,6 +94,7 @@
reg = <0x500>; reg = <0x500>;
enable-method = "psci"; enable-method = "psci";
clock-frequency = <2171000000>; clock-frequency = <2171000000>;
cpu-idle-states = <&cpuoff_b &clusteroff_b>;
next-level-cache = <&l2_1>; next-level-cache = <&l2_1>;
capacity-dmips-mhz = <1024>; capacity-dmips-mhz = <1024>;
}; };
@ -99,6 +105,7 @@
reg = <0x600>; reg = <0x600>;
enable-method = "psci"; enable-method = "psci";
clock-frequency = <2171000000>; clock-frequency = <2171000000>;
cpu-idle-states = <&cpuoff_b &clusteroff_b>;
next-level-cache = <&l2_1>; next-level-cache = <&l2_1>;
capacity-dmips-mhz = <1024>; capacity-dmips-mhz = <1024>;
}; };
@ -109,6 +116,7 @@
reg = <0x700>; reg = <0x700>;
enable-method = "psci"; enable-method = "psci";
clock-frequency = <2171000000>; clock-frequency = <2171000000>;
cpu-idle-states = <&cpuoff_b &clusteroff_b>;
next-level-cache = <&l2_1>; next-level-cache = <&l2_1>;
capacity-dmips-mhz = <1024>; capacity-dmips-mhz = <1024>;
}; };
@ -158,6 +166,42 @@
l3_0: l3-cache { l3_0: l3-cache {
compatible = "cache"; compatible = "cache";
}; };
idle-states {
entry-method = "arm,psci";
cpuoff_l: cpuoff_l {
compatible = "arm,idle-state";
arm,psci-suspend-param = <0x00010001>;
local-timer-stop;
entry-latency-us = <55>;
exit-latency-us = <140>;
min-residency-us = <780>;
};
cpuoff_b: cpuoff_b {
compatible = "arm,idle-state";
arm,psci-suspend-param = <0x00010001>;
local-timer-stop;
entry-latency-us = <35>;
exit-latency-us = <145>;
min-residency-us = <720>;
};
clusteroff_l: clusteroff_l {
compatible = "arm,idle-state";
arm,psci-suspend-param = <0x01010002>;
local-timer-stop;
entry-latency-us = <60>;
exit-latency-us = <155>;
min-residency-us = <860>;
};
clusteroff_b: clusteroff_b {
compatible = "arm,idle-state";
arm,psci-suspend-param = <0x01010002>;
local-timer-stop;
entry-latency-us = <40>;
exit-latency-us = <155>;
min-residency-us = <780>;
};
};
}; };
pmu-a55 { pmu-a55 {