korg/linux
0
0
Fork 0
mirror of https://mirrors.bfsu.edu.cn/git/linux.git synced 2025-01-01 19:34:35 +08:00
Code Issues Packages Projects Releases Wiki Activity

ARM: dts: dra7-evm: Fix comment about NAND configuration

Browse Source 
The switch configuration for NAND is actually the other way round.
Also mention ON/OFF states as that is more natural to understand
(without the help of schematics) when compared to HIGH/LOW.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Roger Quadros 2016-03-03 13:28:20 +02:00 committed by Tony Lindgren
parent 8695add6c3
commit 91d075c7cf
1 changed files with 3 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
arch/arm/boot/dts/dra7-evm.dts
View File

@ -256,8 +256,9 @@
nand_flash_x16: nand_flash_x16 { nand_flash_x16: nand_flash_x16 {
/* On DRA7 EVM, GPMC_WPN and NAND_BOOTn comes from DIP switch /* On DRA7 EVM, GPMC_WPN and NAND_BOOTn comes from DIP switch
* So NAND flash requires following switch settings: * So NAND flash requires following switch settings:
* SW5.9 (GPMC_WPN) = LOW * SW5.1 (NAND_BOOTn) = ON (LOW)
* SW5.1 (NAND_BOOTn) = HIGH */ * SW5.9 (GPMC_WPN) = OFF (HIGH)
*/
pinctrl-single,pins = < pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3400, PIN_INPUT | MUX_MODE0) /* gpmc_ad0 */ DRA7XX_CORE_IOPAD(0x3400, PIN_INPUT | MUX_MODE0) /* gpmc_ad0 */
DRA7XX_CORE_IOPAD(0x3404, PIN_INPUT | MUX_MODE0) /* gpmc_ad1 */ DRA7XX_CORE_IOPAD(0x3404, PIN_INPUT | MUX_MODE0) /* gpmc_ad1 */