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ARM: dts: dra7-evm: Fix comment about NAND configuration
The switch configuration for NAND is actually the other way round. Also mention ON/OFF states as that is more natural to understand (without the help of schematics) when compared to HIGH/LOW. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -256,8 +256,9 @@
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nand_flash_x16: nand_flash_x16 {
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/* On DRA7 EVM, GPMC_WPN and NAND_BOOTn comes from DIP switch
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* So NAND flash requires following switch settings:
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* SW5.9 (GPMC_WPN) = LOW
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* SW5.1 (NAND_BOOTn) = HIGH */
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* SW5.1 (NAND_BOOTn) = ON (LOW)
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* SW5.9 (GPMC_WPN) = OFF (HIGH)
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*/
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pinctrl-single,pins = <
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DRA7XX_CORE_IOPAD(0x3400, PIN_INPUT | MUX_MODE0) /* gpmc_ad0 */
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DRA7XX_CORE_IOPAD(0x3404, PIN_INPUT | MUX_MODE0) /* gpmc_ad1 */
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