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arm64: tegra: Device tree changes for v5.11-rc1

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These changes are mostly minor fixes across the board, but they also
 enable PMUs on Tegra186 and enable SATA support on Jetson TX2.
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Merge tag 'tegra-for-5.11-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt

arm64: tegra: Device tree changes for v5.11-rc1

These changes are mostly minor fixes across the board, but they also
enable PMUs on Tegra186 and enable SATA support on Jetson TX2.

* tag 'tegra-for-5.11-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  arm64: tegra: Fix Tegra194 HDA {clock,reset}-names ordering
  arm64: tegra: Enable AHCI on Jetson TX2
  arm64: tegra: Change order of SATA resets for Tegra132 and Tegra210
  arm64: tegra: Add XUSB pad controller interrupt
  arm64: tegra: Rename ADMA device nodes for Tegra210
  arm64: tegra: Hook up edp interrupt on Tegra132 SOCTHERM
  arm64: tegra: Add missing hot temperatures to Tegra210 thermal-zones
  arm64: tegra: Add missing gpu-throt-level to Tegra210 soctherm
  arm64: tegra: Add missing hot temperatures to Tegra132 thermal-zones
  arm64: tegra: Fix DT binding for IO High Voltage entry
  arm64: tegra: Fix GIC400 missing GICH/GICV register regions
  arm64: tegra: Add missing CPU PMUs on Tegra186
  arm64: tegra: Fix Tegra234 VDK node names
  arm64: tegra: Wrong AON HSP reg property size
  arm64: tegra: Fix USB_VBUS_EN0 regulator on Jetson TX1
  arm64: tegra: Correct the UART for Jetson Xavier NX
  arm64: tegra: Disable the ACONNECT for Jetson TX2

Link: https://lore.kernel.org/r/20201127144329.124891-5-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2020-11-27 18:05:15 +01:00
commit 914b8de3dd
11 changed files with 119 additions and 53 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

20
arch/arm64/boot/dts/nvidia/tegra132.dtsi
View File

@ -629,9 +629,9 @@
<&tegra_car TEGRA124_CLK_PLL_E>;
clock-names = "sata", "sata-oob", "cml1", "pll_e";
resets = <&tegra_car 124>,
<&tegra_car 123>,
<&tegra_car 129>;
reset-names = "sata", "sata-oob", "sata-cold";
<&tegra_car 129>,
<&tegra_car 123>;
reset-names = "sata", "sata-cold", "sata-oob";
status = "disabled";
};
@ -865,7 +865,9 @@
reg = <0x0 0x700e2000 0x0 0x600>, /* 0: SOC_THERM reg_base */
<0x0 0x70040000 0x0 0x200>; /* 2: CCROC reg_base */
reg-names = "soctherm-reg", "ccroc-reg";
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "thermal", "edp";
clocks = <&tegra_car TEGRA124_CLK_TSENSOR>,
<&tegra_car TEGRA124_CLK_SOC_THERM>;
clock-names = "tsensor", "soctherm";
@ -925,6 +927,11 @@
hysteresis = <1000>;
type = "critical";
};
mem_throttle_trip {
temperature = <99000>;
hysteresis = <1000>;
type = "hot";
};
};
cooling-maps {
@ -975,6 +982,11 @@
hysteresis = <1000>;
type = "critical";
};
pllx_throttle_trip {
temperature = <99000>;
hysteresis = <1000>;
type = "hot";
};
};
cooling-maps {

16
arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts
View File

@ -10,18 +10,6 @@
model = "NVIDIA Jetson TX2 Developer Kit";
compatible = "nvidia,p2771-0000", "nvidia,tegra186";
aconnect {
status = "okay";
dma-controller@2930000 {
status = "okay";
};
interrupt-controller@2a40000 {
status = "okay";
};
};
i2c@3160000 {
power-monitor@42 {
compatible = "ti,ina3221";
@ -297,6 +285,10 @@
};
};
sata@3507000 {
status = "okay";
};
gpio-keys {
compatible = "gpio-keys";

61
arch/arm64/boot/dts/nvidia/tegra186.dtsi
View File

@ -685,6 +685,7 @@
reg = <0x0 0x03520000 0x0 0x1000>,
<0x0 0x03540000 0x0 0x1000>;
reg-names = "padctl", "ao";
interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
resets = <&bpmp TEGRA186_RESET_XUSB_PADCTL>;
reset-names = "padctl";
@ -845,7 +846,9 @@
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x0 0x03881000 0x0 0x1000>,
<0x0 0x03882000 0x0 0x2000>;
<0x0 0x03882000 0x0 0x2000>,
<0x0 0x03884000 0x0 0x2000>,
<0x0 0x03886000 0x0 0x2000>;
interrupts = <GIC_PPI 9
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
interrupt-parent = <&gic>;
@ -1501,6 +1504,34 @@
};
};
sata@3507000 {
compatible = "nvidia,tegra186-ahci";
reg = <0x0 0x03507000 0x0 0x00002000>, /* AHCI */
<0x0 0x03500000 0x0 0x00007000>, /* SATA */
<0x0 0x03A90000 0x0 0x00010000>; /* SATA AUX */
interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&bpmp TEGRA186_POWER_DOMAIN_SAX>;
interconnects = <&mc TEGRA186_MEMORY_CLIENT_SATAR &emc>,
<&mc TEGRA186_MEMORY_CLIENT_SATAW &emc>;
interconnect-names = "dma-mem", "write";
iommus = <&smmu TEGRA186_SID_SATA>;
clocks = <&bpmp TEGRA186_CLK_SATA>,
<&bpmp TEGRA186_CLK_SATA_OOB>;
clock-names = "sata", "sata-oob";
assigned-clocks = <&bpmp TEGRA186_CLK_SATA>,
<&bpmp TEGRA186_CLK_SATA_OOB>;
assigned-clock-parents = <&bpmp TEGRA186_CLK_PLLP_OUT0>,
<&bpmp TEGRA186_CLK_PLLP>;
assigned-clock-rates = <102000000>,
<204000000>;
resets = <&bpmp TEGRA186_RESET_SATA>,
<&bpmp TEGRA186_RESET_SATACOLD>;
reset-names = "sata", "sata-cold";
status = "disabled";
};
bpmp: bpmp {
compatible = "nvidia,tegra186-bpmp";
interconnects = <&mc TEGRA186_MEMORY_CLIENT_BPMPR &emc>,
@ -1534,7 +1565,7 @@
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
denver_0: cpu@0 {
compatible = "nvidia,tegra186-denver";
device_type = "cpu";
i-cache-size = <0x20000>;
@ -1547,7 +1578,7 @@
reg = <0x000>;
};
cpu@1 {
denver_1: cpu@1 {
compatible = "nvidia,tegra186-denver";
device_type = "cpu";
i-cache-size = <0x20000>;
@ -1560,7 +1591,7 @@
reg = <0x001>;
};
cpu@2 {
ca57_0: cpu@2 {
compatible = "arm,cortex-a57";
device_type = "cpu";
i-cache-size = <0xC000>;
@ -1573,7 +1604,7 @@
reg = <0x100>;
};
cpu@3 {
ca57_1: cpu@3 {
compatible = "arm,cortex-a57";
device_type = "cpu";
i-cache-size = <0xC000>;
@ -1586,7 +1617,7 @@
reg = <0x101>;
};
cpu@4 {
ca57_2: cpu@4 {
compatible = "arm,cortex-a57";
device_type = "cpu";
i-cache-size = <0xC000>;
@ -1599,7 +1630,7 @@
reg = <0x102>;
};
cpu@5 {
ca57_3: cpu@5 {
compatible = "arm,cortex-a57";
device_type = "cpu";
i-cache-size = <0xC000>;
@ -1631,6 +1662,22 @@
};
};
pmu_denver {
compatible = "nvidia,denver-pmu", "arm,armv8-pmuv3";
interrupts = <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&denver_0 &denver_1>;
};
pmu_a57 {
compatible = "arm,cortex-a57-pmu", "arm,armv8-pmuv3";
interrupts = <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&ca57_0 &ca57_1 &ca57_2 &ca57_3>;
};
thermal-zones {
a57 {
polling-delay = <0>;

2
arch/arm64/boot/dts/nvidia/tegra194-p3668-0000.dtsi
View File

@ -54,7 +54,7 @@
status = "okay";
};
serial@c280000 {
serial@3100000 {
status = "okay";
};

19
arch/arm64/boot/dts/nvidia/tegra194.dtsi
View File

@ -378,7 +378,7 @@
nvidia,schmitt = <TEGRA_PIN_DISABLE>;
nvidia,lpdr = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
nvidia,io-hv = <TEGRA_PIN_ENABLE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
};
@ -390,7 +390,7 @@
nvidia,schmitt = <TEGRA_PIN_DISABLE>;
nvidia,lpdr = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
nvidia,io-hv = <TEGRA_PIN_ENABLE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
};
@ -782,13 +782,13 @@
reg = <0x3510000 0x10000>;
interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA194_CLK_HDA>,
<&bpmp TEGRA194_CLK_HDA2CODEC_2X>,
<&bpmp TEGRA194_CLK_HDA2HDMICODEC>;
clock-names = "hda", "hda2codec_2x", "hda2hdmi";
<&bpmp TEGRA194_CLK_HDA2HDMICODEC>,
<&bpmp TEGRA194_CLK_HDA2CODEC_2X>;
clock-names = "hda", "hda2hdmi", "hda2codec_2x";
resets = <&bpmp TEGRA194_RESET_HDA>,
<&bpmp TEGRA194_RESET_HDA2CODEC_2X>,
<&bpmp TEGRA194_RESET_HDA2HDMICODEC>;
reset-names = "hda", "hda2codec_2x", "hda2hdmi";
<&bpmp TEGRA194_RESET_HDA2HDMICODEC>,
<&bpmp TEGRA194_RESET_HDA2CODEC_2X>;
reset-names = "hda", "hda2hdmi", "hda2codec_2x";
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_DISP>;
interconnects = <&mc TEGRA194_MEMORY_CLIENT_HDAR &emc>,
<&mc TEGRA194_MEMORY_CLIENT_HDAW &emc>;
@ -801,6 +801,7 @@
reg = <0x03520000 0x1000>,
<0x03540000 0x1000>;
reg-names = "padctl", "ao";
interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
resets = <&bpmp TEGRA194_RESET_XUSB_PADCTL>;
reset-names = "padctl";
@ -1161,7 +1162,7 @@
hsp_aon: hsp@c150000 {
compatible = "nvidia,tegra194-hsp", "nvidia,tegra186-hsp";
reg = <0x0c150000 0xa0000>;
reg = <0x0c150000 0x90000>;
interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,

2
arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts
View File

@ -119,7 +119,7 @@
aconnect@702c0000 {
status = "okay";
dma@702e2000 {
dma-controller@702e2000 {
status = "okay";
};

20
arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi
View File

@ -1663,16 +1663,6 @@
vin-supply = <&vdd_5v0_sys>;
};
vdd_usb_vbus_otg: regulator@11 {
compatible = "regulator-fixed";
regulator-name = "USB_VBUS_EN0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(CC, 4) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_5v0_sys>;
};
vdd_hdmi: regulator@10 {
compatible = "regulator-fixed";
regulator-name = "VDD_HDMI_5V0";
@ -1712,4 +1702,14 @@
enable-active-high;
vin-supply = <&vdd_3v3_sys>;
};
vdd_usb_vbus_otg: regulator@14 {
compatible = "regulator-fixed";
regulator-name = "USB_VBUS_EN0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(CC, 4) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_5v0_sys>;
};
};

2
arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts
View File

@ -629,7 +629,7 @@
aconnect@702c0000 {
status = "okay";
dma@702e2000 {
dma-controller@702e2000 {
status = "okay";
};

2
arch/arm64/boot/dts/nvidia/tegra210-smaug.dts
View File

@ -1717,7 +1717,7 @@
aconnect@702c0000 {
status = "okay";
dma@702e2000 {
dma-controller@702e2000 {
status = "okay";
};

22
arch/arm64/boot/dts/nvidia/tegra210.dtsi
View File

@ -979,9 +979,9 @@
<&tegra_car TEGRA210_CLK_SATA_OOB>;
clock-names = "sata", "sata-oob";
resets = <&tegra_car 124>,
<&tegra_car 123>,
<&tegra_car 129>;
reset-names = "sata", "sata-oob", "sata-cold";
<&tegra_car 129>,
<&tegra_car 123>;
reset-names = "sata", "sata-cold", "sata-oob";
status = "disabled";
};
@ -1040,6 +1040,7 @@
padctl: padctl@7009f000 {
compatible = "nvidia,tegra210-xusb-padctl";
reg = <0x0 0x7009f000 0x0 0x1000>;
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
resets = <&tegra_car 142>;
reset-names = "padctl";
@ -1344,7 +1345,7 @@
ranges = <0x702c0000 0x0 0x702c0000 0x00040000>;
status = "disabled";
adma: dma@702e2000 {
adma: dma-controller@702e2000 {
compatible = "nvidia,tegra210-adma";
reg = <0x702e2000 0x2000>;
interrupt-parent = <&agic>;
@ -1724,6 +1725,7 @@
throttle_heavy: heavy {
nvidia,priority = <100>;
nvidia,cpu-throt-percent = <85>;
nvidia,gpu-throt-level = <TEGRA_SOCTHERM_THROT_LEVEL_HIGH>;
#cooling-cells = <2>;
};
@ -1780,6 +1782,12 @@
type = "active";
};
mem-hot-trip {
temperature = <100000>;
hysteresis = <1000>;
type = "hot";
};
mem-shutdown-trip {
temperature = <103000>;
hysteresis = <0>;
@ -1842,6 +1850,12 @@
hysteresis = <0>;
type = "critical";
};
pllx-throttle-trip {
temperature = <100000>;
hysteresis = <1000>;
type = "hot";
};
};
cooling-maps {

6
arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts
View File

@ -8,7 +8,7 @@
compatible = "nvidia,tegra234-vdk", "nvidia,tegra234";
aliases {
sdhci3 = "/cbb@0/sdhci@3460000";
mmc3 = "/bus@0/mmc@3460000";
serial0 = &uarta;
};
@ -17,12 +17,12 @@
stdout-path = "serial0:115200n8";
};
cbb@0 {
bus@0 {
serial@3100000 {
status = "okay";
};
sdhci@3460000 {
mmc@3460000 {
status = "okay";
bus-width = <8>;
non-removable;