mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-11-11 12:28:41 +08:00
Pin control changes for the v6.7 kernel cycle
New drivers:
- Realtek RTD family pin control driver and RTD1619B,
RTD1319D and RTD1315E subdrivers.
- Nuvoton NPCM8xx combined pin control and GPIO driver.
- Amlogic T7 pin control driver.
- Renesas RZ/G3S pin control driver.
Improvements:
- A number of additional UART groups added to the Mediatek
MT7981 driver.
- MPM pin maps added for Qualcomm MSM8996, SM6115, SM6125
and SDM660.
- Extra GPIO banks for the Sunxi H616.
- MLSP I2C6 function support in Qualcomm MSM8226.
- Some __counted_by() annotations for dynamic arrays.
- Ongoing work to make remove() return void.
- LSBC groups and functions in the Renesas R8A7778.
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Merge tag 'pinctrl-v6.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"No pin control core changes this time.
New drivers:
- Realtek RTD family pin control driver and RTD1619B, RTD1319D and
RTD1315E subdrivers
- Nuvoton NPCM8xx combined pin control and GPIO driver
- Amlogic T7 pin control driver
- Renesas RZ/G3S pin control driver
Improvements:
- A number of additional UART groups added to the Mediatek MT7981
driver
- MPM pin maps added for Qualcomm MSM8996, SM6115, SM6125 and SDM660
- Extra GPIO banks for the Sunxi H616
- MLSP I2C6 function support in Qualcomm MSM8226
- Some __counted_by() annotations for dynamic arrays
- Ongoing work to make remove() return void
- LSBC groups and functions in the Renesas R8A7778"
* tag 'pinctrl-v6.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (110 commits)
pinctrl: Use device_get_match_data()
dt-bindings: pinctrl: qcom,sa8775p-tlmm: add missing wakeup-parent
dt-bindings: pinctrl: nuvoton,npcm845: Add missing additionalProperties on gpio child nodes
dt-bindings: pinctrl: brcm: Ensure all child node properties are documented
pinctrl: renesas: rzn1: Convert to platform remove callback returning void
pinctrl: renesas: rzg2l: Add RZ/G3S support
dt-bindings: pinctrl: renesas: Document RZ/G3S SoC
pinctrl: renesas: rzg2l: Add support for different DS values on different groups
pinctrl: renesas: rzg2l: Move DS and OI to SoC-specific configuration
pinctrl: renesas: rzg2l: Adapt function number for RZ/G3S
pinctrl: renesas: rzg2l: Adapt for different SD/PWPR register offsets
pinctrl: renesas: rzg2l: Index all registers based on port offset
pinctrl: renesas: rzg2l: Add validation of GPIO pin in rzg2l_gpio_request()
pinctrl: renesas: r8a7778: Add LBSC pins, groups, and functions
pinctrl: intel: fetch community only when we need it
pinctrl: cherryview: reduce scope of PIN_CONFIG_BIAS_HIGH_IMPEDANCE case
pinctrl: cherryview: Convert to platform remove callback returning void
pinctrl: sprd-sc9860: Convert to platform remove callback returning void
pinctrl: qcom/msm: Convert to platform remove callback returning void
pinctrl: qcom/lpi: Convert to platform remove callback returning void
...
This commit is contained in:
Linus Torvalds
commit
90b0c2b2ed
@ -148,47 +148,47 @@ examples:
|
||||
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pinctrl_nand: nand-pins {
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function = "nand";
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group = "nand_grp";
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pins = "nand_grp";
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};
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pinctrl_gpio35_alt: gpio35_alt-pins {
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function = "gpio35_alt";
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pin = "gpio35";
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pins = "gpio35";
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};
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pinctrl_dectpd: dectpd-pins {
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function = "dectpd";
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group = "dectpd_grp";
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pins = "dectpd_grp";
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};
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pinctrl_vdsl_phy_override_0: vdsl_phy_override_0-pins {
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function = "vdsl_phy_override_0";
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group = "vdsl_phy_override_0_grp";
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pins = "vdsl_phy_override_0_grp";
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};
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pinctrl_vdsl_phy_override_1: vdsl_phy_override_1-pins {
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function = "vdsl_phy_override_1";
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group = "vdsl_phy_override_1_grp";
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pins = "vdsl_phy_override_1_grp";
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};
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pinctrl_vdsl_phy_override_2: vdsl_phy_override_2-pins {
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function = "vdsl_phy_override_2";
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group = "vdsl_phy_override_2_grp";
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pins = "vdsl_phy_override_2_grp";
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};
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pinctrl_vdsl_phy_override_3: vdsl_phy_override_3-pins {
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function = "vdsl_phy_override_3";
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group = "vdsl_phy_override_3_grp";
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pins = "vdsl_phy_override_3_grp";
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};
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pinctrl_dsl_gpio8: dsl_gpio8-pins {
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function = "dsl_gpio8";
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group = "dsl_gpio8";
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pins = "dsl_gpio8";
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};
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pinctrl_dsl_gpio9: dsl_gpio9-pins {
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function = "dsl_gpio9";
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group = "dsl_gpio9";
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pins = "dsl_gpio9";
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};
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};
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};
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@ -230,7 +230,7 @@ examples:
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pinctrl_nand: nand-pins {
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function = "nand";
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group = "nand_grp";
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pins = "nand_grp";
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};
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};
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};
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@ -240,7 +240,7 @@ examples:
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pinctrl_uart1: uart1-pins {
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function = "uart1";
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group = "uart1_grp";
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pins = "uart1_grp";
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};
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};
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};
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@ -16,6 +16,7 @@ properties:
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compatible:
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enum:
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- amlogic,c3-periphs-pinctrl
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- amlogic,t7-periphs-pinctrl
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- amlogic,meson-a1-periphs-pinctrl
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- amlogic,meson-s4-periphs-pinctrl
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@ -24,6 +24,7 @@ patternProperties:
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'-pins$':
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type: object
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$ref: pinmux-node.yaml#
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additionalProperties: false
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properties:
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function:
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@ -37,6 +38,10 @@ patternProperties:
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enum: [ gpio0, gpio1, gpio2, gpio3, gpio4, gpio5, gpio6, gpio7,
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gpio8, gpio9, gpio10, gpio11, gpio12, gpio13, gpio40 ]
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patternProperties:
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'-pins$':
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$ref: '#/patternProperties/-pins$'
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allOf:
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- $ref: pinctrl.yaml#
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@ -24,6 +24,7 @@ patternProperties:
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'-pins$':
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type: object
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$ref: pinmux-node.yaml#
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unevaluatedProperties: false
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properties:
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function:
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@ -36,11 +37,15 @@ patternProperties:
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pins:
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enum: [ gpio0, gpio1, gpio16, gpio17, gpio8, gpio9, gpio18, gpio19,
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gpio22, gpio23, gpio30, gpio31, nand_grp, gpio35
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gpio22, gpio23, gpio30, gpio31, nand_grp, gpio35,
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dectpd_grp, vdsl_phy_override_0_grp,
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vdsl_phy_override_1_grp, vdsl_phy_override_2_grp,
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vdsl_phy_override_3_grp, dsl_gpio8, dsl_gpio9 ]
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patternProperties:
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'-pins$':
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$ref: '#/patternProperties/-pins$'
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allOf:
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- $ref: pinctrl.yaml#
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@ -122,46 +127,46 @@ examples:
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pinctrl_nand: nand-pins {
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function = "nand";
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group = "nand_grp";
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pins = "nand_grp";
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};
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pinctrl_gpio35_alt: gpio35_alt-pins {
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function = "gpio35_alt";
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pin = "gpio35";
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pins = "gpio35";
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};
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pinctrl_dectpd: dectpd-pins {
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function = "dectpd";
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group = "dectpd_grp";
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pins = "dectpd_grp";
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};
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pinctrl_vdsl_phy_override_0: vdsl_phy_override_0-pins {
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function = "vdsl_phy_override_0";
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group = "vdsl_phy_override_0_grp";
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pins = "vdsl_phy_override_0_grp";
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};
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pinctrl_vdsl_phy_override_1: vdsl_phy_override_1-pins {
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function = "vdsl_phy_override_1";
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group = "vdsl_phy_override_1_grp";
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pins = "vdsl_phy_override_1_grp";
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};
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pinctrl_vdsl_phy_override_2: vdsl_phy_override_2-pins {
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function = "vdsl_phy_override_2";
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group = "vdsl_phy_override_2_grp";
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pins = "vdsl_phy_override_2_grp";
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};
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pinctrl_vdsl_phy_override_3: vdsl_phy_override_3-pins {
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function = "vdsl_phy_override_3";
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group = "vdsl_phy_override_3_grp";
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pins = "vdsl_phy_override_3_grp";
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};
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pinctrl_dsl_gpio8: dsl_gpio8-pins {
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function = "dsl_gpio8";
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group = "dsl_gpio8";
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pins = "dsl_gpio8";
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};
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pinctrl_dsl_gpio9: dsl_gpio9-pins {
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function = "dsl_gpio9";
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group = "dsl_gpio9";
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pins = "dsl_gpio9";
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};
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};
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@ -24,6 +24,7 @@ patternProperties:
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'-pins$':
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type: object
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$ref: pinmux-node.yaml#
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unevaluatedProperties: false
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properties:
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function:
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@ -36,6 +37,10 @@ patternProperties:
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gpio20, gpio25, gpio26, gpio27, gpio28, hsspi_cs1,
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usb_port1 ]
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patternProperties:
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'-pins$':
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$ref: '#/patternProperties/-pins$'
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allOf:
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- $ref: pinctrl.yaml#
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@ -24,15 +24,16 @@ patternProperties:
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||||
'-pins$':
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type: object
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$ref: pinmux-node.yaml#
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unevaluatedProperties: false
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properties:
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function:
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enum: [ ebi_cs, uart1, serial_led, legacy_led, led, spi_cs, utopia,
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pwm_syn_clk, sys_irq ]
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pins:
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groups:
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enum: [ ebi_cs_grp, uart1_grp, serial_led_grp, legacy_led_grp,
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led_grp, spi_cs_grp, utopia_grp, pwm_syn_clk, sys_irq_grp ]
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led_grp, spi_cs_grp, utopia_grp, pwm_syn_clk_grp, sys_irq_grp ]
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allOf:
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- $ref: pinctrl.yaml#
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@ -24,6 +24,7 @@ patternProperties:
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||||
'-pins$':
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type: object
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||||
$ref: pinmux-node.yaml#
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unevaluatedProperties: false
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properties:
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function:
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@ -41,6 +42,10 @@ patternProperties:
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gpio15, gpio16, gpio17, gpio18, gpio19, gpio20, gpio21,
|
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gpio22, gpio23, gpio24, gpio25, gpio26, gpio27, nand_grp ]
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patternProperties:
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'-pins$':
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$ref: '#/patternProperties/-pins$'
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allOf:
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- $ref: pinctrl.yaml#
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@ -204,6 +209,6 @@ examples:
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pinctrl_nand: nand-pins {
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function = "nand";
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group = "nand_grp";
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pins = "nand_grp";
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};
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};
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||||
@ -24,6 +24,7 @@ patternProperties:
|
||||
'-pins$':
|
||||
type: object
|
||||
$ref: pinmux-node.yaml#
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||||
unevaluatedProperties: false
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||||
|
||||
properties:
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function:
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||||
@ -42,6 +43,10 @@ patternProperties:
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gpio24, gpio25, gpio26, gpio27, gpio28, gpio29, gpio30,
|
||||
gpio31, uart1_grp ]
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patternProperties:
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'-pins$':
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||||
$ref: '#/patternProperties/-pins$'
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||||
|
||||
allOf:
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||||
- $ref: pinctrl.yaml#
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||||
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||||
@ -215,6 +220,6 @@ examples:
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pinctrl_uart1: uart1-pins {
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function = "uart1";
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group = "uart1_grp";
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pins = "uart1_grp";
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||||
};
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||||
};
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||||
@ -0,0 +1,217 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
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%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/pinctrl/nuvoton,npcm845-pinctrl.yaml#
|
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$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Nuvoton NPCM845 Pin Controller and GPIO
|
||||
|
||||
maintainers:
|
||||
- Tomer Maimon <tmaimon77@gmail.com>
|
||||
|
||||
description:
|
||||
The Nuvoton BMC NPCM8XX Pin Controller multi-function routed through
|
||||
the multiplexing block, Each pin supports GPIO functionality (GPIOx)
|
||||
and multiple functions that directly connect the pin to different
|
||||
hardware blocks.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: nuvoton,npcm845-pinctrl
|
||||
|
||||
ranges:
|
||||
maxItems: 1
|
||||
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 1
|
||||
|
||||
nuvoton,sysgcr:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description: a phandle to access GCR registers.
|
||||
|
||||
patternProperties:
|
||||
'^gpio@':
|
||||
type: object
|
||||
additionalProperties: false
|
||||
|
||||
description:
|
||||
Eight GPIO banks that each contain 32 GPIOs.
|
||||
|
||||
properties:
|
||||
gpio-controller: true
|
||||
|
||||
'#gpio-cells':
|
||||
const: 2
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
gpio-ranges:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- gpio-controller
|
||||
- '#gpio-cells'
|
||||
- reg
|
||||
- interrupts
|
||||
- gpio-ranges
|
||||
|
||||
'-mux$':
|
||||
$ref: pinmux-node.yaml#
|
||||
|
||||
properties:
|
||||
groups:
|
||||
description:
|
||||
One or more groups of pins to mux to a certain function
|
||||
items:
|
||||
enum: [ iox1, iox2, smb1d, smb2d, lkgpo1, lkgpo2, ioxh, gspi,
|
||||
smb5b, smb5c, lkgpo0, pspi, jm1, jm2, smb4den, smb4b,
|
||||
smb4c, smb15, smb16, smb17, smb18, smb19, smb20, smb21,
|
||||
smb22, smb23, smb23b, smb4d, smb14, smb5, smb4, smb3,
|
||||
spi0cs1, spi0cs2, spi0cs3, spi1cs0, spi1cs1, spi1cs2,
|
||||
spi1cs3, spi1cs23, smb3c, smb3b, bmcuart0a, uart1, jtag2,
|
||||
bmcuart1, uart2, sg1mdio, bmcuart0b, r1err, r1md, r1oen,
|
||||
r2oen, rmii3, r3oen, smb3d, fanin0, fanin1, fanin2, fanin3,
|
||||
fanin4, fanin5, fanin6, fanin7, fanin8, fanin9, fanin10,
|
||||
fanin11, fanin12, fanin13, fanin14, fanin15, pwm0, pwm1, pwm2,
|
||||
pwm3, r2, r2err, r2md, r3rxer, ga20kbc, smb5d, lpc, espi, rg2,
|
||||
ddr, i3c0, i3c1, i3c2, i3c3, i3c4, i3c5, smb0, smb1, smb2,
|
||||
smb2c, smb2b, smb1c, smb1b, smb8, smb9, smb10, smb11, sd1,
|
||||
sd1pwr, pwm4, pwm5, pwm6, pwm7, pwm8, pwm9, pwm10, pwm11,
|
||||
mmc8, mmc, mmcwp, mmccd, mmcrst, clkout, serirq, lpcclk,
|
||||
scipme, smi, smb6, smb7, spi1, faninx, r1, spi3, spi3cs1,
|
||||
spi3quad, spi3cs2, spi3cs3, nprd_smi, smb0b, smb0c, smb0den,
|
||||
smb0d, ddc, rg2mdio, wdog1, wdog2, smb12, smb13, spix,
|
||||
spixcs1, clkreq, hgpio0, hgpio1, hgpio2, hgpio3, hgpio4,
|
||||
hgpio5, hgpio6, hgpio7 ]
|
||||
|
||||
function:
|
||||
description:
|
||||
The function that a group of pins is muxed to
|
||||
enum: [ iox1, iox2, smb1d, smb2d, lkgpo1, lkgpo2, ioxh, gspi,
|
||||
smb5b, smb5c, lkgpo0, pspi, jm1, jm2, smb4den, smb4b,
|
||||
smb4c, smb15, smb16, smb17, smb18, smb19, smb20, smb21,
|
||||
smb22, smb23, smb23b, smb4d, smb14, smb5, smb4, smb3,
|
||||
spi0cs1, spi0cs2, spi0cs3, spi1cs0, spi1cs1, spi1cs2,
|
||||
spi1cs3, spi1cs23, smb3c, smb3b, bmcuart0a, uart1, jtag2,
|
||||
bmcuart1, uart2, sg1mdio, bmcuart0b, r1err, r1md, r1oen,
|
||||
r2oen, rmii3, r3oen, smb3d, fanin0, fanin1, fanin2, fanin3,
|
||||
fanin4, fanin5, fanin6, fanin7, fanin8, fanin9, fanin10,
|
||||
fanin11, fanin12, fanin13, fanin14, fanin15, pwm0, pwm1, pwm2,
|
||||
pwm3, r2, r2err, r2md, r3rxer, ga20kbc, smb5d, lpc, espi, rg2,
|
||||
ddr, i3c0, i3c1, i3c2, i3c3, i3c4, i3c5, smb0, smb1, smb2,
|
||||
smb2c, smb2b, smb1c, smb1b, smb8, smb9, smb10, smb11, sd1,
|
||||
sd1pwr, pwm4, pwm5, pwm6, pwm7, pwm8, pwm9, pwm10, pwm11,
|
||||
mmc8, mmc, mmcwp, mmccd, mmcrst, clkout, serirq, lpcclk,
|
||||
scipme, smi, smb6, smb7, spi1, faninx, r1, spi3, spi3cs1,
|
||||
spi3quad, spi3cs2, spi3cs3, nprd_smi, smb0b, smb0c, smb0den,
|
||||
smb0d, ddc, rg2mdio, wdog1, wdog2, smb12, smb13, spix,
|
||||
spixcs1, clkreq, hgpio0, hgpio1, hgpio2, hgpio3, hgpio4,
|
||||
hgpio5, hgpio6, hgpio7 ]
|
||||
|
||||
dependencies:
|
||||
groups: [ function ]
|
||||
function: [ groups ]
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
'^pin':
|
||||
$ref: pincfg-node.yaml#
|
||||
|
||||
properties:
|
||||
pins:
|
||||
description:
|
||||
A list of pins to configure in certain ways, such as enabling
|
||||
debouncing
|
||||
items:
|
||||
pattern: '^GPIO([0-9]|[0-9][0-9]|1[0-9][0-9]|2[0-4][0-9]|25[0-6])'
|
||||
|
||||
bias-disable: true
|
||||
|
||||
bias-pull-up: true
|
||||
|
||||
bias-pull-down: true
|
||||
|
||||
input-enable: true
|
||||
|
||||
output-low: true
|
||||
|
||||
output-high: true
|
||||
|
||||
drive-push-pull: true
|
||||
|
||||
drive-open-drain: true
|
||||
|
||||
input-debounce:
|
||||
description:
|
||||
Debouncing periods in microseconds, one period per interrupt
|
||||
bank found in the controller
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
minItems: 1
|
||||
maxItems: 4
|
||||
|
||||
slew-rate:
|
||||
description: |
|
||||
0: Low rate
|
||||
1: High rate
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
enum: [0, 1]
|
||||
|
||||
drive-strength:
|
||||
enum: [ 0, 1, 2, 4, 8, 12 ]
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
allOf:
|
||||
- $ref: pinctrl.yaml#
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- ranges
|
||||
- '#address-cells'
|
||||
- '#size-cells'
|
||||
- nuvoton,sysgcr
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
soc {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
pinctrl: pinctrl@f0010000 {
|
||||
compatible = "nuvoton,npcm845-pinctrl";
|
||||
ranges = <0x0 0x0 0xf0010000 0x8000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
nuvoton,sysgcr = <&gcr>;
|
||||
|
||||
gpio0: gpio@0 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
reg = <0x0 0xb0>;
|
||||
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
|
||||
gpio-ranges = <&pinctrl 0 0 32>;
|
||||
};
|
||||
|
||||
fanin0_pin: fanin0-mux {
|
||||
groups = "fanin0";
|
||||
function = "fanin0";
|
||||
};
|
||||
|
||||
pin34_slew: pin34-slew {
|
||||
pins = "GPIO34/I3C4_SDA";
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -43,7 +43,8 @@ patternProperties:
|
||||
"-state$":
|
||||
oneOf:
|
||||
- $ref: "#/$defs/qcom-mdm9607-tlmm-state"
|
||||
- patternProperties:
|
||||
- additionalProperties: false
|
||||
patternProperties:
|
||||
".*":
|
||||
$ref: "#/$defs/qcom-mdm9607-tlmm-state"
|
||||
|
||||
|
||||
@ -67,8 +67,8 @@ $defs:
|
||||
Specify the alternative function to be configured for the specified
|
||||
pins. Functions are only valid for gpio pins.
|
||||
enum: [ gpio, cci_i2c0, blsp_uim1, blsp_uim2, blsp_uim3, blsp_uim5,
|
||||
blsp_i2c1, blsp_i2c2, blsp_i2c3, blsp_i2c4, blsp_i2c5, blsp_spi1,
|
||||
blsp_spi2, blsp_spi3, blsp_spi5, blsp_uart1, blsp_uart2,
|
||||
blsp_i2c1, blsp_i2c2, blsp_i2c3, blsp_i2c4, blsp_i2c5, blsp_i2c6,
|
||||
blsp_spi1, blsp_spi2, blsp_spi3, blsp_spi5, blsp_uart1, blsp_uart2,
|
||||
blsp_uart3, blsp_uart4, blsp_uart5, cam_mclk0, cam_mclk1,
|
||||
gp0_clk, gp1_clk, sdc3, wlan ]
|
||||
|
||||
|
||||
@ -28,6 +28,7 @@ properties:
|
||||
gpio-controller: true
|
||||
"#gpio-cells": true
|
||||
gpio-ranges: true
|
||||
wakeup-parent: true
|
||||
|
||||
gpio-reserved-ranges:
|
||||
minItems: 1
|
||||
|
||||
@ -41,6 +41,10 @@ properties:
|
||||
gpio-ranges:
|
||||
maxItems: 1
|
||||
|
||||
gpio-reserved-ranges:
|
||||
minItems: 1
|
||||
maxItems: 88
|
||||
|
||||
gpio-line-names:
|
||||
maxItems: 175
|
||||
|
||||
|
||||
@ -0,0 +1,188 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
# Copyright 2023 Realtek Semiconductor Corporation
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/pinctrl/realtek,rtd1315e-pinctrl.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Realtek DHC RTD1315E Pin Controller
|
||||
|
||||
maintainers:
|
||||
- TY Chang <tychang@realtek.com>
|
||||
|
||||
description:
|
||||
The Realtek DHC RTD1315E is a high-definition media processor SoC. The
|
||||
RTD1315E pin controller is used to control pin function, pull up/down
|
||||
resistor, drive strength, schmitt trigger and power source.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: realtek,rtd1315e-pinctrl
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
patternProperties:
|
||||
'-pins$':
|
||||
type: object
|
||||
allOf:
|
||||
- $ref: pincfg-node.yaml#
|
||||
- $ref: pinmux-node.yaml#
|
||||
|
||||
properties:
|
||||
pins:
|
||||
items:
|
||||
enum: [ gpio_0, gpio_1, emmc_rst_n, emmc_dd_sb, emmc_clk, emmc_cmd,
|
||||
gpio_6, gpio_7, gpio_8, gpio_9, gpio_10, gpio_11, gpio_12,
|
||||
gpio_13, gpio_14, gpio_15, gpio_16, gpio_17, gpio_18, gpio_19,
|
||||
gpio_20, emmc_data_0, emmc_data_1, emmc_data_2, usb_cc2, gpio_25,
|
||||
gpio_26, gpio_27, gpio_28, gpio_29, gpio_30, gpio_31, gpio_32,
|
||||
gpio_33, gpio_34, gpio_35, hif_data, hif_en, hif_rdy, hif_clk,
|
||||
gpio_dummy_40, gpio_dummy_41, gpio_dummy_42, gpio_dummy_43,
|
||||
gpio_dummy_44, gpio_dummy_45, gpio_46, gpio_47, gpio_48, gpio_49,
|
||||
gpio_50, usb_cc1, emmc_data_3, emmc_data_4, ir_rx, ur0_rx, ur0_tx,
|
||||
gpio_57, gpio_58, gpio_59, gpio_60, gpio_61, gpio_62, gpio_dummy_63,
|
||||
gpio_dummy_64, gpio_dummy_65, gpio_66, gpio_67, gpio_68, gpio_69,
|
||||
gpio_70, gpio_71, gpio_72, gpio_dummy_73, emmc_data_5, emmc_data_6,
|
||||
emmc_data_7, gpio_dummy_77, gpio_78, gpio_79, gpio_80, gpio_81,
|
||||
ur2_loc, gspi_loc, hi_width, sf_en, arm_trace_dbg_en,
|
||||
ejtag_aucpu_loc, ejtag_acpu_loc, ejtag_vcpu_loc, ejtag_scpu_loc,
|
||||
dmic_loc, vtc_dmic_loc, vtc_tdm_loc, vtc_i2si_loc, tdm_ai_loc,
|
||||
ai_loc, spdif_loc, hif_en_loc, scan_switch, wd_rset, boot_sel,
|
||||
reset_n, testmode ]
|
||||
|
||||
function:
|
||||
enum: [ gpio, nf, emmc, ao, gspi_loc0, gspi_loc1, uart0, uart1,
|
||||
uart2_loc0, uart2_loc1, i2c0, i2c1, i2c4, i2c5, pcie1,
|
||||
etn_led, etn_phy, spi, pwm0_loc0, pwm0_loc1, pwm1_loc0,
|
||||
pwm1_loc1, pwm2_loc0, pwm2_loc1, pwm3_loc0, pwm3_loc1,
|
||||
spdif_optical_loc0, spdif_optical_loc1, usb_cc1, usb_cc2,
|
||||
sd, dmic_loc0, dmic_loc1, ai_loc0, ai_loc1, tdm_ai_loc0,
|
||||
tdm_ai_loc1, hi_loc0, hi_m, vtc_i2so, vtc_i2si_loc0,
|
||||
vtc_i2si_loc1, vtc_dmic_loc0, vtc_dmic_loc1, vtc_tdm_loc0,
|
||||
vtc_tdm_loc1, dc_fan, pll_test_loc0, pll_test_loc1,
|
||||
ir_rx, uart2_disable, gspi_disable, hi_width_disable,
|
||||
hi_width_1bit, sf_disable, sf_enable, scpu_ejtag_loc0,
|
||||
scpu_ejtag_loc1, scpu_ejtag_loc2, scpu_ejtag_loc3,
|
||||
acpu_ejtag_loc0, acpu_ejtag_loc1, acpu_ejtag_loc2,
|
||||
vcpu_ejtag_loc0, vcpu_ejtag_loc1, vcpu_ejtag_loc2,
|
||||
aucpu_ejtag_loc0, aucpu_ejtag_loc1, aucpu_ejtag_loc2,
|
||||
gpu_ejtag, iso_tristate, dbg_out0, dbg_out1, standby_dbg,
|
||||
spdif, arm_trace_debug_disable, arm_trace_debug_enable,
|
||||
aucpu_ejtag_disable, acpu_ejtag_disable, vcpu_ejtag_disable,
|
||||
scpu_ejtag_disable, vtc_dmic_loc_disable, vtc_tdm_disable,
|
||||
vtc_i2si_disable, tdm_ai_disable, ai_disable, spdif_disable,
|
||||
hif_disable, hif_enable, test_loop, pmic_pwrup ]
|
||||
|
||||
drive-strength:
|
||||
enum: [4, 8]
|
||||
|
||||
bias-pull-down: true
|
||||
|
||||
bias-pull-up: true
|
||||
|
||||
bias-disable: true
|
||||
|
||||
input-schmitt-enable: true
|
||||
|
||||
input-schmitt-disable: true
|
||||
|
||||
drive-push-pull: true
|
||||
|
||||
power-source:
|
||||
description: |
|
||||
Valid arguments are described as below:
|
||||
0: power supply of 1.8V
|
||||
1: power supply of 3.3V
|
||||
enum: [0, 1]
|
||||
|
||||
realtek,drive-strength-p:
|
||||
description: |
|
||||
Some of pins can be driven using the P-MOS and N-MOS transistor to
|
||||
achieve finer adjustments. The block-diagram representation is as
|
||||
follows:
|
||||
VDD
|
||||
|
|
||||
||--+
|
||||
+-----o|| P-MOS-FET
|
||||
| ||--+
|
||||
IN --+ +----- out
|
||||
| ||--+
|
||||
+------|| N-MOS-FET
|
||||
||--+
|
||||
|
|
||||
GND
|
||||
The driving strength of the P-MOS/N-MOS transistors impacts the
|
||||
waveform's rise/fall times. Greater driving strength results in
|
||||
shorter rise/fall times. Each P-MOS and N-MOS transistor offers
|
||||
8 configurable levels (0 to 7), with higher values indicating
|
||||
greater driving strength, contributing to achieving the desired
|
||||
speed.
|
||||
|
||||
The realtek,drive-strength-p is used to control the driving strength
|
||||
of the P-MOS output.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
minimum: 0
|
||||
maximum: 7
|
||||
|
||||
realtek,drive-strength-n:
|
||||
description: |
|
||||
Similar to the realtek,drive-strength-p, the realtek,drive-strength-n
|
||||
is used to control the driving strength of the N-MOS output.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
minimum: 0
|
||||
maximum: 7
|
||||
|
||||
realtek,duty-cycle:
|
||||
description: |
|
||||
An integer describing the level to adjust output duty cycle, controlling
|
||||
the proportion of positive and negative waveforms in nanoseconds.
|
||||
Valid arguments are described as below:
|
||||
0: 0ns
|
||||
2: + 0.25ns
|
||||
3: + 0.5ns
|
||||
4: -0.25ns
|
||||
5: -0.5ns
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
enum: [ 0, 2, 3, 4, 5 ]
|
||||
|
||||
required:
|
||||
- pins
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
pinctrl@4e000 {
|
||||
compatible = "realtek,rtd1315e-pinctrl";
|
||||
reg = <0x4e000 0x130>;
|
||||
|
||||
emmc-hs200-pins {
|
||||
pins = "emmc_clk",
|
||||
"emmc_cmd",
|
||||
"emmc_data_0",
|
||||
"emmc_data_1",
|
||||
"emmc_data_2",
|
||||
"emmc_data_3",
|
||||
"emmc_data_4",
|
||||
"emmc_data_5",
|
||||
"emmc_data_6",
|
||||
"emmc_data_7";
|
||||
function = "emmc";
|
||||
realtek,drive-strength-p = <0x2>;
|
||||
realtek,drive-strength-n = <0x2>;
|
||||
};
|
||||
|
||||
i2c-0-pins {
|
||||
pins = "gpio_12",
|
||||
"gpio_13";
|
||||
function = "i2c0";
|
||||
drive-strength = <4>;
|
||||
};
|
||||
};
|
||||
@ -0,0 +1,187 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
# Copyright 2023 Realtek Semiconductor Corporation
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/pinctrl/realtek,rtd1319d-pinctrl.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Realtek DHC RTD1319D Pin Controller
|
||||
|
||||
maintainers:
|
||||
- TY Chang <tychang@realtek.com>
|
||||
|
||||
description:
|
||||
The Realtek DHC RTD1319D is a high-definition media processor SoC. The
|
||||
RTD1319D pin controller is used to control pin function, pull up/down
|
||||
resistor, drive strength, schmitt trigger and power source.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: realtek,rtd1319d-pinctrl
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
patternProperties:
|
||||
'-pins$':
|
||||
type: object
|
||||
allOf:
|
||||
- $ref: pincfg-node.yaml#
|
||||
- $ref: pinmux-node.yaml#
|
||||
|
||||
properties:
|
||||
pins:
|
||||
items:
|
||||
enum: [ gpio_0, gpio_1, gpio_2, gpio_3, gpio_4, gpio_5, gpio_6, gpio_7,
|
||||
gpio_8, gpio_9, gpio_10, gpio_11, gpio_12, gpio_13, gpio_14,
|
||||
gpio_15, gpio_16, gpio_17, gpio_18, gpio_19, gpio_20, gpio_21,
|
||||
gpio_22, gpio_23, usb_cc2, gpio_25, gpio_26, gpio_27, gpio_28,
|
||||
gpio_29, gpio_30, gpio_31, gpio_32, gpio_33, gpio_34, gpio_35,
|
||||
hif_data, hif_en, hif_rdy, hif_clk, gpio_40, gpio_41, gpio_42,
|
||||
gpio_43, gpio_44, gpio_45, gpio_46, gpio_47, gpio_48, gpio_49,
|
||||
gpio_50, usb_cc1, gpio_52, gpio_53, ir_rx, ur0_rx, ur0_tx,
|
||||
gpio_57, gpio_58, gpio_59, gpio_60, gpio_61, gpio_62, gpio_63,
|
||||
gpio_64, emmc_rst_n, emmc_dd_sb, emmc_clk, emmc_cmd, emmc_data_0,
|
||||
emmc_data_1, emmc_data_2, emmc_data_3, emmc_data_4, emmc_data_5,
|
||||
emmc_data_6, emmc_data_7, dummy, gpio_78, gpio_79, gpio_80,
|
||||
gpio_81, ur2_loc, gspi_loc, hi_width, sf_en, arm_trace_dbg_en,
|
||||
ejtag_aucpu_loc, ejtag_acpu_loc, ejtag_vcpu_loc, ejtag_scpu_loc,
|
||||
dmic_loc, ejtag_secpu_loc, vtc_dmic_loc, vtc_tdm_loc, vtc_i2si_loc,
|
||||
tdm_ai_loc, ai_loc, spdif_loc, hif_en_loc, sc0_loc, sc1_loc,
|
||||
scan_switch, wd_rset, boot_sel, reset_n, testmode ]
|
||||
|
||||
function:
|
||||
enum: [ gpio, nf, emmc, tp0, tp1, sc0, sc0_data0, sc0_data1, sc0_data2,
|
||||
sc1, sc1_data0, sc1_data1, sc1_data2, ao, gspi_loc0, gspi_loc1,
|
||||
uart0, uart1, uart2_loc0, uart2_loc1, i2c0, i2c1, i2c3, i2c4,
|
||||
i2c5, pcie1, sdio, etn_led, etn_phy, spi, pwm0_loc0, pwm0_loc1,
|
||||
pwm1_loc0, pwm1_loc1, pwm2_loc0, pwm2_loc1, pwm3_loc0, pwm3_loc1,
|
||||
qam_agc_if0, qam_agc_if1, spdif_optical_loc0, spdif_optical_loc1,
|
||||
usb_cc1, usb_cc2, vfd, sd, dmic_loc0, dmic_loc1, ai_loc0, ai_loc1,
|
||||
tdm_ai_loc0, tdm_ai_loc1, hi_loc0, hi_m, vtc_i2so, vtc_i2si_loc0,
|
||||
vtc_i2si_loc1, vtc_dmic_loc0, vtc_dmic_loc1, vtc_tdm_loc0,
|
||||
vtc_tdm_loc1, dc_fan, pll_test_loc0, pll_test_loc1, ir_rx,
|
||||
uart2_disable, gspi_disable, hi_width_disable, hi_width_1bit,
|
||||
sf_disable, sf_enable, scpu_ejtag_loc0, scpu_ejtag_loc1,
|
||||
scpu_ejtag_loc2, acpu_ejtag_loc0, acpu_ejtag_loc1, acpu_ejtag_loc2,
|
||||
vcpu_ejtag_loc0, vcpu_ejtag_loc1, vcpu_ejtag_loc2, secpu_ejtag_loc0,
|
||||
secpu_ejtag_loc1, secpu_ejtag_loc2, aucpu_ejtag_loc0, aucpu_ejtag_loc1,
|
||||
aucpu_ejtag_loc2, iso_tristate, dbg_out0, dbg_out1, standby_dbg,
|
||||
spdif, arm_trace_debug_disable, arm_trace_debug_enable,
|
||||
aucpu_ejtag_disable, acpu_ejtag_disable, vcpu_ejtag_disable,
|
||||
scpu_ejtag_disable, secpu_ejtag_disable, vtc_dmic_loc_disable,
|
||||
vtc_tdm_disable, vtc_i2si_disable, tdm_ai_disable, ai_disable,
|
||||
spdif_disable, hif_disable, hif_enable, test_loop, pmic_pwrup ]
|
||||
|
||||
drive-strength:
|
||||
enum: [4, 8]
|
||||
|
||||
bias-pull-down: true
|
||||
|
||||
bias-pull-up: true
|
||||
|
||||
bias-disable: true
|
||||
|
||||
input-schmitt-enable: true
|
||||
|
||||
input-schmitt-disable: true
|
||||
|
||||
drive-push-pull: true
|
||||
|
||||
power-source:
|
||||
description: |
|
||||
Valid arguments are described as below:
|
||||
0: power supply of 1.8V
|
||||
1: power supply of 3.3V
|
||||
enum: [0, 1]
|
||||
|
||||
realtek,drive-strength-p:
|
||||
description: |
|
||||
Some of pins can be driven using the P-MOS and N-MOS transistor to
|
||||
achieve finer adjustments. The block-diagram representation is as
|
||||
follows:
|
||||
VDD
|
||||
|
|
||||
||--+
|
||||
+-----o|| P-MOS-FET
|
||||
| ||--+
|
||||
IN --+ +----- out
|
||||
| ||--+
|
||||
+------|| N-MOS-FET
|
||||
||--+
|
||||
|
|
||||
GND
|
||||
The driving strength of the P-MOS/N-MOS transistors impacts the
|
||||
waveform's rise/fall times. Greater driving strength results in
|
||||
shorter rise/fall times. Each P-MOS and N-MOS transistor offers
|
||||
8 configurable levels (0 to 7), with higher values indicating
|
||||
greater driving strength, contributing to achieving the desired
|
||||
speed.
|
||||
|
||||
The realtek,drive-strength-p is used to control the driving strength
|
||||
of the P-MOS output.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
minimum: 0
|
||||
maximum: 7
|
||||
|
||||
realtek,drive-strength-n:
|
||||
description: |
|
||||
Similar to the realtek,drive-strength-p, the realtek,drive-strength-n
|
||||
is used to control the driving strength of the N-MOS output.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
minimum: 0
|
||||
maximum: 7
|
||||
|
||||
realtek,duty-cycle:
|
||||
description: |
|
||||
An integer describing the level to adjust output duty cycle, controlling
|
||||
the proportion of positive and negative waveforms in nanoseconds.
|
||||
Valid arguments are described as below:
|
||||
0: 0ns
|
||||
2: + 0.25ns
|
||||
3: + 0.5ns
|
||||
4: -0.25ns
|
||||
5: -0.5ns
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
enum: [ 0, 2, 3, 4, 5 ]
|
||||
|
||||
required:
|
||||
- pins
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
pinctrl@4e000 {
|
||||
compatible = "realtek,rtd1319d-pinctrl";
|
||||
reg = <0x4e000 0x130>;
|
||||
|
||||
emmc-hs200-pins {
|
||||
pins = "emmc_clk",
|
||||
"emmc_cmd",
|
||||
"emmc_data_0",
|
||||
"emmc_data_1",
|
||||
"emmc_data_2",
|
||||
"emmc_data_3",
|
||||
"emmc_data_4",
|
||||
"emmc_data_5",
|
||||
"emmc_data_6",
|
||||
"emmc_data_7";
|
||||
function = "emmc";
|
||||
realtek,drive-strength-p = <0x2>;
|
||||
realtek,drive-strength-n = <0x2>;
|
||||
};
|
||||
|
||||
i2c-0-pins {
|
||||
pins = "gpio_12",
|
||||
"gpio_13";
|
||||
function = "i2c0";
|
||||
drive-strength = <4>;
|
||||
};
|
||||
};
|
||||
@ -0,0 +1,186 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
# Copyright 2023 Realtek Semiconductor Corporation
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/pinctrl/realtek,rtd1619b-pinctrl.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Realtek DHC RTD1619B Pin Controller
|
||||
|
||||
maintainers:
|
||||
- TY Chang <tychang@realtek.com>
|
||||
|
||||
description:
|
||||
The Realtek DHC RTD1619B is a high-definition media processor SoC. The
|
||||
RTD1619B pin controller is used to control pin function, pull up/down
|
||||
resistor, drive strength, schmitt trigger and power source.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: realtek,rtd1619b-pinctrl
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
patternProperties:
|
||||
'-pins$':
|
||||
type: object
|
||||
allOf:
|
||||
- $ref: pincfg-node.yaml#
|
||||
- $ref: pinmux-node.yaml#
|
||||
|
||||
properties:
|
||||
pins:
|
||||
items:
|
||||
enum: [ gpio_0, gpio_1, gpio_2, gpio_3, gpio_4, gpio_5, gpio_6, gpio_7,
|
||||
gpio_8, gpio_9, gpio_10, gpio_11, gpio_12, gpio_13, gpio_14,
|
||||
gpio_15, gpio_16, gpio_17, gpio_18, gpio_19, gpio_20, gpio_21,
|
||||
gpio_22, gpio_23, usb_cc2, gpio_25, gpio_26, gpio_27, gpio_28,
|
||||
gpio_29, gpio_30, gpio_31, gpio_32, gpio_33, gpio_34, gpio_35,
|
||||
hif_data, hif_en, hif_rdy, hif_clk, gpio_40, gpio_41, gpio_42,
|
||||
gpio_43, gpio_44, gpio_45, gpio_46, gpio_47, gpio_48, gpio_49,
|
||||
gpio_50, usb_cc1, gpio_52, gpio_53, ir_rx, ur0_rx, ur0_tx,
|
||||
gpio_57, gpio_58, gpio_59, gpio_60, gpio_61, gpio_62, gpio_63,
|
||||
gpio_64, gpio_65, gpio_66, gpio_67, gpio_68, gpio_69, gpio_70,
|
||||
gpio_71, gpio_72, gpio_73, gpio_74, gpio_75, gpio_76, emmc_cmd,
|
||||
spi_ce_n, spi_sck, spi_so, spi_si, emmc_rst_n, emmc_dd_sb,
|
||||
emmc_clk, emmc_data_0, emmc_data_1, emmc_data_2, emmc_data_3,
|
||||
emmc_data_4, emmc_data_5, emmc_data_6, emmc_data_7, ur2_loc,
|
||||
gspi_loc, sdio_loc, hi_loc, hi_width, sf_en, arm_trace_dbg_en,
|
||||
pwm_01_open_drain_en_loc0, pwm_23_open_drain_en_loc0,
|
||||
pwm_01_open_drain_en_loc1, pwm_23_open_drain_en_loc1,
|
||||
ejtag_acpu_loc, ejtag_vcpu_loc, ejtag_scpu_loc, dmic_loc,
|
||||
iso_gspi_loc, ejtag_ve3_loc, ejtag_aucpu0_loc, ejtag_aucpu1_loc ]
|
||||
|
||||
function:
|
||||
enum: [ gpio, nf, nf_spi, spi, pmic, spdif, spdif_coaxial, spdif_optical_loc0,
|
||||
spdif_optical_loc1, emmc_spi, emmc, sc1, uart0, uart1, uart2_loc0, uart2_loc1,
|
||||
gspi_loc1, iso_gspi_loc1, i2c0, i2c1, i2c3, i2c4, i2c5, pwm0, pwm1, pwm2,
|
||||
pwm3, etn_led, etn_phy, etn_clk, sc0, vfd, gspi_loc0, iso_gspi_loc0, pcie1,
|
||||
pcie2, sd, sdio_loc0, sdio_loc1, hi, hi_m, dc_fan, pll_test_loc0, pll_test_loc1,
|
||||
usb_cc1, usb_cc2, ir_rx, tdm_ai_loc0, tdm_ai_loc1, dmic_loc0, dmic_loc1,
|
||||
ai_loc0, ai_loc1, tp0, tp1, ao, uart2_disable, gspi_disable, sdio_disable,
|
||||
hi_loc_disable, hi_loc0, hi_width_disable, hi_width_1bit, vtc_i2si_loc0,
|
||||
vtc_tdm_loc0, vtc_dmic_loc0, vtc_i2si_loc1, vtc_tdm_loc1, vtc_dmic_loc1,
|
||||
vtc_i2so, ve3_ejtag_loc0, aucpu0_ejtag_loc0, aucpu1_ejtag_loc0, ve3_ejtag_loc1,
|
||||
aucpu0_ejtag_loc1, aucpu1_ejtag_loc1, ve3_ejtag_loc2, aucpu0_ejtag_loc2,
|
||||
aucpu1_ejtag_loc2, scpu_ejtag_loc0, acpu_ejtag_loc0, vcpu_ejtag_loc0,
|
||||
scpu_ejtag_loc1, acpu_ejtag_loc1, vcpu_ejtag_loc1, scpu_ejtag_loc2,
|
||||
acpu_ejtag_loc2, vcpu_ejtag_loc2, ve3_ejtag_disable, aucpu0_ejtag_disable,
|
||||
aucpu1_ejtag_disable, acpu_ejtag_disable, vcpu_ejtag_disable,
|
||||
scpu_ejtag_disable, iso_gspi_disable, sf_disable, sf_enable,
|
||||
arm_trace_debug_disable, arm_trace_debug_enable, pwm_normal, pwm_open_drain,
|
||||
standby_dbg, test_loop_dis ]
|
||||
|
||||
drive-strength:
|
||||
enum: [4, 8]
|
||||
|
||||
bias-pull-down: true
|
||||
|
||||
bias-pull-up: true
|
||||
|
||||
bias-disable: true
|
||||
|
||||
input-schmitt-enable: true
|
||||
|
||||
input-schmitt-disable: true
|
||||
|
||||
drive-push-pull: true
|
||||
|
||||
power-source:
|
||||
description: |
|
||||
Valid arguments are described as below:
|
||||
0: power supply of 1.8V
|
||||
1: power supply of 3.3V
|
||||
enum: [0, 1]
|
||||
|
||||
realtek,drive-strength-p:
|
||||
description: |
|
||||
Some of pins can be driven using the P-MOS and N-MOS transistor to
|
||||
achieve finer adjustments. The block-diagram representation is as
|
||||
follows:
|
||||
VDD
|
||||
|
|
||||
||--+
|
||||
+-----o|| P-MOS-FET
|
||||
| ||--+
|
||||
IN --+ +----- out
|
||||
| ||--+
|
||||
+------|| N-MOS-FET
|
||||
||--+
|
||||
|
|
||||
GND
|
||||
The driving strength of the P-MOS/N-MOS transistors impacts the
|
||||
waveform's rise/fall times. Greater driving strength results in
|
||||
shorter rise/fall times. Each P-MOS and N-MOS transistor offers
|
||||
8 configurable levels (0 to 7), with higher values indicating
|
||||
greater driving strength, contributing to achieving the desired
|
||||
speed.
|
||||
|
||||
The realtek,drive-strength-p is used to control the driving strength
|
||||
of the P-MOS output.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
minimum: 0
|
||||
maximum: 7
|
||||
|
||||
realtek,drive-strength-n:
|
||||
description: |
|
||||
Similar to the realtek,drive-strength-p, the realtek,drive-strength-n
|
||||
is used to control the driving strength of the N-MOS output.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
minimum: 0
|
||||
maximum: 7
|
||||
|
||||
realtek,duty-cycle:
|
||||
description: |
|
||||
An integer describing the level to adjust output duty cycle, controlling
|
||||
the proportion of positive and negative waveforms in nanoseconds.
|
||||
Valid arguments are described as below:
|
||||
0: 0ns
|
||||
2: + 0.25ns
|
||||
3: + 0.5ns
|
||||
4: -0.25ns
|
||||
5: -0.5ns
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
enum: [ 0, 2, 3, 4, 5 ]
|
||||
|
||||
required:
|
||||
- pins
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
pinctrl@4e000 {
|
||||
compatible = "realtek,rtd1619b-pinctrl";
|
||||
reg = <0x4e000 0x130>;
|
||||
|
||||
emmc-hs200-pins {
|
||||
pins = "emmc_clk",
|
||||
"emmc_cmd",
|
||||
"emmc_data_0",
|
||||
"emmc_data_1",
|
||||
"emmc_data_2",
|
||||
"emmc_data_3",
|
||||
"emmc_data_4",
|
||||
"emmc_data_5",
|
||||
"emmc_data_6",
|
||||
"emmc_data_7";
|
||||
function = "emmc";
|
||||
realtek,drive-strength-p = <0x2>;
|
||||
realtek,drive-strength-n = <0x2>;
|
||||
};
|
||||
|
||||
i2c-0-pins {
|
||||
pins = "gpio_12",
|
||||
"gpio_13";
|
||||
function = "i2c0";
|
||||
drive-strength = <4>;
|
||||
};
|
||||
};
|
||||
@ -25,6 +25,7 @@ properties:
|
||||
- enum:
|
||||
- renesas,r9a07g043-pinctrl # RZ/G2UL{Type-1,Type-2} and RZ/Five
|
||||
- renesas,r9a07g044-pinctrl # RZ/G2{L,LC}
|
||||
- renesas,r9a08g045-pinctrl # RZ/G3S
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
@ -73,10 +74,26 @@ properties:
|
||||
additionalProperties:
|
||||
anyOf:
|
||||
- type: object
|
||||
additionalProperties: false
|
||||
allOf:
|
||||
- $ref: pincfg-node.yaml#
|
||||
- $ref: pinmux-node.yaml#
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- renesas,r9a08g045-pinctrl
|
||||
then:
|
||||
properties:
|
||||
drive-strength: false
|
||||
output-impedance-ohms: false
|
||||
slew-rate: false
|
||||
else:
|
||||
properties:
|
||||
drive-strength-microamp: false
|
||||
|
||||
description:
|
||||
Pin controller client devices use pin configuration subnodes (children
|
||||
and grandchildren) for desired pin configuration.
|
||||
@ -91,6 +108,10 @@ additionalProperties:
|
||||
pins: true
|
||||
drive-strength:
|
||||
enum: [ 2, 4, 8, 12 ]
|
||||
drive-strength-microamp:
|
||||
enum: [ 1900, 2200, 4000, 4400, 4500, 4700, 5200, 5300, 5700,
|
||||
5800, 6000, 6050, 6100, 6550, 6800, 7000, 8000, 9000,
|
||||
10000 ]
|
||||
output-impedance-ohms:
|
||||
enum: [ 33, 50, 66, 100 ]
|
||||
power-source:
|
||||
|
||||
@ -53,6 +53,7 @@ properties:
|
||||
additionalProperties:
|
||||
anyOf:
|
||||
- type: object
|
||||
additionalProperties: false
|
||||
allOf:
|
||||
- $ref: pincfg-node.yaml#
|
||||
- $ref: pinmux-node.yaml#
|
||||
|
||||
@ -115,6 +115,8 @@ additionalProperties:
|
||||
type: object
|
||||
additionalProperties:
|
||||
type: object
|
||||
additionalProperties: false
|
||||
|
||||
properties:
|
||||
rockchip,pins:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-matrix
|
||||
|
||||
@ -48,7 +48,8 @@ properties:
|
||||
description: Phandle+args to the syscon node which includes IRQ mux selection.
|
||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||
items:
|
||||
- items:
|
||||
- minItems: 2
|
||||
items:
|
||||
- description: syscon node which includes IRQ mux selection
|
||||
- description: The offset of the IRQ mux selection register
|
||||
- description: The field mask of IRQ mux, needed if different of 0xf
|
||||
|
||||
@ -242,6 +242,17 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
blsp1_uart2: serial@f991e000 {
|
||||
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
|
||||
reg = <0xf991e000 0x1000>;
|
||||
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>,
|
||||
<&gcc GCC_BLSP1_AHB_CLK>;
|
||||
clock-names = "core",
|
||||
"iface";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
blsp1_uart3: serial@f991f000 {
|
||||
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
|
||||
reg = <0xf991f000 0x1000>;
|
||||
@ -325,6 +336,21 @@
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
blsp1_i2c6: i2c@f9928000 {
|
||||
compatible = "qcom,i2c-qup-v2.1.1";
|
||||
reg = <0xf9928000 0x1000>;
|
||||
interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>,
|
||||
<&gcc GCC_BLSP1_AHB_CLK>;
|
||||
clock-names = "core",
|
||||
"iface";
|
||||
pinctrl-0 = <&blsp1_i2c6_pins>;
|
||||
pinctrl-names = "default";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
cci: cci@fda0c000 {
|
||||
compatible = "qcom,msm8226-cci";
|
||||
#address-cells = <1>;
|
||||
@ -472,6 +498,13 @@
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
blsp1_i2c6_pins: blsp1-i2c6-state {
|
||||
pins = "gpio22", "gpio23";
|
||||
function = "blsp_i2c6";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
cci_default: cci-default-state {
|
||||
pins = "gpio29", "gpio30";
|
||||
function = "cci_i2c0";
|
||||
|
||||
@ -520,6 +520,7 @@ source "drivers/pinctrl/nuvoton/Kconfig"
|
||||
source "drivers/pinctrl/nxp/Kconfig"
|
||||
source "drivers/pinctrl/pxa/Kconfig"
|
||||
source "drivers/pinctrl/qcom/Kconfig"
|
||||
source "drivers/pinctrl/realtek/Kconfig"
|
||||
source "drivers/pinctrl/renesas/Kconfig"
|
||||
source "drivers/pinctrl/samsung/Kconfig"
|
||||
source "drivers/pinctrl/spear/Kconfig"
|
||||
|
||||
@ -66,6 +66,7 @@ obj-y += nuvoton/
|
||||
obj-y += nxp/
|
||||
obj-$(CONFIG_PINCTRL_PXA) += pxa/
|
||||
obj-y += qcom/
|
||||
obj-$(CONFIG_ARCH_REALTEK) += realtek/
|
||||
obj-$(CONFIG_PINCTRL_RENESAS) += renesas/
|
||||
obj-$(CONFIG_PINCTRL_SAMSUNG) += samsung/
|
||||
obj-$(CONFIG_PINCTRL_SPEAR) += spear/
|
||||
|
||||
@ -2563,15 +2563,20 @@ static int aspeed_g4_sig_expr_set(struct aspeed_pinmux_data *ctx,
|
||||
* deconfigured and is the reason we re-evaluate after writing
|
||||
* all descriptor bits.
|
||||
*
|
||||
* Port D and port E GPIO loopback modes are the only exception
|
||||
* as those are commonly used with front-panel buttons to allow
|
||||
* normal operation of the host when the BMC is powered off or
|
||||
* fails to boot. Once the BMC has booted, the loopback mode
|
||||
* must be disabled for the BMC to control host power-on and
|
||||
* reset.
|
||||
* We make two exceptions to the read-only rule:
|
||||
*
|
||||
* - The passthrough mode of GPIO ports D and E are commonly
|
||||
* used with front-panel buttons to allow normal operation
|
||||
* of the host if the BMC is powered off or fails to boot.
|
||||
* Once the BMC has booted, the loopback mode must be
|
||||
* disabled for the BMC to control host power-on and reset.
|
||||
*
|
||||
* - The operating mode of the SPI1 interface is simply
|
||||
* strapped incorrectly on some systems and requires a
|
||||
* software fixup, which we allow to be done via pinctrl.
|
||||
*/
|
||||
if (desc->ip == ASPEED_IP_SCU && desc->reg == HW_STRAP1 &&
|
||||
!(desc->mask & (BIT(21) | BIT(22))))
|
||||
!(desc->mask & (BIT(22) | BIT(21) | BIT(13) | BIT(12))))
|
||||
continue;
|
||||
|
||||
if (desc->ip == ASPEED_IP_SCU && desc->reg == HW_STRAP2)
|
||||
|
||||
@ -2742,15 +2742,20 @@ static int aspeed_g5_sig_expr_set(struct aspeed_pinmux_data *ctx,
|
||||
* deconfigured and is the reason we re-evaluate after writing
|
||||
* all descriptor bits.
|
||||
*
|
||||
* Port D and port E GPIO loopback modes are the only exception
|
||||
* as those are commonly used with front-panel buttons to allow
|
||||
* normal operation of the host when the BMC is powered off or
|
||||
* fails to boot. Once the BMC has booted, the loopback mode
|
||||
* must be disabled for the BMC to control host power-on and
|
||||
* reset.
|
||||
* We make two exceptions to the read-only rule:
|
||||
*
|
||||
* - The passthrough mode of GPIO ports D and E are commonly
|
||||
* used with front-panel buttons to allow normal operation
|
||||
* of the host if the BMC is powered off or fails to boot.
|
||||
* Once the BMC has booted, the loopback mode must be
|
||||
* disabled for the BMC to control host power-on and reset.
|
||||
*
|
||||
* - The operating mode of the SPI1 interface is simply
|
||||
* strapped incorrectly on some systems and requires a
|
||||
* software fixup, which we allow to be done via pinctrl.
|
||||
*/
|
||||
if (desc->ip == ASPEED_IP_SCU && desc->reg == HW_STRAP1 &&
|
||||
!(desc->mask & (BIT(21) | BIT(22))))
|
||||
!(desc->mask & (BIT(22) | BIT(21) | BIT(13) | BIT(12))))
|
||||
continue;
|
||||
|
||||
if (desc->ip == ASPEED_IP_SCU && desc->reg == HW_STRAP2)
|
||||
|
||||
@ -1592,9 +1592,10 @@ SIG_EXPR_LIST_DECL_SEMG(A4, USB2ADPDP, USBA, USB2ADP, USB2ADP_DESC,
|
||||
SIG_DESC_SET(SCUC20, 16));
|
||||
SIG_EXPR_LIST_DECL_SEMG(A4, USB2ADDP, USBA, USB2AD, USB2AD_DESC);
|
||||
SIG_EXPR_LIST_DECL_SEMG(A4, USB2AHDP, USBA, USB2AH, USB2AH_DESC);
|
||||
SIG_EXPR_LIST_DECL_SEMG(A4, USB2AHPDP, USBA, USB2AHP, USB2AHP_DESC);
|
||||
SIG_EXPR_LIST_DECL_SEMG(A4, USB2AHPDP, USBA, USB2AHP, USB2AHP_DESC,
|
||||
SIG_DESC_SET(SCUC20, 16));
|
||||
PIN_DECL_(A4, SIG_EXPR_LIST_PTR(A4, USB2ADPDP), SIG_EXPR_LIST_PTR(A4, USB2ADDP),
|
||||
SIG_EXPR_LIST_PTR(A4, USB2AHDP));
|
||||
SIG_EXPR_LIST_PTR(A4, USB2AHDP), SIG_EXPR_LIST_PTR(A4, USB2AHPDP));
|
||||
|
||||
#define B4 253
|
||||
SIG_EXPR_LIST_DECL_SEMG(B4, USB2ADPDN, USBA, USB2ADP, USB2ADP_DESC);
|
||||
@ -1602,7 +1603,7 @@ SIG_EXPR_LIST_DECL_SEMG(B4, USB2ADDN, USBA, USB2AD, USB2AD_DESC);
|
||||
SIG_EXPR_LIST_DECL_SEMG(B4, USB2AHDN, USBA, USB2AH, USB2AH_DESC);
|
||||
SIG_EXPR_LIST_DECL_SEMG(B4, USB2AHPDN, USBA, USB2AHP, USB2AHP_DESC);
|
||||
PIN_DECL_(B4, SIG_EXPR_LIST_PTR(B4, USB2ADPDN), SIG_EXPR_LIST_PTR(B4, USB2ADDN),
|
||||
SIG_EXPR_LIST_PTR(B4, USB2AHDN));
|
||||
SIG_EXPR_LIST_PTR(B4, USB2AHDN), SIG_EXPR_LIST_PTR(B4, USB2AHPDN));
|
||||
|
||||
GROUP_DECL(USBA, A4, B4);
|
||||
|
||||
|
||||
@ -7,11 +7,11 @@
|
||||
#include <linux/io.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <linux/pinctrl/pinconf-generic.h>
|
||||
#include <linux/pinctrl/pinctrl.h>
|
||||
#include <linux/pinctrl/pinmux.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/property.h>
|
||||
#include <linux/slab.h>
|
||||
|
||||
#include "../core.h"
|
||||
@ -208,7 +208,6 @@ static const struct of_device_id ns_pinctrl_of_match_table[] = {
|
||||
static int ns_pinctrl_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct device *dev = &pdev->dev;
|
||||
const struct of_device_id *of_id;
|
||||
struct ns_pinctrl *ns_pinctrl;
|
||||
struct pinctrl_desc *pctldesc;
|
||||
struct pinctrl_pin_desc *pin;
|
||||
@ -225,10 +224,7 @@ static int ns_pinctrl_probe(struct platform_device *pdev)
|
||||
|
||||
ns_pinctrl->dev = dev;
|
||||
|
||||
of_id = of_match_device(ns_pinctrl_of_match_table, dev);
|
||||
if (!of_id)
|
||||
return -EINVAL;
|
||||
ns_pinctrl->chipset_flag = (uintptr_t)of_id->data;
|
||||
ns_pinctrl->chipset_flag = (uintptr_t)device_get_match_data(dev);
|
||||
|
||||
res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
|
||||
"cru_gpio_control");
|
||||
|
||||
@ -8,8 +8,9 @@
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/property.h>
|
||||
#include <linux/regmap.h>
|
||||
|
||||
#include "berlin.h"
|
||||
@ -227,10 +228,7 @@ static const struct of_device_id berlin2_pinctrl_match[] = {
|
||||
|
||||
static int berlin2_pinctrl_probe(struct platform_device *pdev)
|
||||
{
|
||||
const struct of_device_id *match =
|
||||
of_match_device(berlin2_pinctrl_match, &pdev->dev);
|
||||
|
||||
return berlin_pinctrl_probe(pdev, match->data);
|
||||
return berlin_pinctrl_probe(pdev, device_get_match_data(&pdev->dev));
|
||||
}
|
||||
|
||||
static struct platform_driver berlin2_pinctrl_driver = {
|
||||
|
||||
@ -8,8 +8,9 @@
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/property.h>
|
||||
#include <linux/regmap.h>
|
||||
|
||||
#include "berlin.h"
|
||||
@ -172,10 +173,7 @@ static const struct of_device_id berlin2cd_pinctrl_match[] = {
|
||||
|
||||
static int berlin2cd_pinctrl_probe(struct platform_device *pdev)
|
||||
{
|
||||
const struct of_device_id *match =
|
||||
of_match_device(berlin2cd_pinctrl_match, &pdev->dev);
|
||||
|
||||
return berlin_pinctrl_probe(pdev, match->data);
|
||||
return berlin_pinctrl_probe(pdev, device_get_match_data(&pdev->dev));
|
||||
}
|
||||
|
||||
static struct platform_driver berlin2cd_pinctrl_driver = {
|
||||
|
||||
@ -8,8 +8,9 @@
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/property.h>
|
||||
#include <linux/regmap.h>
|
||||
|
||||
#include "berlin.h"
|
||||
@ -389,10 +390,7 @@ static const struct of_device_id berlin2q_pinctrl_match[] = {
|
||||
|
||||
static int berlin2q_pinctrl_probe(struct platform_device *pdev)
|
||||
{
|
||||
const struct of_device_id *match =
|
||||
of_match_device(berlin2q_pinctrl_match, &pdev->dev);
|
||||
|
||||
return berlin_pinctrl_probe(pdev, match->data);
|
||||
return berlin_pinctrl_probe(pdev, device_get_match_data(&pdev->dev));
|
||||
}
|
||||
|
||||
static struct platform_driver berlin2q_pinctrl_driver = {
|
||||
|
||||
@ -8,8 +8,9 @@
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/property.h>
|
||||
#include <linux/regmap.h>
|
||||
|
||||
#include "berlin.h"
|
||||
@ -449,8 +450,8 @@ static const struct of_device_id berlin4ct_pinctrl_match[] = {
|
||||
|
||||
static int berlin4ct_pinctrl_probe(struct platform_device *pdev)
|
||||
{
|
||||
const struct of_device_id *match =
|
||||
of_match_device(berlin4ct_pinctrl_match, &pdev->dev);
|
||||
const struct berlin_pinctrl_desc *desc =
|
||||
device_get_match_data(&pdev->dev);
|
||||
struct regmap_config *rmconfig;
|
||||
struct regmap *regmap;
|
||||
struct resource *res;
|
||||
@ -473,7 +474,7 @@ static int berlin4ct_pinctrl_probe(struct platform_device *pdev)
|
||||
if (IS_ERR(regmap))
|
||||
return PTR_ERR(regmap);
|
||||
|
||||
return berlin_pinctrl_probe_regmap(pdev, match->data, regmap);
|
||||
return berlin_pinctrl_probe_regmap(pdev, desc, regmap);
|
||||
}
|
||||
|
||||
static struct platform_driver berlin4ct_pinctrl_driver = {
|
||||
|
||||
@ -96,10 +96,10 @@ static int berlin_pinctrl_dt_node_to_map(struct pinctrl_dev *pctrl_dev,
|
||||
}
|
||||
|
||||
static const struct pinctrl_ops berlin_pinctrl_ops = {
|
||||
.get_groups_count = &berlin_pinctrl_get_group_count,
|
||||
.get_group_name = &berlin_pinctrl_get_group_name,
|
||||
.dt_node_to_map = &berlin_pinctrl_dt_node_to_map,
|
||||
.dt_free_map = &pinctrl_utils_free_map,
|
||||
.get_groups_count = berlin_pinctrl_get_group_count,
|
||||
.get_group_name = berlin_pinctrl_get_group_name,
|
||||
.dt_node_to_map = berlin_pinctrl_dt_node_to_map,
|
||||
.dt_free_map = pinctrl_utils_free_map,
|
||||
};
|
||||
|
||||
static int berlin_pinmux_get_functions_count(struct pinctrl_dev *pctrl_dev)
|
||||
|
||||
@ -8,8 +8,9 @@
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/property.h>
|
||||
#include <linux/regmap.h>
|
||||
|
||||
#include "berlin.h"
|
||||
@ -330,8 +331,8 @@ static const struct of_device_id as370_pinctrl_match[] = {
|
||||
|
||||
static int as370_pinctrl_probe(struct platform_device *pdev)
|
||||
{
|
||||
const struct of_device_id *match =
|
||||
of_match_device(as370_pinctrl_match, &pdev->dev);
|
||||
const struct berlin_pinctrl_desc *desc =
|
||||
device_get_match_data(&pdev->dev);
|
||||
struct regmap_config *rmconfig;
|
||||
struct regmap *regmap;
|
||||
struct resource *res;
|
||||
@ -354,7 +355,7 @@ static int as370_pinctrl_probe(struct platform_device *pdev)
|
||||
if (IS_ERR(regmap))
|
||||
return PTR_ERR(regmap);
|
||||
|
||||
return berlin_pinctrl_probe_regmap(pdev, match->data, regmap);
|
||||
return berlin_pinctrl_probe_regmap(pdev, desc, regmap);
|
||||
}
|
||||
|
||||
static struct platform_driver as370_pinctrl_driver = {
|
||||
|
||||
@ -1084,19 +1084,17 @@ static int madera_pin_probe(struct platform_device *pdev)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int madera_pin_remove(struct platform_device *pdev)
|
||||
static void madera_pin_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct madera_pin_private *priv = platform_get_drvdata(pdev);
|
||||
|
||||
if (priv->madera->pdata.gpio_configs)
|
||||
pinctrl_unregister_mappings(priv->madera->pdata.gpio_configs);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_driver madera_pin_driver = {
|
||||
.probe = madera_pin_probe,
|
||||
.remove = madera_pin_remove,
|
||||
.remove_new = madera_pin_remove,
|
||||
.driver = {
|
||||
.name = "madera-pinctrl",
|
||||
},
|
||||
|
||||
@ -12,12 +12,12 @@
|
||||
*/
|
||||
#define pr_fmt(fmt) "pinctrl core: " fmt
|
||||
|
||||
#include <linux/array_size.h>
|
||||
#include <linux/debugfs.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/export.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/kref.h>
|
||||
#include <linux/list.h>
|
||||
#include <linux/seq_file.h>
|
||||
@ -445,9 +445,9 @@ struct pinctrl_dev *pinctrl_find_and_add_gpio_range(const char *devname,
|
||||
* it has not probed yet, so the driver trying to register this
|
||||
* range need to defer probing.
|
||||
*/
|
||||
if (!pctldev) {
|
||||
if (!pctldev)
|
||||
return ERR_PTR(-EPROBE_DEFER);
|
||||
}
|
||||
|
||||
pinctrl_add_gpio_range(pctldev, range);
|
||||
|
||||
return pctldev;
|
||||
|
||||
@ -395,6 +395,12 @@ static int mxs_pinctrl_parse_group(struct platform_device *pdev,
|
||||
return 0;
|
||||
}
|
||||
|
||||
static bool is_mxs_gpio(struct device_node *child)
|
||||
{
|
||||
return of_device_is_compatible(child, "fsl,imx23-gpio") ||
|
||||
of_device_is_compatible(child, "fsl,imx28-gpio");
|
||||
}
|
||||
|
||||
static int mxs_pinctrl_probe_dt(struct platform_device *pdev,
|
||||
struct mxs_pinctrl_data *d)
|
||||
{
|
||||
@ -402,7 +408,6 @@ static int mxs_pinctrl_probe_dt(struct platform_device *pdev,
|
||||
struct device_node *np = pdev->dev.of_node;
|
||||
struct device_node *child;
|
||||
struct mxs_function *f;
|
||||
const char *gpio_compat = "fsl,mxs-gpio";
|
||||
const char *fn, *fnull = "";
|
||||
int i = 0, idxf = 0, idxg = 0;
|
||||
int ret;
|
||||
@ -417,7 +422,7 @@ static int mxs_pinctrl_probe_dt(struct platform_device *pdev,
|
||||
/* Count total functions and groups */
|
||||
fn = fnull;
|
||||
for_each_child_of_node(np, child) {
|
||||
if (of_device_is_compatible(child, gpio_compat))
|
||||
if (is_mxs_gpio(child))
|
||||
continue;
|
||||
soc->ngroups++;
|
||||
/* Skip pure pinconf node */
|
||||
@ -446,7 +451,7 @@ static int mxs_pinctrl_probe_dt(struct platform_device *pdev,
|
||||
fn = fnull;
|
||||
f = &soc->functions[idxf];
|
||||
for_each_child_of_node(np, child) {
|
||||
if (of_device_is_compatible(child, gpio_compat))
|
||||
if (is_mxs_gpio(child))
|
||||
continue;
|
||||
if (of_property_read_u32(child, "reg", &val))
|
||||
continue;
|
||||
@ -486,7 +491,7 @@ static int mxs_pinctrl_probe_dt(struct platform_device *pdev,
|
||||
idxf = 0;
|
||||
fn = fnull;
|
||||
for_each_child_of_node(np, child) {
|
||||
if (of_device_is_compatible(child, gpio_compat))
|
||||
if (is_mxs_gpio(child))
|
||||
continue;
|
||||
if (of_property_read_u32(child, "reg", &val)) {
|
||||
ret = mxs_pinctrl_parse_group(pdev, child,
|
||||
|
||||
@ -7,16 +7,16 @@
|
||||
*/
|
||||
|
||||
#include <linux/acpi.h>
|
||||
#include <linux/array_size.h>
|
||||
#include <linux/bitops.h>
|
||||
#include <linux/gpio/driver.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/pm_runtime.h>
|
||||
#include <linux/pm.h>
|
||||
#include <linux/property.h>
|
||||
#include <linux/seq_file.h>
|
||||
#include <linux/string_helpers.h>
|
||||
@ -722,8 +722,6 @@ static int byt_gpio_request_enable(struct pinctrl_dev *pctl_dev,
|
||||
|
||||
raw_spin_unlock_irqrestore(&byt_lock, flags);
|
||||
|
||||
pm_runtime_get(vg->dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -734,7 +732,6 @@ static void byt_gpio_disable_free(struct pinctrl_dev *pctl_dev,
|
||||
struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctl_dev);
|
||||
|
||||
byt_gpio_clear_triggering(vg, offset);
|
||||
pm_runtime_put(vg->dev);
|
||||
}
|
||||
|
||||
static void byt_gpio_direct_irq_check(struct intel_pinctrl *vg,
|
||||
@ -983,11 +980,18 @@ static int byt_pin_config_set(struct pinctrl_dev *pctl_dev,
|
||||
|
||||
break;
|
||||
case PIN_CONFIG_INPUT_DEBOUNCE:
|
||||
if (arg)
|
||||
if (arg) {
|
||||
conf |= BYT_DEBOUNCE_EN;
|
||||
else
|
||||
} else {
|
||||
conf &= ~BYT_DEBOUNCE_EN;
|
||||
|
||||
/*
|
||||
* No need to update the pulse value.
|
||||
* Debounce is going to be disabled.
|
||||
*/
|
||||
break;
|
||||
}
|
||||
|
||||
switch (arg) {
|
||||
case 375:
|
||||
db_pulse = BYT_DEBOUNCE_PULSE_375US;
|
||||
@ -1654,7 +1658,6 @@ static int byt_pinctrl_probe(struct platform_device *pdev)
|
||||
return ret;
|
||||
|
||||
platform_set_drvdata(pdev, vg);
|
||||
pm_runtime_enable(dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -1743,26 +1746,15 @@ static int byt_gpio_resume(struct device *dev)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int byt_gpio_runtime_suspend(struct device *dev)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int byt_gpio_runtime_resume(struct device *dev)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct dev_pm_ops byt_gpio_pm_ops = {
|
||||
LATE_SYSTEM_SLEEP_PM_OPS(byt_gpio_suspend, byt_gpio_resume)
|
||||
RUNTIME_PM_OPS(byt_gpio_runtime_suspend, byt_gpio_runtime_resume, NULL)
|
||||
};
|
||||
|
||||
static struct platform_driver byt_gpio_driver = {
|
||||
.probe = byt_pinctrl_probe,
|
||||
.driver = {
|
||||
.name = "byt_gpio",
|
||||
.pm = pm_ptr(&byt_gpio_pm_ops),
|
||||
.pm = pm_sleep_ptr(&byt_gpio_pm_ops),
|
||||
.acpi_match_table = byt_gpio_acpi_match,
|
||||
.suppress_bind_attrs = true,
|
||||
},
|
||||
|
||||
@ -998,6 +998,7 @@ static const struct platform_device_id bxt_pinctrl_platform_ids[] = {
|
||||
{ "broxton-pinctrl", (kernel_ulong_t)bxt_pinctrl_soc_data },
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(platform, bxt_pinctrl_platform_ids);
|
||||
|
||||
static INTEL_PINCTRL_PM_OPS(bxt_pinctrl_pm_ops);
|
||||
|
||||
@ -1026,6 +1027,4 @@ module_exit(bxt_pinctrl_exit);
|
||||
MODULE_AUTHOR("Mika Westerberg <mika.westerberg@linux.intel.com>");
|
||||
MODULE_DESCRIPTION("Intel Broxton SoC pinctrl/GPIO driver");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
MODULE_ALIAS("platform:apollolake-pinctrl");
|
||||
MODULE_ALIAS("platform:broxton-pinctrl");
|
||||
MODULE_IMPORT_NS(PINCTRL_INTEL);
|
||||
|
||||
@ -11,9 +11,10 @@
|
||||
*/
|
||||
|
||||
#include <linux/acpi.h>
|
||||
#include <linux/array_size.h>
|
||||
#include <linux/cleanup.h>
|
||||
#include <linux/dmi.h>
|
||||
#include <linux/gpio/driver.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/seq_file.h>
|
||||
@ -612,26 +613,26 @@ static void chv_writel(struct intel_pinctrl *pctrl, unsigned int pin, unsigned i
|
||||
}
|
||||
|
||||
/* When Pad Cfg is locked, driver can only change GPIOTXState or GPIORXState */
|
||||
static bool chv_pad_is_locked(u32 ctrl1)
|
||||
{
|
||||
return ctrl1 & CHV_PADCTRL1_CFGLOCK;
|
||||
}
|
||||
|
||||
static bool chv_pad_locked(struct intel_pinctrl *pctrl, unsigned int offset)
|
||||
{
|
||||
return chv_readl(pctrl, offset, CHV_PADCTRL1) & CHV_PADCTRL1_CFGLOCK;
|
||||
return chv_pad_is_locked(chv_readl(pctrl, offset, CHV_PADCTRL1));
|
||||
}
|
||||
|
||||
static void chv_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
|
||||
unsigned int offset)
|
||||
{
|
||||
struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
|
||||
unsigned long flags;
|
||||
u32 ctrl0, ctrl1;
|
||||
bool locked;
|
||||
|
||||
raw_spin_lock_irqsave(&chv_lock, flags);
|
||||
|
||||
ctrl0 = chv_readl(pctrl, offset, CHV_PADCTRL0);
|
||||
ctrl1 = chv_readl(pctrl, offset, CHV_PADCTRL1);
|
||||
locked = chv_pad_locked(pctrl, offset);
|
||||
|
||||
raw_spin_unlock_irqrestore(&chv_lock, flags);
|
||||
scoped_guard(raw_spinlock_irqsave, &chv_lock) {
|
||||
ctrl0 = chv_readl(pctrl, offset, CHV_PADCTRL0);
|
||||
ctrl1 = chv_readl(pctrl, offset, CHV_PADCTRL1);
|
||||
}
|
||||
|
||||
if (ctrl0 & CHV_PADCTRL0_GPIOEN) {
|
||||
seq_puts(s, "GPIO ");
|
||||
@ -646,7 +647,7 @@ static void chv_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
|
||||
|
||||
seq_printf(s, "0x%08x 0x%08x", ctrl0, ctrl1);
|
||||
|
||||
if (locked)
|
||||
if (chv_pad_is_locked(ctrl1))
|
||||
seq_puts(s, " [LOCKED]");
|
||||
}
|
||||
|
||||
@ -663,17 +664,15 @@ static int chv_pinmux_set_mux(struct pinctrl_dev *pctldev,
|
||||
struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
|
||||
struct device *dev = pctrl->dev;
|
||||
const struct intel_pingroup *grp;
|
||||
unsigned long flags;
|
||||
int i;
|
||||
|
||||
grp = &pctrl->soc->groups[group];
|
||||
|
||||
raw_spin_lock_irqsave(&chv_lock, flags);
|
||||
guard(raw_spinlock_irqsave)(&chv_lock);
|
||||
|
||||
/* Check first that the pad is not locked */
|
||||
for (i = 0; i < grp->grp.npins; i++) {
|
||||
if (chv_pad_locked(pctrl, grp->grp.pins[i])) {
|
||||
raw_spin_unlock_irqrestore(&chv_lock, flags);
|
||||
dev_warn(dev, "unable to set mode for locked pin %u\n", grp->grp.pins[i]);
|
||||
return -EBUSY;
|
||||
}
|
||||
@ -713,8 +712,6 @@ static int chv_pinmux_set_mux(struct pinctrl_dev *pctldev,
|
||||
invert_oe ? "" : "not ");
|
||||
}
|
||||
|
||||
raw_spin_unlock_irqrestore(&chv_lock, flags);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -745,16 +742,14 @@ static int chv_gpio_request_enable(struct pinctrl_dev *pctldev,
|
||||
unsigned int offset)
|
||||
{
|
||||
struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
|
||||
unsigned long flags;
|
||||
u32 value;
|
||||
|
||||
raw_spin_lock_irqsave(&chv_lock, flags);
|
||||
guard(raw_spinlock_irqsave)(&chv_lock);
|
||||
|
||||
if (chv_pad_locked(pctrl, offset)) {
|
||||
value = chv_readl(pctrl, offset, CHV_PADCTRL0);
|
||||
if (!(value & CHV_PADCTRL0_GPIOEN)) {
|
||||
/* Locked so cannot enable */
|
||||
raw_spin_unlock_irqrestore(&chv_lock, flags);
|
||||
return -EBUSY;
|
||||
}
|
||||
} else {
|
||||
@ -789,8 +784,6 @@ static int chv_gpio_request_enable(struct pinctrl_dev *pctldev,
|
||||
chv_writel(pctrl, offset, CHV_PADCTRL0, value);
|
||||
}
|
||||
|
||||
raw_spin_unlock_irqrestore(&chv_lock, flags);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -799,14 +792,13 @@ static void chv_gpio_disable_free(struct pinctrl_dev *pctldev,
|
||||
unsigned int offset)
|
||||
{
|
||||
struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
|
||||
unsigned long flags;
|
||||
|
||||
raw_spin_lock_irqsave(&chv_lock, flags);
|
||||
guard(raw_spinlock_irqsave)(&chv_lock);
|
||||
|
||||
if (!chv_pad_locked(pctrl, offset))
|
||||
chv_gpio_clear_triggering(pctrl, offset);
|
||||
if (chv_pad_locked(pctrl, offset))
|
||||
return;
|
||||
|
||||
raw_spin_unlock_irqrestore(&chv_lock, flags);
|
||||
chv_gpio_clear_triggering(pctrl, offset);
|
||||
}
|
||||
|
||||
static int chv_gpio_set_direction(struct pinctrl_dev *pctldev,
|
||||
@ -814,10 +806,9 @@ static int chv_gpio_set_direction(struct pinctrl_dev *pctldev,
|
||||
unsigned int offset, bool input)
|
||||
{
|
||||
struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
|
||||
unsigned long flags;
|
||||
u32 ctrl0;
|
||||
|
||||
raw_spin_lock_irqsave(&chv_lock, flags);
|
||||
guard(raw_spinlock_irqsave)(&chv_lock);
|
||||
|
||||
ctrl0 = chv_readl(pctrl, offset, CHV_PADCTRL0) & ~CHV_PADCTRL0_GPIOCFG_MASK;
|
||||
if (input)
|
||||
@ -826,8 +817,6 @@ static int chv_gpio_set_direction(struct pinctrl_dev *pctldev,
|
||||
ctrl0 |= CHV_PADCTRL0_GPIOCFG_GPO << CHV_PADCTRL0_GPIOCFG_SHIFT;
|
||||
chv_writel(pctrl, offset, CHV_PADCTRL0, ctrl0);
|
||||
|
||||
raw_spin_unlock_irqrestore(&chv_lock, flags);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -846,15 +835,14 @@ static int chv_config_get(struct pinctrl_dev *pctldev, unsigned int pin,
|
||||
{
|
||||
struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
|
||||
enum pin_config_param param = pinconf_to_config_param(*config);
|
||||
unsigned long flags;
|
||||
u32 ctrl0, ctrl1;
|
||||
u16 arg = 0;
|
||||
u32 term;
|
||||
|
||||
raw_spin_lock_irqsave(&chv_lock, flags);
|
||||
ctrl0 = chv_readl(pctrl, pin, CHV_PADCTRL0);
|
||||
ctrl1 = chv_readl(pctrl, pin, CHV_PADCTRL1);
|
||||
raw_spin_unlock_irqrestore(&chv_lock, flags);
|
||||
scoped_guard(raw_spinlock_irqsave, &chv_lock) {
|
||||
ctrl0 = chv_readl(pctrl, pin, CHV_PADCTRL0);
|
||||
ctrl1 = chv_readl(pctrl, pin, CHV_PADCTRL1);
|
||||
}
|
||||
|
||||
term = (ctrl0 & CHV_PADCTRL0_TERM_MASK) >> CHV_PADCTRL0_TERM_SHIFT;
|
||||
|
||||
@ -906,6 +894,7 @@ static int chv_config_get(struct pinctrl_dev *pctldev, unsigned int pin,
|
||||
return -EINVAL;
|
||||
|
||||
break;
|
||||
}
|
||||
|
||||
case PIN_CONFIG_DRIVE_PUSH_PULL:
|
||||
if (ctrl1 & CHV_PADCTRL1_ODEN)
|
||||
@ -916,7 +905,6 @@ static int chv_config_get(struct pinctrl_dev *pctldev, unsigned int pin,
|
||||
if (!(ctrl1 & CHV_PADCTRL1_ODEN))
|
||||
return -EINVAL;
|
||||
break;
|
||||
}
|
||||
|
||||
default:
|
||||
return -ENOTSUPP;
|
||||
@ -929,10 +917,10 @@ static int chv_config_get(struct pinctrl_dev *pctldev, unsigned int pin,
|
||||
static int chv_config_set_pull(struct intel_pinctrl *pctrl, unsigned int pin,
|
||||
enum pin_config_param param, u32 arg)
|
||||
{
|
||||
unsigned long flags;
|
||||
u32 ctrl0, pull;
|
||||
|
||||
raw_spin_lock_irqsave(&chv_lock, flags);
|
||||
guard(raw_spinlock_irqsave)(&chv_lock);
|
||||
|
||||
ctrl0 = chv_readl(pctrl, pin, CHV_PADCTRL0);
|
||||
|
||||
switch (param) {
|
||||
@ -955,7 +943,6 @@ static int chv_config_set_pull(struct intel_pinctrl *pctrl, unsigned int pin,
|
||||
pull = CHV_PADCTRL0_TERM_20K << CHV_PADCTRL0_TERM_SHIFT;
|
||||
break;
|
||||
default:
|
||||
raw_spin_unlock_irqrestore(&chv_lock, flags);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
@ -973,7 +960,6 @@ static int chv_config_set_pull(struct intel_pinctrl *pctrl, unsigned int pin,
|
||||
pull = CHV_PADCTRL0_TERM_20K << CHV_PADCTRL0_TERM_SHIFT;
|
||||
break;
|
||||
default:
|
||||
raw_spin_unlock_irqrestore(&chv_lock, flags);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
@ -981,12 +967,10 @@ static int chv_config_set_pull(struct intel_pinctrl *pctrl, unsigned int pin,
|
||||
break;
|
||||
|
||||
default:
|
||||
raw_spin_unlock_irqrestore(&chv_lock, flags);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
chv_writel(pctrl, pin, CHV_PADCTRL0, ctrl0);
|
||||
raw_spin_unlock_irqrestore(&chv_lock, flags);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -994,10 +978,10 @@ static int chv_config_set_pull(struct intel_pinctrl *pctrl, unsigned int pin,
|
||||
static int chv_config_set_oden(struct intel_pinctrl *pctrl, unsigned int pin,
|
||||
bool enable)
|
||||
{
|
||||
unsigned long flags;
|
||||
u32 ctrl1;
|
||||
|
||||
raw_spin_lock_irqsave(&chv_lock, flags);
|
||||
guard(raw_spinlock_irqsave)(&chv_lock);
|
||||
|
||||
ctrl1 = chv_readl(pctrl, pin, CHV_PADCTRL1);
|
||||
|
||||
if (enable)
|
||||
@ -1006,7 +990,6 @@ static int chv_config_set_oden(struct intel_pinctrl *pctrl, unsigned int pin,
|
||||
ctrl1 &= ~CHV_PADCTRL1_ODEN;
|
||||
|
||||
chv_writel(pctrl, pin, CHV_PADCTRL1, ctrl1);
|
||||
raw_spin_unlock_irqrestore(&chv_lock, flags);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -1116,12 +1099,10 @@ static struct pinctrl_desc chv_pinctrl_desc = {
|
||||
static int chv_gpio_get(struct gpio_chip *chip, unsigned int offset)
|
||||
{
|
||||
struct intel_pinctrl *pctrl = gpiochip_get_data(chip);
|
||||
unsigned long flags;
|
||||
u32 ctrl0, cfg;
|
||||
|
||||
raw_spin_lock_irqsave(&chv_lock, flags);
|
||||
ctrl0 = chv_readl(pctrl, offset, CHV_PADCTRL0);
|
||||
raw_spin_unlock_irqrestore(&chv_lock, flags);
|
||||
scoped_guard(raw_spinlock_irqsave, &chv_lock)
|
||||
ctrl0 = chv_readl(pctrl, offset, CHV_PADCTRL0);
|
||||
|
||||
cfg = ctrl0 & CHV_PADCTRL0_GPIOCFG_MASK;
|
||||
cfg >>= CHV_PADCTRL0_GPIOCFG_SHIFT;
|
||||
@ -1134,10 +1115,9 @@ static int chv_gpio_get(struct gpio_chip *chip, unsigned int offset)
|
||||
static void chv_gpio_set(struct gpio_chip *chip, unsigned int offset, int value)
|
||||
{
|
||||
struct intel_pinctrl *pctrl = gpiochip_get_data(chip);
|
||||
unsigned long flags;
|
||||
u32 ctrl0;
|
||||
|
||||
raw_spin_lock_irqsave(&chv_lock, flags);
|
||||
guard(raw_spinlock_irqsave)(&chv_lock);
|
||||
|
||||
ctrl0 = chv_readl(pctrl, offset, CHV_PADCTRL0);
|
||||
|
||||
@ -1147,19 +1127,15 @@ static void chv_gpio_set(struct gpio_chip *chip, unsigned int offset, int value)
|
||||
ctrl0 &= ~CHV_PADCTRL0_GPIOTXSTATE;
|
||||
|
||||
chv_writel(pctrl, offset, CHV_PADCTRL0, ctrl0);
|
||||
|
||||
raw_spin_unlock_irqrestore(&chv_lock, flags);
|
||||
}
|
||||
|
||||
static int chv_gpio_get_direction(struct gpio_chip *chip, unsigned int offset)
|
||||
{
|
||||
struct intel_pinctrl *pctrl = gpiochip_get_data(chip);
|
||||
u32 ctrl0, direction;
|
||||
unsigned long flags;
|
||||
|
||||
raw_spin_lock_irqsave(&chv_lock, flags);
|
||||
ctrl0 = chv_readl(pctrl, offset, CHV_PADCTRL0);
|
||||
raw_spin_unlock_irqrestore(&chv_lock, flags);
|
||||
scoped_guard(raw_spinlock_irqsave, &chv_lock)
|
||||
ctrl0 = chv_readl(pctrl, offset, CHV_PADCTRL0);
|
||||
|
||||
direction = ctrl0 & CHV_PADCTRL0_GPIOCFG_MASK;
|
||||
direction >>= CHV_PADCTRL0_GPIOCFG_SHIFT;
|
||||
@ -1200,23 +1176,20 @@ static void chv_gpio_irq_ack(struct irq_data *d)
|
||||
irq_hw_number_t hwirq = irqd_to_hwirq(d);
|
||||
u32 intr_line;
|
||||
|
||||
raw_spin_lock(&chv_lock);
|
||||
guard(raw_spinlock)(&chv_lock);
|
||||
|
||||
intr_line = chv_readl(pctrl, hwirq, CHV_PADCTRL0);
|
||||
intr_line &= CHV_PADCTRL0_INTSEL_MASK;
|
||||
intr_line >>= CHV_PADCTRL0_INTSEL_SHIFT;
|
||||
chv_pctrl_writel(pctrl, CHV_INTSTAT, BIT(intr_line));
|
||||
|
||||
raw_spin_unlock(&chv_lock);
|
||||
}
|
||||
|
||||
static void chv_gpio_irq_mask_unmask(struct gpio_chip *gc, irq_hw_number_t hwirq, bool mask)
|
||||
{
|
||||
struct intel_pinctrl *pctrl = gpiochip_get_data(gc);
|
||||
u32 value, intr_line;
|
||||
unsigned long flags;
|
||||
|
||||
raw_spin_lock_irqsave(&chv_lock, flags);
|
||||
guard(raw_spinlock_irqsave)(&chv_lock);
|
||||
|
||||
intr_line = chv_readl(pctrl, hwirq, CHV_PADCTRL0);
|
||||
intr_line &= CHV_PADCTRL0_INTSEL_MASK;
|
||||
@ -1228,8 +1201,6 @@ static void chv_gpio_irq_mask_unmask(struct gpio_chip *gc, irq_hw_number_t hwirq
|
||||
else
|
||||
value |= BIT(intr_line);
|
||||
chv_pctrl_writel(pctrl, CHV_INTMASK, value);
|
||||
|
||||
raw_spin_unlock_irqrestore(&chv_lock, flags);
|
||||
}
|
||||
|
||||
static void chv_gpio_irq_mask(struct irq_data *d)
|
||||
@ -1254,7 +1225,15 @@ static unsigned chv_gpio_irq_startup(struct irq_data *d)
|
||||
{
|
||||
/*
|
||||
* Check if the interrupt has been requested with 0 as triggering
|
||||
* type. In that case it is assumed that the current values
|
||||
* type. If not, bail out, ...
|
||||
*/
|
||||
if (irqd_get_trigger_type(d) != IRQ_TYPE_NONE) {
|
||||
chv_gpio_irq_unmask(d);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* ...otherwise it is assumed that the current values
|
||||
* programmed to the hardware are used (e.g BIOS configured
|
||||
* defaults).
|
||||
*
|
||||
@ -1262,17 +1241,15 @@ static unsigned chv_gpio_irq_startup(struct irq_data *d)
|
||||
* read back the values from hardware now, set correct flow handler
|
||||
* and update mappings before the interrupt is being used.
|
||||
*/
|
||||
if (irqd_get_trigger_type(d) == IRQ_TYPE_NONE) {
|
||||
scoped_guard(raw_spinlock_irqsave, &chv_lock) {
|
||||
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
|
||||
struct intel_pinctrl *pctrl = gpiochip_get_data(gc);
|
||||
struct device *dev = pctrl->dev;
|
||||
struct intel_community_context *cctx = &pctrl->context.communities[0];
|
||||
irq_hw_number_t hwirq = irqd_to_hwirq(d);
|
||||
irq_flow_handler_t handler;
|
||||
unsigned long flags;
|
||||
u32 intsel, value;
|
||||
|
||||
raw_spin_lock_irqsave(&chv_lock, flags);
|
||||
intsel = chv_readl(pctrl, hwirq, CHV_PADCTRL0);
|
||||
intsel &= CHV_PADCTRL0_INTSEL_MASK;
|
||||
intsel >>= CHV_PADCTRL0_INTSEL_SHIFT;
|
||||
@ -1289,7 +1266,6 @@ static unsigned chv_gpio_irq_startup(struct irq_data *d)
|
||||
intsel, hwirq);
|
||||
cctx->intr_lines[intsel] = hwirq;
|
||||
}
|
||||
raw_spin_unlock_irqrestore(&chv_lock, flags);
|
||||
}
|
||||
|
||||
chv_gpio_irq_unmask(d);
|
||||
@ -1354,17 +1330,14 @@ static int chv_gpio_irq_type(struct irq_data *d, unsigned int type)
|
||||
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
|
||||
struct intel_pinctrl *pctrl = gpiochip_get_data(gc);
|
||||
irq_hw_number_t hwirq = irqd_to_hwirq(d);
|
||||
unsigned long flags;
|
||||
u32 value;
|
||||
int ret;
|
||||
|
||||
raw_spin_lock_irqsave(&chv_lock, flags);
|
||||
guard(raw_spinlock_irqsave)(&chv_lock);
|
||||
|
||||
ret = chv_gpio_set_intr_line(pctrl, hwirq);
|
||||
if (ret) {
|
||||
raw_spin_unlock_irqrestore(&chv_lock, flags);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
* Pins which can be used as shared interrupt are configured in
|
||||
@ -1405,8 +1378,6 @@ static int chv_gpio_irq_type(struct irq_data *d, unsigned int type)
|
||||
else if (type & IRQ_TYPE_LEVEL_MASK)
|
||||
irq_set_handler_locked(d, handle_level_irq);
|
||||
|
||||
raw_spin_unlock_irqrestore(&chv_lock, flags);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -1430,14 +1401,12 @@ static void chv_gpio_irq_handler(struct irq_desc *desc)
|
||||
struct intel_community_context *cctx = &pctrl->context.communities[0];
|
||||
struct irq_chip *chip = irq_desc_get_chip(desc);
|
||||
unsigned long pending;
|
||||
unsigned long flags;
|
||||
u32 intr_line;
|
||||
|
||||
chained_irq_enter(chip, desc);
|
||||
|
||||
raw_spin_lock_irqsave(&chv_lock, flags);
|
||||
pending = chv_pctrl_readl(pctrl, CHV_INTSTAT);
|
||||
raw_spin_unlock_irqrestore(&chv_lock, flags);
|
||||
scoped_guard(raw_spinlock_irqsave, &chv_lock)
|
||||
pending = chv_pctrl_readl(pctrl, CHV_INTSTAT);
|
||||
|
||||
for_each_set_bit(intr_line, &pending, community->nirqs) {
|
||||
unsigned int offset;
|
||||
@ -1626,21 +1595,17 @@ static acpi_status chv_pinctrl_mmio_access_handler(u32 function,
|
||||
void *handler_context, void *region_context)
|
||||
{
|
||||
struct intel_pinctrl *pctrl = region_context;
|
||||
unsigned long flags;
|
||||
acpi_status ret = AE_OK;
|
||||
|
||||
raw_spin_lock_irqsave(&chv_lock, flags);
|
||||
guard(raw_spinlock_irqsave)(&chv_lock);
|
||||
|
||||
if (function == ACPI_WRITE)
|
||||
chv_pctrl_writel(pctrl, address, *value);
|
||||
else if (function == ACPI_READ)
|
||||
*value = chv_pctrl_readl(pctrl, address);
|
||||
else
|
||||
ret = AE_BAD_PARAMETER;
|
||||
return AE_BAD_PARAMETER;
|
||||
|
||||
raw_spin_unlock_irqrestore(&chv_lock, flags);
|
||||
|
||||
return ret;
|
||||
return AE_OK;
|
||||
}
|
||||
|
||||
static int chv_pinctrl_probe(struct platform_device *pdev)
|
||||
@ -1728,7 +1693,7 @@ static int chv_pinctrl_probe(struct platform_device *pdev)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int chv_pinctrl_remove(struct platform_device *pdev)
|
||||
static void chv_pinctrl_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct intel_pinctrl *pctrl = platform_get_drvdata(pdev);
|
||||
const struct intel_community *community = &pctrl->communities[0];
|
||||
@ -1736,18 +1701,15 @@ static int chv_pinctrl_remove(struct platform_device *pdev)
|
||||
acpi_remove_address_space_handler(ACPI_HANDLE(&pdev->dev),
|
||||
community->acpi_space_id,
|
||||
chv_pinctrl_mmio_access_handler);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int chv_pinctrl_suspend_noirq(struct device *dev)
|
||||
{
|
||||
struct intel_pinctrl *pctrl = dev_get_drvdata(dev);
|
||||
struct intel_community_context *cctx = &pctrl->context.communities[0];
|
||||
unsigned long flags;
|
||||
int i;
|
||||
|
||||
raw_spin_lock_irqsave(&chv_lock, flags);
|
||||
guard(raw_spinlock_irqsave)(&chv_lock);
|
||||
|
||||
cctx->saved_intmask = chv_pctrl_readl(pctrl, CHV_INTMASK);
|
||||
|
||||
@ -1765,8 +1727,6 @@ static int chv_pinctrl_suspend_noirq(struct device *dev)
|
||||
ctx->padctrl1 = chv_readl(pctrl, desc->number, CHV_PADCTRL1);
|
||||
}
|
||||
|
||||
raw_spin_unlock_irqrestore(&chv_lock, flags);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -1774,10 +1734,9 @@ static int chv_pinctrl_resume_noirq(struct device *dev)
|
||||
{
|
||||
struct intel_pinctrl *pctrl = dev_get_drvdata(dev);
|
||||
struct intel_community_context *cctx = &pctrl->context.communities[0];
|
||||
unsigned long flags;
|
||||
int i;
|
||||
|
||||
raw_spin_lock_irqsave(&chv_lock, flags);
|
||||
guard(raw_spinlock_irqsave)(&chv_lock);
|
||||
|
||||
/*
|
||||
* Mask all interrupts before restoring per-pin configuration
|
||||
@ -1819,8 +1778,6 @@ static int chv_pinctrl_resume_noirq(struct device *dev)
|
||||
chv_pctrl_writel(pctrl, CHV_INTSTAT, 0xffff);
|
||||
chv_pctrl_writel(pctrl, CHV_INTMASK, cctx->saved_intmask);
|
||||
|
||||
raw_spin_unlock_irqrestore(&chv_lock, flags);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -1835,7 +1792,7 @@ MODULE_DEVICE_TABLE(acpi, chv_pinctrl_acpi_match);
|
||||
|
||||
static struct platform_driver chv_pinctrl_driver = {
|
||||
.probe = chv_pinctrl_probe,
|
||||
.remove = chv_pinctrl_remove,
|
||||
.remove_new = chv_pinctrl_remove,
|
||||
.driver = {
|
||||
.name = "cherryview-pinctrl",
|
||||
.pm = pm_sleep_ptr(&chv_pinctrl_pm_ops),
|
||||
|
||||
@ -257,6 +257,12 @@ static const struct acpi_device_id dnv_pinctrl_acpi_match[] = {
|
||||
};
|
||||
MODULE_DEVICE_TABLE(acpi, dnv_pinctrl_acpi_match);
|
||||
|
||||
static const struct platform_device_id dnv_pinctrl_platform_ids[] = {
|
||||
{ "denverton-pinctrl", (kernel_ulong_t)&dnv_soc_data },
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(platform, dnv_pinctrl_platform_ids);
|
||||
|
||||
static struct platform_driver dnv_pinctrl_driver = {
|
||||
.probe = intel_pinctrl_probe_by_hid,
|
||||
.driver = {
|
||||
@ -264,6 +270,7 @@ static struct platform_driver dnv_pinctrl_driver = {
|
||||
.acpi_match_table = dnv_pinctrl_acpi_match,
|
||||
.pm = &dnv_pinctrl_pm_ops,
|
||||
},
|
||||
.id_table = dnv_pinctrl_platform_ids,
|
||||
};
|
||||
|
||||
static int __init dnv_pinctrl_init(void)
|
||||
|
||||
@ -8,6 +8,7 @@
|
||||
*/
|
||||
|
||||
#include <linux/acpi.h>
|
||||
#include <linux/cleanup.h>
|
||||
#include <linux/gpio/driver.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/log2.h>
|
||||
@ -393,20 +394,17 @@ static int intel_pinmux_set_mux(struct pinctrl_dev *pctldev,
|
||||
{
|
||||
struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
|
||||
const struct intel_pingroup *grp = &pctrl->soc->groups[group];
|
||||
unsigned long flags;
|
||||
int i;
|
||||
|
||||
raw_spin_lock_irqsave(&pctrl->lock, flags);
|
||||
guard(raw_spinlock_irqsave)(&pctrl->lock);
|
||||
|
||||
/*
|
||||
* All pins in the groups needs to be accessible and writable
|
||||
* before we can enable the mux for this group.
|
||||
*/
|
||||
for (i = 0; i < grp->grp.npins; i++) {
|
||||
if (!intel_pad_usable(pctrl, grp->grp.pins[i])) {
|
||||
raw_spin_unlock_irqrestore(&pctrl->lock, flags);
|
||||
if (!intel_pad_usable(pctrl, grp->grp.pins[i]))
|
||||
return -EBUSY;
|
||||
}
|
||||
}
|
||||
|
||||
/* Now enable the mux setting for each pin in the group */
|
||||
@ -428,8 +426,6 @@ static int intel_pinmux_set_mux(struct pinctrl_dev *pctldev,
|
||||
writel(value, padcfg0);
|
||||
}
|
||||
|
||||
raw_spin_unlock_irqrestore(&pctrl->lock, flags);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -485,21 +481,16 @@ static int intel_gpio_request_enable(struct pinctrl_dev *pctldev,
|
||||
{
|
||||
struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
|
||||
void __iomem *padcfg0;
|
||||
unsigned long flags;
|
||||
|
||||
padcfg0 = intel_get_padcfg(pctrl, pin, PADCFG0);
|
||||
|
||||
raw_spin_lock_irqsave(&pctrl->lock, flags);
|
||||
guard(raw_spinlock_irqsave)(&pctrl->lock);
|
||||
|
||||
if (!intel_pad_owned_by_host(pctrl, pin)) {
|
||||
raw_spin_unlock_irqrestore(&pctrl->lock, flags);
|
||||
if (!intel_pad_owned_by_host(pctrl, pin))
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
if (!intel_pad_is_unlocked(pctrl, pin)) {
|
||||
raw_spin_unlock_irqrestore(&pctrl->lock, flags);
|
||||
if (!intel_pad_is_unlocked(pctrl, pin))
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* If pin is already configured in GPIO mode, we assume that
|
||||
@ -507,15 +498,11 @@ static int intel_gpio_request_enable(struct pinctrl_dev *pctldev,
|
||||
* potential glitches on the pin. Otherwise, for the pin in
|
||||
* alternative mode, consumer has to supply respective flags.
|
||||
*/
|
||||
if (intel_gpio_get_gpio_mode(padcfg0) == PADCFG0_PMODE_GPIO) {
|
||||
raw_spin_unlock_irqrestore(&pctrl->lock, flags);
|
||||
if (intel_gpio_get_gpio_mode(padcfg0) == PADCFG0_PMODE_GPIO)
|
||||
return 0;
|
||||
}
|
||||
|
||||
intel_gpio_set_gpio_mode(padcfg0);
|
||||
|
||||
raw_spin_unlock_irqrestore(&pctrl->lock, flags);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -525,13 +512,12 @@ static int intel_gpio_set_direction(struct pinctrl_dev *pctldev,
|
||||
{
|
||||
struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
|
||||
void __iomem *padcfg0;
|
||||
unsigned long flags;
|
||||
|
||||
padcfg0 = intel_get_padcfg(pctrl, pin, PADCFG0);
|
||||
|
||||
raw_spin_lock_irqsave(&pctrl->lock, flags);
|
||||
guard(raw_spinlock_irqsave)(&pctrl->lock);
|
||||
|
||||
__intel_gpio_set_direction(padcfg0, input);
|
||||
raw_spin_unlock_irqrestore(&pctrl->lock, flags);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -548,17 +534,13 @@ static const struct pinmux_ops intel_pinmux_ops = {
|
||||
static int intel_config_get_pull(struct intel_pinctrl *pctrl, unsigned int pin,
|
||||
enum pin_config_param param, u32 *arg)
|
||||
{
|
||||
const struct intel_community *community;
|
||||
void __iomem *padcfg1;
|
||||
unsigned long flags;
|
||||
u32 value, term;
|
||||
|
||||
community = intel_get_community(pctrl, pin);
|
||||
padcfg1 = intel_get_padcfg(pctrl, pin, PADCFG1);
|
||||
|
||||
raw_spin_lock_irqsave(&pctrl->lock, flags);
|
||||
value = readl(padcfg1);
|
||||
raw_spin_unlock_irqrestore(&pctrl->lock, flags);
|
||||
scoped_guard(raw_spinlock_irqsave, &pctrl->lock)
|
||||
value = readl(padcfg1);
|
||||
|
||||
term = (value & PADCFG1_TERM_MASK) >> PADCFG1_TERM_SHIFT;
|
||||
|
||||
@ -592,7 +574,9 @@ static int intel_config_get_pull(struct intel_pinctrl *pctrl, unsigned int pin,
|
||||
|
||||
break;
|
||||
|
||||
case PIN_CONFIG_BIAS_PULL_DOWN:
|
||||
case PIN_CONFIG_BIAS_PULL_DOWN: {
|
||||
const struct intel_community *community = intel_get_community(pctrl, pin);
|
||||
|
||||
if (!term || value & PADCFG1_TERM_UP)
|
||||
return -EINVAL;
|
||||
|
||||
@ -619,6 +603,7 @@ static int intel_config_get_pull(struct intel_pinctrl *pctrl, unsigned int pin,
|
||||
}
|
||||
|
||||
break;
|
||||
}
|
||||
|
||||
default:
|
||||
return -EINVAL;
|
||||
@ -631,7 +616,6 @@ static int intel_config_get_debounce(struct intel_pinctrl *pctrl, unsigned int p
|
||||
enum pin_config_param param, u32 *arg)
|
||||
{
|
||||
void __iomem *padcfg2;
|
||||
unsigned long flags;
|
||||
unsigned long v;
|
||||
u32 value2;
|
||||
|
||||
@ -639,9 +623,9 @@ static int intel_config_get_debounce(struct intel_pinctrl *pctrl, unsigned int p
|
||||
if (!padcfg2)
|
||||
return -ENOTSUPP;
|
||||
|
||||
raw_spin_lock_irqsave(&pctrl->lock, flags);
|
||||
value2 = readl(padcfg2);
|
||||
raw_spin_unlock_irqrestore(&pctrl->lock, flags);
|
||||
scoped_guard(raw_spinlock_irqsave, &pctrl->lock)
|
||||
value2 = readl(padcfg2);
|
||||
|
||||
if (!(value2 & PADCFG2_DEBEN))
|
||||
return -EINVAL;
|
||||
|
||||
@ -690,19 +674,8 @@ static int intel_config_set_pull(struct intel_pinctrl *pctrl, unsigned int pin,
|
||||
{
|
||||
unsigned int param = pinconf_to_config_param(config);
|
||||
unsigned int arg = pinconf_to_config_argument(config);
|
||||
const struct intel_community *community;
|
||||
u32 term = 0, up = 0, value;
|
||||
void __iomem *padcfg1;
|
||||
unsigned long flags;
|
||||
int ret = 0;
|
||||
u32 value;
|
||||
|
||||
community = intel_get_community(pctrl, pin);
|
||||
padcfg1 = intel_get_padcfg(pctrl, pin, PADCFG1);
|
||||
|
||||
raw_spin_lock_irqsave(&pctrl->lock, flags);
|
||||
|
||||
value = readl(padcfg1);
|
||||
value &= ~(PADCFG1_TERM_MASK | PADCFG1_TERM_UP);
|
||||
|
||||
/* Set default strength value in case none is given */
|
||||
if (arg == 1)
|
||||
@ -715,78 +688,77 @@ static int intel_config_set_pull(struct intel_pinctrl *pctrl, unsigned int pin,
|
||||
case PIN_CONFIG_BIAS_PULL_UP:
|
||||
switch (arg) {
|
||||
case 20000:
|
||||
value |= PADCFG1_TERM_20K << PADCFG1_TERM_SHIFT;
|
||||
term = PADCFG1_TERM_20K;
|
||||
break;
|
||||
case 5000:
|
||||
value |= PADCFG1_TERM_5K << PADCFG1_TERM_SHIFT;
|
||||
term = PADCFG1_TERM_5K;
|
||||
break;
|
||||
case 4000:
|
||||
value |= PADCFG1_TERM_4K << PADCFG1_TERM_SHIFT;
|
||||
term = PADCFG1_TERM_4K;
|
||||
break;
|
||||
case 1000:
|
||||
value |= PADCFG1_TERM_1K << PADCFG1_TERM_SHIFT;
|
||||
term = PADCFG1_TERM_1K;
|
||||
break;
|
||||
case 833:
|
||||
value |= PADCFG1_TERM_833 << PADCFG1_TERM_SHIFT;
|
||||
term = PADCFG1_TERM_833;
|
||||
break;
|
||||
default:
|
||||
ret = -EINVAL;
|
||||
break;
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
value |= PADCFG1_TERM_UP;
|
||||
up = PADCFG1_TERM_UP;
|
||||
break;
|
||||
|
||||
case PIN_CONFIG_BIAS_PULL_DOWN:
|
||||
case PIN_CONFIG_BIAS_PULL_DOWN: {
|
||||
const struct intel_community *community = intel_get_community(pctrl, pin);
|
||||
|
||||
switch (arg) {
|
||||
case 20000:
|
||||
value |= PADCFG1_TERM_20K << PADCFG1_TERM_SHIFT;
|
||||
term = PADCFG1_TERM_20K;
|
||||
break;
|
||||
case 5000:
|
||||
value |= PADCFG1_TERM_5K << PADCFG1_TERM_SHIFT;
|
||||
term = PADCFG1_TERM_5K;
|
||||
break;
|
||||
case 4000:
|
||||
value |= PADCFG1_TERM_4K << PADCFG1_TERM_SHIFT;
|
||||
term = PADCFG1_TERM_4K;
|
||||
break;
|
||||
case 1000:
|
||||
if (!(community->features & PINCTRL_FEATURE_1K_PD)) {
|
||||
ret = -EINVAL;
|
||||
break;
|
||||
}
|
||||
value |= PADCFG1_TERM_1K << PADCFG1_TERM_SHIFT;
|
||||
if (!(community->features & PINCTRL_FEATURE_1K_PD))
|
||||
return -EINVAL;
|
||||
term = PADCFG1_TERM_1K;
|
||||
break;
|
||||
case 833:
|
||||
if (!(community->features & PINCTRL_FEATURE_1K_PD)) {
|
||||
ret = -EINVAL;
|
||||
break;
|
||||
}
|
||||
value |= PADCFG1_TERM_833 << PADCFG1_TERM_SHIFT;
|
||||
if (!(community->features & PINCTRL_FEATURE_1K_PD))
|
||||
return -EINVAL;
|
||||
term = PADCFG1_TERM_833;
|
||||
break;
|
||||
default:
|
||||
ret = -EINVAL;
|
||||
break;
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
break;
|
||||
|
||||
default:
|
||||
ret = -EINVAL;
|
||||
break;
|
||||
}
|
||||
|
||||
if (!ret)
|
||||
writel(value, padcfg1);
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
raw_spin_unlock_irqrestore(&pctrl->lock, flags);
|
||||
padcfg1 = intel_get_padcfg(pctrl, pin, PADCFG1);
|
||||
|
||||
return ret;
|
||||
guard(raw_spinlock_irqsave)(&pctrl->lock);
|
||||
|
||||
value = readl(padcfg1);
|
||||
value = (value & ~PADCFG1_TERM_MASK) | (term << PADCFG1_TERM_SHIFT);
|
||||
value = (value & ~PADCFG1_TERM_UP) | up;
|
||||
writel(value, padcfg1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int intel_config_set_debounce(struct intel_pinctrl *pctrl,
|
||||
unsigned int pin, unsigned int debounce)
|
||||
{
|
||||
void __iomem *padcfg0, *padcfg2;
|
||||
unsigned long flags;
|
||||
u32 value0, value2;
|
||||
|
||||
padcfg2 = intel_get_padcfg(pctrl, pin, PADCFG2);
|
||||
@ -795,7 +767,7 @@ static int intel_config_set_debounce(struct intel_pinctrl *pctrl,
|
||||
|
||||
padcfg0 = intel_get_padcfg(pctrl, pin, PADCFG0);
|
||||
|
||||
raw_spin_lock_irqsave(&pctrl->lock, flags);
|
||||
guard(raw_spinlock_irqsave)(&pctrl->lock);
|
||||
|
||||
value0 = readl(padcfg0);
|
||||
value2 = readl(padcfg2);
|
||||
@ -808,10 +780,8 @@ static int intel_config_set_debounce(struct intel_pinctrl *pctrl,
|
||||
unsigned long v;
|
||||
|
||||
v = order_base_2(debounce * NSEC_PER_USEC / DEBOUNCE_PERIOD_NSEC);
|
||||
if (v < 3 || v > 15) {
|
||||
raw_spin_unlock_irqrestore(&pctrl->lock, flags);
|
||||
if (v < 3 || v > 15)
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/* Enable glitch filter and debouncer */
|
||||
value0 |= PADCFG0_PREGFRXSEL;
|
||||
@ -822,8 +792,6 @@ static int intel_config_set_debounce(struct intel_pinctrl *pctrl,
|
||||
writel(value0, padcfg0);
|
||||
writel(value2, padcfg2);
|
||||
|
||||
raw_spin_unlock_irqrestore(&pctrl->lock, flags);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -973,7 +941,6 @@ static void intel_gpio_set(struct gpio_chip *chip, unsigned int offset,
|
||||
int value)
|
||||
{
|
||||
struct intel_pinctrl *pctrl = gpiochip_get_data(chip);
|
||||
unsigned long flags;
|
||||
void __iomem *reg;
|
||||
u32 padcfg0;
|
||||
int pin;
|
||||
@ -986,20 +953,19 @@ static void intel_gpio_set(struct gpio_chip *chip, unsigned int offset,
|
||||
if (!reg)
|
||||
return;
|
||||
|
||||
raw_spin_lock_irqsave(&pctrl->lock, flags);
|
||||
guard(raw_spinlock_irqsave)(&pctrl->lock);
|
||||
|
||||
padcfg0 = readl(reg);
|
||||
if (value)
|
||||
padcfg0 |= PADCFG0_GPIOTXSTATE;
|
||||
else
|
||||
padcfg0 &= ~PADCFG0_GPIOTXSTATE;
|
||||
writel(padcfg0, reg);
|
||||
raw_spin_unlock_irqrestore(&pctrl->lock, flags);
|
||||
}
|
||||
|
||||
static int intel_gpio_get_direction(struct gpio_chip *chip, unsigned int offset)
|
||||
{
|
||||
struct intel_pinctrl *pctrl = gpiochip_get_data(chip);
|
||||
unsigned long flags;
|
||||
void __iomem *reg;
|
||||
u32 padcfg0;
|
||||
int pin;
|
||||
@ -1012,9 +978,9 @@ static int intel_gpio_get_direction(struct gpio_chip *chip, unsigned int offset)
|
||||
if (!reg)
|
||||
return -EINVAL;
|
||||
|
||||
raw_spin_lock_irqsave(&pctrl->lock, flags);
|
||||
padcfg0 = readl(reg);
|
||||
raw_spin_unlock_irqrestore(&pctrl->lock, flags);
|
||||
scoped_guard(raw_spinlock_irqsave, &pctrl->lock)
|
||||
padcfg0 = readl(reg);
|
||||
|
||||
if (padcfg0 & PADCFG0_PMODE_MASK)
|
||||
return -EINVAL;
|
||||
|
||||
@ -1058,15 +1024,17 @@ static void intel_gpio_irq_ack(struct irq_data *d)
|
||||
|
||||
pin = intel_gpio_to_pin(pctrl, irqd_to_hwirq(d), &community, &padgrp);
|
||||
if (pin >= 0) {
|
||||
unsigned int gpp, gpp_offset, is_offset;
|
||||
unsigned int gpp, gpp_offset;
|
||||
void __iomem *is;
|
||||
|
||||
gpp = padgrp->reg_num;
|
||||
gpp_offset = padgroup_offset(padgrp, pin);
|
||||
is_offset = community->is_offset + gpp * 4;
|
||||
|
||||
raw_spin_lock(&pctrl->lock);
|
||||
writel(BIT(gpp_offset), community->regs + is_offset);
|
||||
raw_spin_unlock(&pctrl->lock);
|
||||
is = community->regs + community->is_offset + gpp * 4;
|
||||
|
||||
guard(raw_spinlock)(&pctrl->lock);
|
||||
|
||||
writel(BIT(gpp_offset), is);
|
||||
}
|
||||
}
|
||||
|
||||
@ -1080,7 +1048,6 @@ static void intel_gpio_irq_mask_unmask(struct gpio_chip *gc, irq_hw_number_t hwi
|
||||
pin = intel_gpio_to_pin(pctrl, hwirq, &community, &padgrp);
|
||||
if (pin >= 0) {
|
||||
unsigned int gpp, gpp_offset;
|
||||
unsigned long flags;
|
||||
void __iomem *reg, *is;
|
||||
u32 value;
|
||||
|
||||
@ -1090,7 +1057,7 @@ static void intel_gpio_irq_mask_unmask(struct gpio_chip *gc, irq_hw_number_t hwi
|
||||
reg = community->regs + community->ie_offset + gpp * 4;
|
||||
is = community->regs + community->is_offset + gpp * 4;
|
||||
|
||||
raw_spin_lock_irqsave(&pctrl->lock, flags);
|
||||
guard(raw_spinlock_irqsave)(&pctrl->lock);
|
||||
|
||||
/* Clear interrupt status first to avoid unexpected interrupt */
|
||||
writel(BIT(gpp_offset), is);
|
||||
@ -1101,7 +1068,6 @@ static void intel_gpio_irq_mask_unmask(struct gpio_chip *gc, irq_hw_number_t hwi
|
||||
else
|
||||
value |= BIT(gpp_offset);
|
||||
writel(value, reg);
|
||||
raw_spin_unlock_irqrestore(&pctrl->lock, flags);
|
||||
}
|
||||
}
|
||||
|
||||
@ -1129,7 +1095,6 @@ static int intel_gpio_irq_type(struct irq_data *d, unsigned int type)
|
||||
struct intel_pinctrl *pctrl = gpiochip_get_data(gc);
|
||||
unsigned int pin = intel_gpio_to_pin(pctrl, irqd_to_hwirq(d), NULL, NULL);
|
||||
u32 rxevcfg, rxinv, value;
|
||||
unsigned long flags;
|
||||
void __iomem *reg;
|
||||
|
||||
reg = intel_get_padcfg(pctrl, pin, PADCFG0);
|
||||
@ -1163,7 +1128,7 @@ static int intel_gpio_irq_type(struct irq_data *d, unsigned int type)
|
||||
else
|
||||
rxinv = 0;
|
||||
|
||||
raw_spin_lock_irqsave(&pctrl->lock, flags);
|
||||
guard(raw_spinlock_irqsave)(&pctrl->lock);
|
||||
|
||||
intel_gpio_set_gpio_mode(reg);
|
||||
|
||||
@ -1179,8 +1144,6 @@ static int intel_gpio_irq_type(struct irq_data *d, unsigned int type)
|
||||
else if (type & IRQ_TYPE_LEVEL_MASK)
|
||||
irq_set_handler_locked(d, handle_level_irq);
|
||||
|
||||
raw_spin_unlock_irqrestore(&pctrl->lock, flags);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -1219,16 +1182,19 @@ static int intel_gpio_community_irq_handler(struct intel_pinctrl *pctrl,
|
||||
|
||||
for (gpp = 0; gpp < community->ngpps; gpp++) {
|
||||
const struct intel_padgroup *padgrp = &community->gpps[gpp];
|
||||
unsigned long pending, enabled, gpp_offset;
|
||||
unsigned long pending, enabled;
|
||||
unsigned int gpp, gpp_offset;
|
||||
void __iomem *reg, *is;
|
||||
|
||||
raw_spin_lock(&pctrl->lock);
|
||||
gpp = padgrp->reg_num;
|
||||
|
||||
pending = readl(community->regs + community->is_offset +
|
||||
padgrp->reg_num * 4);
|
||||
enabled = readl(community->regs + community->ie_offset +
|
||||
padgrp->reg_num * 4);
|
||||
reg = community->regs + community->ie_offset + gpp * 4;
|
||||
is = community->regs + community->is_offset + gpp * 4;
|
||||
|
||||
raw_spin_unlock(&pctrl->lock);
|
||||
scoped_guard(raw_spinlock, &pctrl->lock) {
|
||||
pending = readl(is);
|
||||
enabled = readl(reg);
|
||||
}
|
||||
|
||||
/* Only interrupts that are enabled */
|
||||
pending &= enabled;
|
||||
@ -1264,16 +1230,18 @@ static void intel_gpio_irq_init(struct intel_pinctrl *pctrl)
|
||||
|
||||
for (i = 0; i < pctrl->ncommunities; i++) {
|
||||
const struct intel_community *community;
|
||||
void __iomem *base;
|
||||
void __iomem *reg, *is;
|
||||
unsigned int gpp;
|
||||
|
||||
community = &pctrl->communities[i];
|
||||
base = community->regs;
|
||||
|
||||
for (gpp = 0; gpp < community->ngpps; gpp++) {
|
||||
reg = community->regs + community->ie_offset + gpp * 4;
|
||||
is = community->regs + community->is_offset + gpp * 4;
|
||||
|
||||
/* Mask and clear all interrupts */
|
||||
writel(0, base + community->ie_offset + gpp * 4);
|
||||
writel(0xffff, base + community->is_offset + gpp * 4);
|
||||
writel(0, reg);
|
||||
writel(0xffff, is);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@ -10,11 +10,11 @@
|
||||
#ifndef PINCTRL_INTEL_H
|
||||
#define PINCTRL_INTEL_H
|
||||
|
||||
#include <linux/array_size.h>
|
||||
#include <linux/bits.h>
|
||||
#include <linux/compiler_types.h>
|
||||
#include <linux/gpio/driver.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/pm.h>
|
||||
#include <linux/pinctrl/pinctrl.h>
|
||||
#include <linux/spinlock_types.h>
|
||||
|
||||
@ -8,14 +8,14 @@
|
||||
*/
|
||||
|
||||
#include <linux/acpi.h>
|
||||
#include <linux/array_size.h>
|
||||
#include <linux/bitops.h>
|
||||
#include <linux/gpio/driver.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/pm_runtime.h>
|
||||
#include <linux/pm.h>
|
||||
#include <linux/seq_file.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/types.h>
|
||||
@ -337,8 +337,6 @@ static int lp_gpio_request_enable(struct pinctrl_dev *pctldev,
|
||||
unsigned long flags;
|
||||
u32 value;
|
||||
|
||||
pm_runtime_get(lg->dev);
|
||||
|
||||
raw_spin_lock_irqsave(&lg->lock, flags);
|
||||
|
||||
/*
|
||||
@ -373,8 +371,6 @@ static void lp_gpio_disable_free(struct pinctrl_dev *pctldev,
|
||||
lp_gpio_disable_input(conf2);
|
||||
|
||||
raw_spin_unlock_irqrestore(&lg->lock, flags);
|
||||
|
||||
pm_runtime_put(lg->dev);
|
||||
}
|
||||
|
||||
static int lp_gpio_set_direction(struct pinctrl_dev *pctldev,
|
||||
@ -841,24 +837,6 @@ static int lp_gpio_probe(struct platform_device *pdev)
|
||||
return ret;
|
||||
}
|
||||
|
||||
pm_runtime_enable(dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int lp_gpio_remove(struct platform_device *pdev)
|
||||
{
|
||||
pm_runtime_disable(&pdev->dev);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int lp_gpio_runtime_suspend(struct device *dev)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int lp_gpio_runtime_resume(struct device *dev)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -876,10 +854,7 @@ static int lp_gpio_resume(struct device *dev)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct dev_pm_ops lp_gpio_pm_ops = {
|
||||
SYSTEM_SLEEP_PM_OPS(NULL, lp_gpio_resume)
|
||||
RUNTIME_PM_OPS(lp_gpio_runtime_suspend, lp_gpio_runtime_resume, NULL)
|
||||
};
|
||||
static DEFINE_SIMPLE_DEV_PM_OPS(lp_gpio_pm_ops, NULL, lp_gpio_resume);
|
||||
|
||||
static const struct acpi_device_id lynxpoint_gpio_acpi_match[] = {
|
||||
{ "INT33C7", (kernel_ulong_t)&lptlp_soc_data },
|
||||
@ -890,10 +865,9 @@ MODULE_DEVICE_TABLE(acpi, lynxpoint_gpio_acpi_match);
|
||||
|
||||
static struct platform_driver lp_gpio_driver = {
|
||||
.probe = lp_gpio_probe,
|
||||
.remove = lp_gpio_remove,
|
||||
.driver = {
|
||||
.name = "lp_gpio",
|
||||
.pm = pm_ptr(&lp_gpio_pm_ops),
|
||||
.pm = pm_sleep_ptr(&lp_gpio_pm_ops),
|
||||
.acpi_match_table = lynxpoint_gpio_acpi_match,
|
||||
},
|
||||
};
|
||||
|
||||
@ -6,8 +6,8 @@
|
||||
* Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
|
||||
*/
|
||||
|
||||
#include <linux/array_size.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/mod_devicetable.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/platform_device.h>
|
||||
|
||||
@ -6,8 +6,8 @@
|
||||
* Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
|
||||
*/
|
||||
|
||||
#include <linux/array_size.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/mod_devicetable.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/platform_device.h>
|
||||
|
||||
@ -45,7 +45,7 @@ static int mtk_pinmux_set_mux(struct pinctrl_dev *pctldev,
|
||||
struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
|
||||
struct function_desc *func;
|
||||
struct group_desc *grp;
|
||||
int i;
|
||||
int i, err;
|
||||
|
||||
func = pinmux_generic_get_function(pctldev, selector);
|
||||
if (!func)
|
||||
@ -67,8 +67,11 @@ static int mtk_pinmux_set_mux(struct pinctrl_dev *pctldev,
|
||||
if (!desc->name)
|
||||
return -ENOTSUPP;
|
||||
|
||||
mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE,
|
||||
pin_modes[i]);
|
||||
err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE,
|
||||
pin_modes[i]);
|
||||
|
||||
if (err)
|
||||
return err;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
@ -611,6 +611,9 @@ static int mt7981_wo0_jtag_1_funcs[] = { 5, 5, 5, 5, 5, };
|
||||
static int mt7981_uart2_0_pins[] = { 4, 5, 6, 7, };
|
||||
static int mt7981_uart2_0_funcs[] = { 3, 3, 3, 3, };
|
||||
|
||||
static int mt7981_uart2_0_tx_rx_pins[] = { 4, 5, };
|
||||
static int mt7981_uart2_0_tx_rx_funcs[] = { 3, 3, };
|
||||
|
||||
/* GBE_LED0 */
|
||||
static int mt7981_gbe_led0_pins[] = { 8, };
|
||||
static int mt7981_gbe_led0_funcs[] = { 3, };
|
||||
@ -731,6 +734,9 @@ static int mt7981_uart1_0_funcs[] = { 4, 4, 4, 4, };
|
||||
static int mt7981_uart1_1_pins[] = { 26, 27, 28, 29, };
|
||||
static int mt7981_uart1_1_funcs[] = { 2, 2, 2, 2, };
|
||||
|
||||
static int mt7981_uart1_2_pins[] = { 9, 10, };
|
||||
static int mt7981_uart1_2_funcs[] = { 2, 2, };
|
||||
|
||||
/* UART2 */
|
||||
static int mt7981_uart2_1_pins[] = { 22, 23, 24, 25, };
|
||||
static int mt7981_uart2_1_funcs[] = { 3, 3, 3, 3, };
|
||||
@ -805,6 +811,8 @@ static const struct group_desc mt7981_groups[] = {
|
||||
PINCTRL_PIN_GROUP("wo0_jtag_0", mt7981_wo0_jtag_0),
|
||||
/* @GPIO(4,7) WM_JTAG(3) */
|
||||
PINCTRL_PIN_GROUP("uart2_0", mt7981_uart2_0),
|
||||
/* @GPIO(4,5) WM_JTAG(4) */
|
||||
PINCTRL_PIN_GROUP("uart2_0_tx_rx", mt7981_uart2_0_tx_rx),
|
||||
/* @GPIO(8) GBE_LED0(3) */
|
||||
PINCTRL_PIN_GROUP("gbe_led0", mt7981_gbe_led0),
|
||||
/* @GPIO(4,6) PTA_EXT(4) */
|
||||
@ -861,6 +869,8 @@ static const struct group_desc mt7981_groups[] = {
|
||||
PINCTRL_PIN_GROUP("uart1_0", mt7981_uart1_0),
|
||||
/* @GPIO(26,29): UART1(2) */
|
||||
PINCTRL_PIN_GROUP("uart1_1", mt7981_uart1_1),
|
||||
/* @GPIO(9,10): UART1(2) */
|
||||
PINCTRL_PIN_GROUP("uart1_2", mt7981_uart1_2),
|
||||
/* @GPIO(22,25): UART1(3) */
|
||||
PINCTRL_PIN_GROUP("uart2_1", mt7981_uart2_1),
|
||||
/* @GPIO(22,24) PTA_EXT(4) */
|
||||
@ -922,9 +932,9 @@ static const struct group_desc mt7981_groups[] = {
|
||||
*/
|
||||
static const char *mt7981_wa_aice_groups[] = { "wa_aice1", "wa_aice2", "wm_aice1_1",
|
||||
"wa_aice3", "wm_aice1_2", };
|
||||
static const char *mt7981_uart_groups[] = { "wm_uart_0", "uart2_0",
|
||||
"net_wo0_uart_txd_0", "net_wo0_uart_txd_1", "net_wo0_uart_txd_2",
|
||||
"uart1_0", "uart1_1", "uart2_1", "wm_aurt_1", "wm_aurt_2", "uart0", };
|
||||
static const char *mt7981_uart_groups[] = { "net_wo0_uart_txd_0", "net_wo0_uart_txd_1",
|
||||
"net_wo0_uart_txd_2", "uart0", "uart1_0", "uart1_1", "uart1_2", "uart2_0",
|
||||
"uart2_0_tx_rx", "uart2_1", "wm_uart_0", "wm_aurt_1", "wm_aurt_2", };
|
||||
static const char *mt7981_dfd_groups[] = { "dfd", "dfd_ntrst", };
|
||||
static const char *mt7981_wdt_groups[] = { "watchdog", "watchdog1", };
|
||||
static const char *mt7981_pcie_groups[] = { "pcie_pereset", "pcie_clk", "pcie_wake", };
|
||||
|
||||
@ -779,9 +779,7 @@ static int mtk_pmx_set_mux(struct pinctrl_dev *pctldev,
|
||||
return -EINVAL;
|
||||
|
||||
desc = (const struct mtk_pin_desc *)&hw->soc->pins[grp->pin];
|
||||
mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE, desc_func->muxval);
|
||||
|
||||
return 0;
|
||||
return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE, desc_func->muxval);
|
||||
}
|
||||
|
||||
static const struct pinmux_ops mtk_pmxops = {
|
||||
|
||||
@ -73,4 +73,10 @@ config PINCTRL_AMLOGIC_C3
|
||||
select PINCTRL_MESON_AXG_PMX
|
||||
default y
|
||||
|
||||
config PINCTRL_AMLOGIC_T7
|
||||
tristate "Amlogic T7 SoC pinctrl driver"
|
||||
depends on ARM64
|
||||
select PINCTRL_MESON_AXG_PMX
|
||||
default y
|
||||
|
||||
endif
|
||||
|
||||
@ -11,3 +11,4 @@ obj-$(CONFIG_PINCTRL_MESON_G12A) += pinctrl-meson-g12a.o
|
||||
obj-$(CONFIG_PINCTRL_MESON_A1) += pinctrl-meson-a1.o
|
||||
obj-$(CONFIG_PINCTRL_MESON_S4) += pinctrl-meson-s4.o
|
||||
obj-$(CONFIG_PINCTRL_AMLOGIC_C3) += pinctrl-amlogic-c3.o
|
||||
obj-$(CONFIG_PINCTRL_AMLOGIC_T7) += pinctrl-amlogic-t7.o
|
||||
|
||||
1611
drivers/pinctrl/meson/pinctrl-amlogic-t7.c
Normal file
1611
drivers/pinctrl/meson/pinctrl-amlogic-t7.c
Normal file
File diff suppressed because it is too large
Load Diff
@ -12,8 +12,8 @@
|
||||
#include <linux/io.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <linux/pinctrl/pinctrl.h>
|
||||
#include <linux/property.h>
|
||||
|
||||
#include "pinctrl-mvebu.h"
|
||||
|
||||
@ -404,13 +404,8 @@ static struct pinctrl_gpio_range armada_38x_mpp_gpio_ranges[] = {
|
||||
static int armada_38x_pinctrl_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct mvebu_pinctrl_soc_info *soc = &armada_38x_pinctrl_info;
|
||||
const struct of_device_id *match =
|
||||
of_match_device(armada_38x_pinctrl_of_match, &pdev->dev);
|
||||
|
||||
if (!match)
|
||||
return -ENODEV;
|
||||
|
||||
soc->variant = (unsigned) match->data & 0xff;
|
||||
soc->variant = (unsigned)device_get_match_data(&pdev->dev) & 0xff;
|
||||
soc->controls = armada_38x_mpp_controls;
|
||||
soc->ncontrols = ARRAY_SIZE(armada_38x_mpp_controls);
|
||||
soc->gpioranges = armada_38x_mpp_gpio_ranges;
|
||||
|
||||
@ -12,8 +12,8 @@
|
||||
#include <linux/io.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <linux/pinctrl/pinctrl.h>
|
||||
#include <linux/property.h>
|
||||
|
||||
#include "pinctrl-mvebu.h"
|
||||
|
||||
@ -386,13 +386,8 @@ static struct pinctrl_gpio_range armada_39x_mpp_gpio_ranges[] = {
|
||||
static int armada_39x_pinctrl_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct mvebu_pinctrl_soc_info *soc = &armada_39x_pinctrl_info;
|
||||
const struct of_device_id *match =
|
||||
of_match_device(armada_39x_pinctrl_of_match, &pdev->dev);
|
||||
|
||||
if (!match)
|
||||
return -ENODEV;
|
||||
|
||||
soc->variant = (unsigned) match->data & 0xff;
|
||||
soc->variant = (unsigned)device_get_match_data(&pdev->dev) & 0xff;
|
||||
soc->controls = armada_39x_mpp_controls;
|
||||
soc->ncontrols = ARRAY_SIZE(armada_39x_mpp_controls);
|
||||
soc->gpioranges = armada_39x_mpp_gpio_ranges;
|
||||
|
||||
@ -13,7 +13,6 @@
|
||||
#include <linux/io.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <linux/pinctrl/pinctrl.h>
|
||||
|
||||
#include "pinctrl-mvebu.h"
|
||||
@ -106,10 +105,8 @@ static struct pinctrl_gpio_range armada_ap806_mpp_gpio_ranges[] = {
|
||||
static int armada_ap806_pinctrl_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct mvebu_pinctrl_soc_info *soc = &armada_ap806_pinctrl_info;
|
||||
const struct of_device_id *match =
|
||||
of_match_device(armada_ap806_pinctrl_of_match, &pdev->dev);
|
||||
|
||||
if (!match || !pdev->dev.parent)
|
||||
if (!pdev->dev.parent)
|
||||
return -ENODEV;
|
||||
|
||||
soc->variant = 0; /* no variants for Armada AP806 */
|
||||
|
||||
@ -12,9 +12,9 @@
|
||||
#include <linux/io.h>
|
||||
#include <linux/mfd/syscon.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <linux/pinctrl/pinctrl.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/property.h>
|
||||
|
||||
#include "pinctrl-mvebu.h"
|
||||
|
||||
@ -638,8 +638,6 @@ static void mvebu_pinctrl_assign_variant(struct mvebu_mpp_mode *m,
|
||||
static int armada_cp110_pinctrl_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct mvebu_pinctrl_soc_info *soc;
|
||||
const struct of_device_id *match =
|
||||
of_match_device(armada_cp110_pinctrl_of_match, &pdev->dev);
|
||||
int i;
|
||||
|
||||
if (!pdev->dev.parent)
|
||||
@ -650,7 +648,7 @@ static int armada_cp110_pinctrl_probe(struct platform_device *pdev)
|
||||
if (!soc)
|
||||
return -ENOMEM;
|
||||
|
||||
soc->variant = (unsigned long) match->data & 0xff;
|
||||
soc->variant = (unsigned long)device_get_match_data(&pdev->dev) & 0xff;
|
||||
soc->controls = armada_cp110_mpp_controls;
|
||||
soc->ncontrols = ARRAY_SIZE(armada_cp110_mpp_controls);
|
||||
soc->modes = armada_cp110_mpp_modes;
|
||||
|
||||
@ -19,8 +19,8 @@
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <linux/pinctrl/pinctrl.h>
|
||||
#include <linux/property.h>
|
||||
#include <linux/bitops.h>
|
||||
|
||||
#include "pinctrl-mvebu.h"
|
||||
@ -568,14 +568,9 @@ static int armada_xp_pinctrl_resume(struct platform_device *pdev)
|
||||
static int armada_xp_pinctrl_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct mvebu_pinctrl_soc_info *soc = &armada_xp_pinctrl_info;
|
||||
const struct of_device_id *match =
|
||||
of_match_device(armada_xp_pinctrl_of_match, &pdev->dev);
|
||||
int nregs;
|
||||
|
||||
if (!match)
|
||||
return -ENODEV;
|
||||
|
||||
soc->variant = (unsigned) match->data & 0xff;
|
||||
soc->variant = (unsigned)device_get_match_data(&pdev->dev) & 0xff;
|
||||
|
||||
switch (soc->variant) {
|
||||
case V_MV78230:
|
||||
|
||||
@ -12,9 +12,9 @@
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <linux/mfd/syscon.h>
|
||||
#include <linux/pinctrl/pinctrl.h>
|
||||
#include <linux/property.h>
|
||||
#include <linux/regmap.h>
|
||||
|
||||
#include "pinctrl-mvebu.h"
|
||||
@ -765,13 +765,11 @@ static int dove_pinctrl_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct resource *res, *mpp_res;
|
||||
struct resource fb_res;
|
||||
const struct of_device_id *match =
|
||||
of_match_device(dove_pinctrl_of_match, &pdev->dev);
|
||||
struct mvebu_mpp_ctrl_data *mpp_data;
|
||||
void __iomem *base;
|
||||
int i;
|
||||
|
||||
pdev->dev.platform_data = (void *)match->data;
|
||||
pdev->dev.platform_data = (void *)device_get_match_data(&pdev->dev);
|
||||
|
||||
/*
|
||||
* General MPP Configuration Register is part of pdma registers.
|
||||
|
||||
@ -11,8 +11,8 @@
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <linux/pinctrl/pinctrl.h>
|
||||
#include <linux/property.h>
|
||||
|
||||
#include "pinctrl-mvebu.h"
|
||||
|
||||
@ -470,10 +470,7 @@ static const struct of_device_id kirkwood_pinctrl_of_match[] = {
|
||||
|
||||
static int kirkwood_pinctrl_probe(struct platform_device *pdev)
|
||||
{
|
||||
const struct of_device_id *match =
|
||||
of_match_device(kirkwood_pinctrl_of_match, &pdev->dev);
|
||||
|
||||
pdev->dev.platform_data = (void *)match->data;
|
||||
pdev->dev.platform_data = (void *)device_get_match_data(&pdev->dev);
|
||||
|
||||
return mvebu_pinctrl_simple_mmio_probe(pdev);
|
||||
}
|
||||
|
||||
@ -19,8 +19,8 @@
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <linux/pinctrl/pinctrl.h>
|
||||
#include <linux/property.h>
|
||||
|
||||
#include "pinctrl-mvebu.h"
|
||||
|
||||
@ -218,10 +218,7 @@ static const struct of_device_id orion_pinctrl_of_match[] = {
|
||||
|
||||
static int orion_pinctrl_probe(struct platform_device *pdev)
|
||||
{
|
||||
const struct of_device_id *match =
|
||||
of_match_device(orion_pinctrl_of_match, &pdev->dev);
|
||||
|
||||
pdev->dev.platform_data = (void*)match->data;
|
||||
pdev->dev.platform_data = (void*)device_get_match_data(&pdev->dev);
|
||||
|
||||
mpp_base = devm_platform_ioremap_resource(pdev, 0);
|
||||
if (IS_ERR(mpp_base))
|
||||
|
||||
@ -17,6 +17,7 @@
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/property.h>
|
||||
#include <linux/seq_file.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/types.h>
|
||||
@ -985,7 +986,6 @@ static const struct of_device_id abx500_gpio_match[] = {
|
||||
static int abx500_gpio_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct device_node *np = pdev->dev.of_node;
|
||||
const struct of_device_id *match;
|
||||
struct abx500_pinctrl *pct;
|
||||
unsigned int id = -1;
|
||||
int ret;
|
||||
@ -1006,12 +1006,7 @@ static int abx500_gpio_probe(struct platform_device *pdev)
|
||||
pct->chip.parent = &pdev->dev;
|
||||
pct->chip.base = -1; /* Dynamic allocation */
|
||||
|
||||
match = of_match_device(abx500_gpio_match, &pdev->dev);
|
||||
if (!match) {
|
||||
dev_err(&pdev->dev, "gpio dt not matching\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
id = (unsigned long)match->data;
|
||||
id = (unsigned long)device_get_match_data(&pdev->dev);
|
||||
|
||||
/* Poke in other ASIC variants here */
|
||||
switch (id) {
|
||||
@ -1079,12 +1074,11 @@ out_rem_chip:
|
||||
* abx500_gpio_remove() - remove Ab8500-gpio driver
|
||||
* @pdev: Platform device registered
|
||||
*/
|
||||
static int abx500_gpio_remove(struct platform_device *pdev)
|
||||
static void abx500_gpio_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct abx500_pinctrl *pct = platform_get_drvdata(pdev);
|
||||
|
||||
gpiochip_remove(&pct->chip);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_driver abx500_gpio_driver = {
|
||||
@ -1093,7 +1087,7 @@ static struct platform_driver abx500_gpio_driver = {
|
||||
.of_match_table = abx500_gpio_match,
|
||||
},
|
||||
.probe = abx500_gpio_probe,
|
||||
.remove = abx500_gpio_remove,
|
||||
.remove_new = abx500_gpio_remove,
|
||||
};
|
||||
|
||||
static int __init abx500_gpio_init(void)
|
||||
|
||||
@ -16,9 +16,11 @@
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <linux/of_platform.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/property.h>
|
||||
#include <linux/seq_file.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/spinlock.h>
|
||||
@ -1838,7 +1840,6 @@ static int nmk_pinctrl_resume(struct device *dev)
|
||||
|
||||
static int nmk_pinctrl_probe(struct platform_device *pdev)
|
||||
{
|
||||
const struct of_device_id *match;
|
||||
struct device_node *np = pdev->dev.of_node;
|
||||
struct device_node *prcm_np;
|
||||
struct nmk_pinctrl *npct;
|
||||
@ -1849,10 +1850,7 @@ static int nmk_pinctrl_probe(struct platform_device *pdev)
|
||||
if (!npct)
|
||||
return -ENOMEM;
|
||||
|
||||
match = of_match_device(nmk_pinctrl_match, &pdev->dev);
|
||||
if (!match)
|
||||
return -ENODEV;
|
||||
version = (unsigned int) match->data;
|
||||
version = (unsigned int)device_get_match_data(&pdev->dev);
|
||||
|
||||
/* Poke in other ASIC variants here */
|
||||
if (version == PINCTRL_NMK_STN8815)
|
||||
|
||||
@ -2,8 +2,7 @@
|
||||
|
||||
config PINCTRL_WPCM450
|
||||
tristate "Pinctrl and GPIO driver for Nuvoton WPCM450"
|
||||
depends on ARCH_WPCM450 || COMPILE_TEST
|
||||
depends on OF
|
||||
depends on (ARCH_WPCM450 || COMPILE_TEST) && OF
|
||||
select PINMUX
|
||||
select PINCONF
|
||||
select GENERIC_PINCONF
|
||||
@ -32,3 +31,17 @@ config PINCTRL_NPCM7XX
|
||||
help
|
||||
Say Y here to enable pin controller and GPIO support
|
||||
for Nuvoton NPCM750/730/715/705 SoCs.
|
||||
|
||||
config PINCTRL_NPCM8XX
|
||||
tristate "Pinctrl and GPIO driver for Nuvoton NPCM8XX"
|
||||
depends on (ARCH_NPCM || COMPILE_TEST) && OF
|
||||
select PINMUX
|
||||
select PINCONF
|
||||
select GENERIC_PINCONF
|
||||
select GPIOLIB
|
||||
select GPIO_GENERIC
|
||||
select GPIOLIB_IRQCHIP
|
||||
help
|
||||
Say Y or M here to enable pin controller and GPIO support for
|
||||
the Nuvoton NPCM8XX SoC. This is strongly recommended when
|
||||
building a kernel that will run on this chip.
|
||||
|
||||
@ -3,3 +3,4 @@
|
||||
|
||||
obj-$(CONFIG_PINCTRL_WPCM450) += pinctrl-wpcm450.o
|
||||
obj-$(CONFIG_PINCTRL_NPCM7XX) += pinctrl-npcm7xx.o
|
||||
obj-$(CONFIG_PINCTRL_NPCM8XX) += pinctrl-npcm8xx.o
|
||||
|
||||
@ -1588,19 +1588,6 @@ static int npcm7xx_get_group_pins(struct pinctrl_dev *pctldev,
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int npcm7xx_dt_node_to_map(struct pinctrl_dev *pctldev,
|
||||
struct device_node *np_config,
|
||||
struct pinctrl_map **map,
|
||||
u32 *num_maps)
|
||||
{
|
||||
struct npcm7xx_pinctrl *npcm = pinctrl_dev_get_drvdata(pctldev);
|
||||
|
||||
dev_dbg(npcm->dev, "dt_node_to_map: %s\n", np_config->name);
|
||||
return pinconf_generic_dt_node_to_map(pctldev, np_config,
|
||||
map, num_maps,
|
||||
PIN_MAP_TYPE_INVALID);
|
||||
}
|
||||
|
||||
static void npcm7xx_dt_free_map(struct pinctrl_dev *pctldev,
|
||||
struct pinctrl_map *map, u32 num_maps)
|
||||
{
|
||||
@ -1612,7 +1599,7 @@ static const struct pinctrl_ops npcm7xx_pinctrl_ops = {
|
||||
.get_group_name = npcm7xx_get_group_name,
|
||||
.get_group_pins = npcm7xx_get_group_pins,
|
||||
.pin_dbg_show = npcm7xx_pin_dbg_show,
|
||||
.dt_node_to_map = npcm7xx_dt_node_to_map,
|
||||
.dt_node_to_map = pinconf_generic_dt_node_to_map_all,
|
||||
.dt_free_map = npcm7xx_dt_free_map,
|
||||
};
|
||||
|
||||
|
||||
2491
drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c
Normal file
2491
drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c
Normal file
File diff suppressed because it is too large
Load Diff
@ -858,16 +858,6 @@ static int wpcm450_get_group_pins(struct pinctrl_dev *pctldev,
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int wpcm450_dt_node_to_map(struct pinctrl_dev *pctldev,
|
||||
struct device_node *np_config,
|
||||
struct pinctrl_map **map,
|
||||
u32 *num_maps)
|
||||
{
|
||||
return pinconf_generic_dt_node_to_map(pctldev, np_config,
|
||||
map, num_maps,
|
||||
PIN_MAP_TYPE_INVALID);
|
||||
}
|
||||
|
||||
static void wpcm450_dt_free_map(struct pinctrl_dev *pctldev,
|
||||
struct pinctrl_map *map, u32 num_maps)
|
||||
{
|
||||
@ -878,7 +868,7 @@ static const struct pinctrl_ops wpcm450_pinctrl_ops = {
|
||||
.get_groups_count = wpcm450_get_groups_count,
|
||||
.get_group_name = wpcm450_get_group_name,
|
||||
.get_group_pins = wpcm450_get_group_pins,
|
||||
.dt_node_to_map = wpcm450_dt_node_to_map,
|
||||
.dt_node_to_map = pinconf_generic_dt_node_to_map_all,
|
||||
.dt_free_map = wpcm450_dt_free_map,
|
||||
};
|
||||
|
||||
|
||||
@ -10,17 +10,19 @@
|
||||
|
||||
#define pr_fmt(fmt) "generic pinconfig core: " fmt
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/array_size.h>
|
||||
#include <linux/debugfs.h>
|
||||
#include <linux/seq_file.h>
|
||||
#include <linux/pinctrl/pinctrl.h>
|
||||
#include <linux/pinctrl/pinconf.h>
|
||||
#include <linux/pinctrl/pinconf-generic.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/seq_file.h>
|
||||
|
||||
#include <linux/pinctrl/pinconf-generic.h>
|
||||
#include <linux/pinctrl/pinconf.h>
|
||||
#include <linux/pinctrl/pinctrl.h>
|
||||
|
||||
#include "core.h"
|
||||
#include "pinconf.h"
|
||||
#include "pinctrl-utils.h"
|
||||
|
||||
@ -9,16 +9,18 @@
|
||||
*/
|
||||
#define pr_fmt(fmt) "pinconfig core: " fmt
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/array_size.h>
|
||||
#include <linux/debugfs.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/seq_file.h>
|
||||
#include <linux/slab.h>
|
||||
|
||||
#include <linux/pinctrl/machine.h>
|
||||
#include <linux/pinctrl/pinctrl.h>
|
||||
#include <linux/pinctrl/pinconf.h>
|
||||
#include <linux/pinctrl/pinctrl.h>
|
||||
|
||||
#include "core.h"
|
||||
#include "pinconf.h"
|
||||
|
||||
|
||||
@ -1166,7 +1166,7 @@ out2:
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int amd_gpio_remove(struct platform_device *pdev)
|
||||
static void amd_gpio_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct amd_gpio *gpio_dev;
|
||||
|
||||
@ -1174,8 +1174,6 @@ static int amd_gpio_remove(struct platform_device *pdev)
|
||||
|
||||
gpiochip_remove(&gpio_dev->gc);
|
||||
acpi_unregister_wakeup_handler(amd_gpio_check_wake, gpio_dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_ACPI
|
||||
@ -1197,7 +1195,7 @@ static struct platform_driver amd_gpio_driver = {
|
||||
#endif
|
||||
},
|
||||
.probe = amd_gpio_probe,
|
||||
.remove = amd_gpio_remove,
|
||||
.remove_new = amd_gpio_remove,
|
||||
};
|
||||
|
||||
module_platform_driver(amd_gpio_driver);
|
||||
|
||||
@ -970,13 +970,11 @@ static int artpec6_pmx_probe(struct platform_device *pdev)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int artpec6_pmx_remove(struct platform_device *pdev)
|
||||
static void artpec6_pmx_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct artpec6_pmx *pmx = platform_get_drvdata(pdev);
|
||||
|
||||
pinctrl_unregister(pmx->pctl);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct of_device_id artpec6_pinctrl_match[] = {
|
||||
@ -990,7 +988,7 @@ static struct platform_driver artpec6_pmx_driver = {
|
||||
.of_match_table = artpec6_pinctrl_match,
|
||||
},
|
||||
.probe = artpec6_pmx_probe,
|
||||
.remove = artpec6_pmx_remove,
|
||||
.remove_new = artpec6_pmx_remove,
|
||||
};
|
||||
|
||||
static int __init artpec6_pmx_init(void)
|
||||
|
||||
@ -587,12 +587,11 @@ fail_range_add:
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int as3722_pinctrl_remove(struct platform_device *pdev)
|
||||
static void as3722_pinctrl_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct as3722_pctrl_info *as_pci = platform_get_drvdata(pdev);
|
||||
|
||||
gpiochip_remove(&as_pci->gpio_chip);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct of_device_id as3722_pinctrl_of_match[] = {
|
||||
@ -607,7 +606,7 @@ static struct platform_driver as3722_pinctrl_driver = {
|
||||
.of_match_table = as3722_pinctrl_of_match,
|
||||
},
|
||||
.probe = as3722_pinctrl_probe,
|
||||
.remove = as3722_pinctrl_remove,
|
||||
.remove_new = as3722_pinctrl_remove,
|
||||
};
|
||||
module_platform_driver(as3722_pinctrl_driver);
|
||||
|
||||
|
||||
@ -12,10 +12,9 @@
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <linux/of_irq.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/pm.h>
|
||||
#include <linux/property.h>
|
||||
#include <linux/seq_file.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/string_helpers.h>
|
||||
@ -1302,8 +1301,8 @@ static int at91_pinctrl_probe_dt(struct platform_device *pdev,
|
||||
if (!np)
|
||||
return -ENODEV;
|
||||
|
||||
info->dev = dev;
|
||||
info->ops = of_device_get_match_data(dev);
|
||||
info->dev = &pdev->dev;
|
||||
info->ops = device_get_match_data(&pdev->dev);
|
||||
at91_pinctrl_child_count(info, np);
|
||||
|
||||
/*
|
||||
@ -1845,7 +1844,7 @@ static int at91_gpio_probe(struct platform_device *pdev)
|
||||
if (IS_ERR(at91_chip->regbase))
|
||||
return PTR_ERR(at91_chip->regbase);
|
||||
|
||||
at91_chip->ops = of_device_get_match_data(dev);
|
||||
at91_chip->ops = device_get_match_data(dev);
|
||||
at91_chip->pioc_virq = irq;
|
||||
|
||||
at91_chip->clock = devm_clk_get_enabled(dev, NULL);
|
||||
|
||||
@ -1346,9 +1346,7 @@ static int cy8c95x0_probe(struct i2c_client *client)
|
||||
chip->dev = &client->dev;
|
||||
|
||||
/* Set the device type */
|
||||
chip->driver_data = (unsigned long)device_get_match_data(&client->dev);
|
||||
if (!chip->driver_data)
|
||||
chip->driver_data = i2c_match_id(cy8c95x0_id, client)->driver_data;
|
||||
chip->driver_data = (uintptr_t)i2c_get_match_data(client);
|
||||
if (!chip->driver_data)
|
||||
return -ENODEV;
|
||||
|
||||
|
||||
@ -22,6 +22,14 @@ struct regmap;
|
||||
|
||||
struct pinctrl_dev;
|
||||
|
||||
struct mcp23s08_info {
|
||||
const struct regmap_config *regmap;
|
||||
const char *label;
|
||||
unsigned int type;
|
||||
u16 ngpio;
|
||||
bool reg_shift;
|
||||
};
|
||||
|
||||
struct mcp23s08 {
|
||||
u8 addr;
|
||||
bool irq_active_high;
|
||||
|
||||
@ -10,9 +10,8 @@
|
||||
|
||||
static int mcp230xx_probe(struct i2c_client *client)
|
||||
{
|
||||
const struct i2c_device_id *id = i2c_client_get_device_id(client);
|
||||
const struct mcp23s08_info *info;
|
||||
struct device *dev = &client->dev;
|
||||
unsigned int type = id->driver_data;
|
||||
struct mcp23s08 *mcp;
|
||||
int ret;
|
||||
|
||||
@ -20,40 +19,21 @@ static int mcp230xx_probe(struct i2c_client *client)
|
||||
if (!mcp)
|
||||
return -ENOMEM;
|
||||
|
||||
switch (type) {
|
||||
case MCP_TYPE_008:
|
||||
mcp->regmap = devm_regmap_init_i2c(client, &mcp23x08_regmap);
|
||||
mcp->reg_shift = 0;
|
||||
mcp->chip.ngpio = 8;
|
||||
mcp->chip.label = "mcp23008";
|
||||
break;
|
||||
|
||||
case MCP_TYPE_017:
|
||||
mcp->regmap = devm_regmap_init_i2c(client, &mcp23x17_regmap);
|
||||
mcp->reg_shift = 1;
|
||||
mcp->chip.ngpio = 16;
|
||||
mcp->chip.label = "mcp23017";
|
||||
break;
|
||||
|
||||
case MCP_TYPE_018:
|
||||
mcp->regmap = devm_regmap_init_i2c(client, &mcp23x17_regmap);
|
||||
mcp->reg_shift = 1;
|
||||
mcp->chip.ngpio = 16;
|
||||
mcp->chip.label = "mcp23018";
|
||||
break;
|
||||
|
||||
default:
|
||||
dev_err(dev, "invalid device type (%d)\n", type);
|
||||
return -EINVAL;
|
||||
}
|
||||
info = i2c_get_match_data(client);
|
||||
if (!info)
|
||||
return dev_err_probe(dev, -EINVAL, "invalid device type\n");
|
||||
|
||||
mcp->reg_shift = info->reg_shift;
|
||||
mcp->chip.ngpio = info->ngpio;
|
||||
mcp->chip.label = info->label;
|
||||
mcp->regmap = devm_regmap_init_i2c(client, info->regmap);
|
||||
if (IS_ERR(mcp->regmap))
|
||||
return PTR_ERR(mcp->regmap);
|
||||
|
||||
mcp->irq = client->irq;
|
||||
mcp->pinctrl_desc.name = "mcp23xxx-pinctrl";
|
||||
|
||||
ret = mcp23s08_probe_one(mcp, dev, client->addr, type, -1);
|
||||
ret = mcp23s08_probe_one(mcp, dev, client->addr, info->type, -1);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
@ -62,36 +42,45 @@ static int mcp230xx_probe(struct i2c_client *client)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct mcp23s08_info mcp23008_i2c = {
|
||||
.regmap = &mcp23x08_regmap,
|
||||
.label = "mcp23008",
|
||||
.type = MCP_TYPE_008,
|
||||
.ngpio = 8,
|
||||
.reg_shift = 0,
|
||||
};
|
||||
|
||||
static const struct mcp23s08_info mcp23017_i2c = {
|
||||
.regmap = &mcp23x17_regmap,
|
||||
.label = "mcp23017",
|
||||
.type = MCP_TYPE_017,
|
||||
.ngpio = 16,
|
||||
.reg_shift = 1,
|
||||
};
|
||||
|
||||
static const struct mcp23s08_info mcp23018_i2c = {
|
||||
.regmap = &mcp23x17_regmap,
|
||||
.label = "mcp23018",
|
||||
.type = MCP_TYPE_018,
|
||||
.ngpio = 16,
|
||||
.reg_shift = 1,
|
||||
};
|
||||
|
||||
static const struct i2c_device_id mcp230xx_id[] = {
|
||||
{ "mcp23008", MCP_TYPE_008 },
|
||||
{ "mcp23017", MCP_TYPE_017 },
|
||||
{ "mcp23018", MCP_TYPE_018 },
|
||||
{ "mcp23008", (kernel_ulong_t)&mcp23008_i2c },
|
||||
{ "mcp23017", (kernel_ulong_t)&mcp23017_i2c },
|
||||
{ "mcp23018", (kernel_ulong_t)&mcp23018_i2c },
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(i2c, mcp230xx_id);
|
||||
|
||||
static const struct of_device_id mcp23s08_i2c_of_match[] = {
|
||||
{
|
||||
.compatible = "microchip,mcp23008",
|
||||
.data = (void *) MCP_TYPE_008,
|
||||
},
|
||||
{
|
||||
.compatible = "microchip,mcp23017",
|
||||
.data = (void *) MCP_TYPE_017,
|
||||
},
|
||||
{
|
||||
.compatible = "microchip,mcp23018",
|
||||
.data = (void *) MCP_TYPE_018,
|
||||
},
|
||||
{ .compatible = "microchip,mcp23008", .data = &mcp23008_i2c },
|
||||
{ .compatible = "microchip,mcp23017", .data = &mcp23017_i2c },
|
||||
{ .compatible = "microchip,mcp23018", .data = &mcp23018_i2c },
|
||||
/* NOTE: The use of the mcp prefix is deprecated and will be removed. */
|
||||
{
|
||||
.compatible = "mcp,mcp23008",
|
||||
.data = (void *) MCP_TYPE_008,
|
||||
},
|
||||
{
|
||||
.compatible = "mcp,mcp23017",
|
||||
.data = (void *) MCP_TYPE_017,
|
||||
},
|
||||
{ .compatible = "mcp,mcp23008", .data = &mcp23008_i2c },
|
||||
{ .compatible = "mcp,mcp23017", .data = &mcp23017_i2c },
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, mcp23s08_i2c_of_match);
|
||||
|
||||
@ -80,21 +80,18 @@ static const struct regmap_bus mcp23sxx_spi_regmap = {
|
||||
};
|
||||
|
||||
static int mcp23s08_spi_regmap_init(struct mcp23s08 *mcp, struct device *dev,
|
||||
unsigned int addr, unsigned int type)
|
||||
unsigned int addr,
|
||||
const struct mcp23s08_info *info)
|
||||
{
|
||||
const struct regmap_config *config;
|
||||
struct regmap_config *copy;
|
||||
const char *name;
|
||||
|
||||
switch (type) {
|
||||
switch (info->type) {
|
||||
case MCP_TYPE_S08:
|
||||
mcp->reg_shift = 0;
|
||||
mcp->chip.ngpio = 8;
|
||||
mcp->chip.label = devm_kasprintf(dev, GFP_KERNEL, "mcp23s08.%d", addr);
|
||||
if (!mcp->chip.label)
|
||||
return -ENOMEM;
|
||||
|
||||
config = &mcp23x08_regmap;
|
||||
name = devm_kasprintf(dev, GFP_KERNEL, "%d", addr);
|
||||
if (!name)
|
||||
return -ENOMEM;
|
||||
@ -102,13 +99,10 @@ static int mcp23s08_spi_regmap_init(struct mcp23s08 *mcp, struct device *dev,
|
||||
break;
|
||||
|
||||
case MCP_TYPE_S17:
|
||||
mcp->reg_shift = 1;
|
||||
mcp->chip.ngpio = 16;
|
||||
mcp->chip.label = devm_kasprintf(dev, GFP_KERNEL, "mcp23s17.%d", addr);
|
||||
if (!mcp->chip.label)
|
||||
return -ENOMEM;
|
||||
|
||||
config = &mcp23x17_regmap;
|
||||
name = devm_kasprintf(dev, GFP_KERNEL, "%d", addr);
|
||||
if (!name)
|
||||
return -ENOMEM;
|
||||
@ -116,20 +110,18 @@ static int mcp23s08_spi_regmap_init(struct mcp23s08 *mcp, struct device *dev,
|
||||
break;
|
||||
|
||||
case MCP_TYPE_S18:
|
||||
mcp->reg_shift = 1;
|
||||
mcp->chip.ngpio = 16;
|
||||
mcp->chip.label = "mcp23s18";
|
||||
|
||||
config = &mcp23x17_regmap;
|
||||
name = config->name;
|
||||
mcp->chip.label = info->label;
|
||||
name = info->regmap->name;
|
||||
break;
|
||||
|
||||
default:
|
||||
dev_err(dev, "invalid device type (%d)\n", type);
|
||||
dev_err(dev, "invalid device type (%d)\n", info->type);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
copy = devm_kmemdup(dev, config, sizeof(*config), GFP_KERNEL);
|
||||
mcp->reg_shift = info->reg_shift;
|
||||
mcp->chip.ngpio = info->ngpio;
|
||||
copy = devm_kmemdup(dev, info->regmap, sizeof(*info->regmap), GFP_KERNEL);
|
||||
if (!copy)
|
||||
return -ENOMEM;
|
||||
|
||||
@ -143,22 +135,17 @@ static int mcp23s08_spi_regmap_init(struct mcp23s08 *mcp, struct device *dev,
|
||||
|
||||
static int mcp23s08_probe(struct spi_device *spi)
|
||||
{
|
||||
struct device *dev = &spi->dev;
|
||||
struct mcp23s08_driver_data *data;
|
||||
const struct mcp23s08_info *info;
|
||||
struct device *dev = &spi->dev;
|
||||
unsigned long spi_present_mask;
|
||||
const void *match;
|
||||
unsigned int addr;
|
||||
unsigned int ngpio = 0;
|
||||
unsigned int addr;
|
||||
int chips;
|
||||
int type;
|
||||
int ret;
|
||||
u32 v;
|
||||
|
||||
match = device_get_match_data(dev);
|
||||
if (match)
|
||||
type = (int)(uintptr_t)match;
|
||||
else
|
||||
type = spi_get_device_id(spi)->driver_data;
|
||||
info = spi_get_device_match_data(spi);
|
||||
|
||||
ret = device_property_read_u32(dev, "microchip,spi-present-mask", &v);
|
||||
if (ret) {
|
||||
@ -187,7 +174,7 @@ static int mcp23s08_probe(struct spi_device *spi)
|
||||
data->mcp[addr] = &data->chip[--chips];
|
||||
data->mcp[addr]->irq = spi->irq;
|
||||
|
||||
ret = mcp23s08_spi_regmap_init(data->mcp[addr], dev, addr, type);
|
||||
ret = mcp23s08_spi_regmap_init(data->mcp[addr], dev, addr, info);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
@ -197,7 +184,8 @@ static int mcp23s08_probe(struct spi_device *spi)
|
||||
if (!data->mcp[addr]->pinctrl_desc.name)
|
||||
return -ENOMEM;
|
||||
|
||||
ret = mcp23s08_probe_one(data->mcp[addr], dev, 0x40 | (addr << 1), type, -1);
|
||||
ret = mcp23s08_probe_one(data->mcp[addr], dev, 0x40 | (addr << 1),
|
||||
info->type, -1);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
@ -208,36 +196,43 @@ static int mcp23s08_probe(struct spi_device *spi)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct mcp23s08_info mcp23s08_spi = {
|
||||
.regmap = &mcp23x08_regmap,
|
||||
.type = MCP_TYPE_S08,
|
||||
.ngpio = 8,
|
||||
.reg_shift = 0,
|
||||
};
|
||||
|
||||
static const struct mcp23s08_info mcp23s17_spi = {
|
||||
.regmap = &mcp23x17_regmap,
|
||||
.type = MCP_TYPE_S17,
|
||||
.ngpio = 16,
|
||||
.reg_shift = 1,
|
||||
};
|
||||
|
||||
static const struct mcp23s08_info mcp23s18_spi = {
|
||||
.regmap = &mcp23x17_regmap,
|
||||
.label = "mcp23s18",
|
||||
.type = MCP_TYPE_S18,
|
||||
.ngpio = 16,
|
||||
.reg_shift = 1,
|
||||
};
|
||||
|
||||
static const struct spi_device_id mcp23s08_ids[] = {
|
||||
{ "mcp23s08", MCP_TYPE_S08 },
|
||||
{ "mcp23s17", MCP_TYPE_S17 },
|
||||
{ "mcp23s18", MCP_TYPE_S18 },
|
||||
{ "mcp23s08", (kernel_ulong_t)&mcp23s08_spi },
|
||||
{ "mcp23s17", (kernel_ulong_t)&mcp23s17_spi },
|
||||
{ "mcp23s18", (kernel_ulong_t)&mcp23s18_spi },
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(spi, mcp23s08_ids);
|
||||
|
||||
static const struct of_device_id mcp23s08_spi_of_match[] = {
|
||||
{
|
||||
.compatible = "microchip,mcp23s08",
|
||||
.data = (void *) MCP_TYPE_S08,
|
||||
},
|
||||
{
|
||||
.compatible = "microchip,mcp23s17",
|
||||
.data = (void *) MCP_TYPE_S17,
|
||||
},
|
||||
{
|
||||
.compatible = "microchip,mcp23s18",
|
||||
.data = (void *) MCP_TYPE_S18,
|
||||
},
|
||||
{ .compatible = "microchip,mcp23s08", .data = &mcp23s08_spi },
|
||||
{ .compatible = "microchip,mcp23s17", .data = &mcp23s17_spi },
|
||||
{ .compatible = "microchip,mcp23s18", .data = &mcp23s18_spi },
|
||||
/* NOTE: The use of the mcp prefix is deprecated and will be removed. */
|
||||
{
|
||||
.compatible = "mcp,mcp23s08",
|
||||
.data = (void *) MCP_TYPE_S08,
|
||||
},
|
||||
{
|
||||
.compatible = "mcp,mcp23s17",
|
||||
.data = (void *) MCP_TYPE_S17,
|
||||
},
|
||||
{ .compatible = "mcp,mcp23s08", .data = &mcp23s08_spi },
|
||||
{ .compatible = "mcp,mcp23s17", .data = &mcp23s17_spi },
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, mcp23s08_spi_of_match);
|
||||
|
||||
@ -3429,7 +3429,7 @@ static int rockchip_pinctrl_probe(struct platform_device *pdev)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int rockchip_pinctrl_remove(struct platform_device *pdev)
|
||||
static void rockchip_pinctrl_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct rockchip_pinctrl *info = platform_get_drvdata(pdev);
|
||||
struct rockchip_pin_bank *bank;
|
||||
@ -3450,8 +3450,6 @@ static int rockchip_pinctrl_remove(struct platform_device *pdev)
|
||||
}
|
||||
mutex_unlock(&bank->deferred_lock);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct rockchip_pin_bank px30_pin_banks[] = {
|
||||
@ -3982,7 +3980,7 @@ static const struct of_device_id rockchip_pinctrl_dt_match[] = {
|
||||
|
||||
static struct platform_driver rockchip_pinctrl_driver = {
|
||||
.probe = rockchip_pinctrl_probe,
|
||||
.remove = rockchip_pinctrl_remove,
|
||||
.remove_new = rockchip_pinctrl_remove,
|
||||
.driver = {
|
||||
.name = "rockchip-pinctrl",
|
||||
.pm = &rockchip_pinctrl_dev_pm_ops,
|
||||
|
||||
@ -239,32 +239,32 @@ static struct lock_class_key pcs_request_class;
|
||||
* does not help in this case.
|
||||
*/
|
||||
|
||||
static unsigned __maybe_unused pcs_readb(void __iomem *reg)
|
||||
static unsigned int pcs_readb(void __iomem *reg)
|
||||
{
|
||||
return readb(reg);
|
||||
}
|
||||
|
||||
static unsigned __maybe_unused pcs_readw(void __iomem *reg)
|
||||
static unsigned int pcs_readw(void __iomem *reg)
|
||||
{
|
||||
return readw(reg);
|
||||
}
|
||||
|
||||
static unsigned __maybe_unused pcs_readl(void __iomem *reg)
|
||||
static unsigned int pcs_readl(void __iomem *reg)
|
||||
{
|
||||
return readl(reg);
|
||||
}
|
||||
|
||||
static void __maybe_unused pcs_writeb(unsigned val, void __iomem *reg)
|
||||
static void pcs_writeb(unsigned int val, void __iomem *reg)
|
||||
{
|
||||
writeb(val, reg);
|
||||
}
|
||||
|
||||
static void __maybe_unused pcs_writew(unsigned val, void __iomem *reg)
|
||||
static void pcs_writew(unsigned int val, void __iomem *reg)
|
||||
{
|
||||
writew(val, reg);
|
||||
}
|
||||
|
||||
static void __maybe_unused pcs_writel(unsigned val, void __iomem *reg)
|
||||
static void pcs_writel(unsigned int val, void __iomem *reg)
|
||||
{
|
||||
writel(val, reg);
|
||||
}
|
||||
@ -1925,16 +1925,11 @@ free:
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int pcs_remove(struct platform_device *pdev)
|
||||
static void pcs_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct pcs_device *pcs = platform_get_drvdata(pdev);
|
||||
|
||||
if (!pcs)
|
||||
return 0;
|
||||
|
||||
pcs_free_resources(pcs);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct pcs_soc_data pinctrl_single_omap_wkup = {
|
||||
@ -1982,7 +1977,7 @@ MODULE_DEVICE_TABLE(of, pcs_of_match);
|
||||
|
||||
static struct platform_driver pcs_driver = {
|
||||
.probe = pcs_probe,
|
||||
.remove = pcs_remove,
|
||||
.remove_new = pcs_remove,
|
||||
.driver = {
|
||||
.name = DRIVER_NAME,
|
||||
.of_match_table = pcs_of_match,
|
||||
|
||||
@ -734,14 +734,18 @@ static int stmfx_pinctrl_probe(struct platform_device *pdev)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int stmfx_pinctrl_remove(struct platform_device *pdev)
|
||||
static void stmfx_pinctrl_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct stmfx *stmfx = dev_get_drvdata(pdev->dev.parent);
|
||||
int ret;
|
||||
|
||||
return stmfx_function_disable(stmfx,
|
||||
STMFX_FUNC_GPIO |
|
||||
STMFX_FUNC_ALTGPIO_LOW |
|
||||
STMFX_FUNC_ALTGPIO_HIGH);
|
||||
ret = stmfx_function_disable(stmfx,
|
||||
STMFX_FUNC_GPIO |
|
||||
STMFX_FUNC_ALTGPIO_LOW |
|
||||
STMFX_FUNC_ALTGPIO_HIGH);
|
||||
if (ret)
|
||||
dev_err(&pdev->dev, "Failed to disable pins (%pe)\n",
|
||||
ERR_PTR(ret));
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM_SLEEP
|
||||
@ -850,7 +854,7 @@ static struct platform_driver stmfx_pinctrl_driver = {
|
||||
.pm = &stmfx_pinctrl_dev_pm_ops,
|
||||
},
|
||||
.probe = stmfx_pinctrl_probe,
|
||||
.remove = stmfx_pinctrl_remove,
|
||||
.remove_new = stmfx_pinctrl_remove,
|
||||
};
|
||||
module_platform_driver(stmfx_pinctrl_driver);
|
||||
|
||||
|
||||
@ -1116,7 +1116,6 @@ static const struct regmap_config sx150x_regmap_config = {
|
||||
|
||||
static int sx150x_probe(struct i2c_client *client)
|
||||
{
|
||||
const struct i2c_device_id *id = i2c_client_get_device_id(client);
|
||||
static const u32 i2c_funcs = I2C_FUNC_SMBUS_BYTE_DATA |
|
||||
I2C_FUNC_SMBUS_WRITE_WORD_DATA;
|
||||
struct device *dev = &client->dev;
|
||||
@ -1135,11 +1134,7 @@ static int sx150x_probe(struct i2c_client *client)
|
||||
pctl->dev = dev;
|
||||
pctl->client = client;
|
||||
|
||||
if (dev->of_node)
|
||||
pctl->data = of_device_get_match_data(dev);
|
||||
else
|
||||
pctl->data = (struct sx150x_device_data *)id->driver_data;
|
||||
|
||||
pctl->data = i2c_get_match_data(client);
|
||||
if (!pctl->data)
|
||||
return -EINVAL;
|
||||
|
||||
|
||||
@ -804,13 +804,11 @@ fail:
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int tb10x_pinctrl_remove(struct platform_device *pdev)
|
||||
static void tb10x_pinctrl_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct tb10x_pinctrl *state = platform_get_drvdata(pdev);
|
||||
|
||||
mutex_destroy(&state->mutex);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
@ -822,7 +820,7 @@ MODULE_DEVICE_TABLE(of, tb10x_pinctrl_dt_ids);
|
||||
|
||||
static struct platform_driver tb10x_pinctrl_pdrv = {
|
||||
.probe = tb10x_pinctrl_probe,
|
||||
.remove = tb10x_pinctrl_remove,
|
||||
.remove_new = tb10x_pinctrl_remove,
|
||||
.driver = {
|
||||
.name = "tb10x_pinctrl",
|
||||
.of_match_table = of_match_ptr(tb10x_pinctrl_dt_ids),
|
||||
|
||||
@ -6,12 +6,14 @@
|
||||
*
|
||||
* Author: Laxman Dewangan <ldewangan@nvidia.com>
|
||||
*/
|
||||
#include <linux/array_size.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/export.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/pinctrl/pinctrl.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/slab.h>
|
||||
|
||||
#include <linux/pinctrl/pinctrl.h>
|
||||
|
||||
#include "core.h"
|
||||
#include "pinctrl-utils.h"
|
||||
|
||||
|
||||
@ -11,12 +11,12 @@
|
||||
#include <linux/gpio/driver.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/of_platform.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/ioport.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/property.h>
|
||||
|
||||
#include "pinctrl-lantiq.h"
|
||||
|
||||
@ -1451,7 +1451,6 @@ MODULE_DEVICE_TABLE(of, xway_match);
|
||||
|
||||
static int pinmux_xway_probe(struct platform_device *pdev)
|
||||
{
|
||||
const struct of_device_id *match;
|
||||
const struct pinctrl_xway_soc *xway_soc;
|
||||
int ret, i;
|
||||
|
||||
@ -1460,10 +1459,8 @@ static int pinmux_xway_probe(struct platform_device *pdev)
|
||||
if (IS_ERR(xway_info.membase[0]))
|
||||
return PTR_ERR(xway_info.membase[0]);
|
||||
|
||||
match = of_match_device(xway_match, &pdev->dev);
|
||||
if (match)
|
||||
xway_soc = (const struct pinctrl_xway_soc *) match->data;
|
||||
else
|
||||
xway_soc = device_get_match_data(&pdev->dev);
|
||||
if (!xway_soc)
|
||||
xway_soc = &danube_pinctrl;
|
||||
|
||||
/* find out how many pads we have */
|
||||
|
||||
@ -12,12 +12,12 @@
|
||||
*/
|
||||
#define pr_fmt(fmt) "pinmux core: " fmt
|
||||
|
||||
#include <linux/array_size.h>
|
||||
#include <linux/ctype.h>
|
||||
#include <linux/debugfs.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/list.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/radix-tree.h>
|
||||
@ -173,10 +173,8 @@ static int pin_request(struct pinctrl_dev *pctldev,
|
||||
else
|
||||
status = 0;
|
||||
|
||||
if (status) {
|
||||
dev_err(pctldev->dev, "request() failed for pin %d\n", pin);
|
||||
if (status)
|
||||
module_put(pctldev->owner);
|
||||
}
|
||||
|
||||
out_free_pin:
|
||||
if (status) {
|
||||
|
||||
@ -629,7 +629,7 @@ static struct platform_driver apq8064_pinctrl_driver = {
|
||||
.of_match_table = apq8064_pinctrl_of_match,
|
||||
},
|
||||
.probe = apq8064_pinctrl_probe,
|
||||
.remove = msm_pinctrl_remove,
|
||||
.remove_new = msm_pinctrl_remove,
|
||||
};
|
||||
|
||||
static int __init apq8064_pinctrl_init(void)
|
||||
|
||||
@ -1207,7 +1207,7 @@ static struct platform_driver apq8084_pinctrl_driver = {
|
||||
.of_match_table = apq8084_pinctrl_of_match,
|
||||
},
|
||||
.probe = apq8084_pinctrl_probe,
|
||||
.remove = msm_pinctrl_remove,
|
||||
.remove_new = msm_pinctrl_remove,
|
||||
};
|
||||
|
||||
static int __init apq8084_pinctrl_init(void)
|
||||
|
||||
@ -710,7 +710,7 @@ static struct platform_driver ipq4019_pinctrl_driver = {
|
||||
.of_match_table = ipq4019_pinctrl_of_match,
|
||||
},
|
||||
.probe = ipq4019_pinctrl_probe,
|
||||
.remove = msm_pinctrl_remove,
|
||||
.remove_new = msm_pinctrl_remove,
|
||||
};
|
||||
|
||||
static int __init ipq4019_pinctrl_init(void)
|
||||
|
||||
@ -754,7 +754,7 @@ static struct platform_driver ipq5018_pinctrl_driver = {
|
||||
.of_match_table = ipq5018_pinctrl_of_match,
|
||||
},
|
||||
.probe = ipq5018_pinctrl_probe,
|
||||
.remove = msm_pinctrl_remove,
|
||||
.remove_new = msm_pinctrl_remove,
|
||||
};
|
||||
|
||||
static int __init ipq5018_pinctrl_init(void)
|
||||
|
||||
@ -834,7 +834,7 @@ static struct platform_driver ipq5332_pinctrl_driver = {
|
||||
.of_match_table = ipq5332_pinctrl_of_match,
|
||||
},
|
||||
.probe = ipq5332_pinctrl_probe,
|
||||
.remove = msm_pinctrl_remove,
|
||||
.remove_new = msm_pinctrl_remove,
|
||||
};
|
||||
|
||||
static int __init ipq5332_pinctrl_init(void)
|
||||
|
||||
@ -1080,7 +1080,7 @@ static struct platform_driver ipq6018_pinctrl_driver = {
|
||||
.of_match_table = ipq6018_pinctrl_of_match,
|
||||
},
|
||||
.probe = ipq6018_pinctrl_probe,
|
||||
.remove = msm_pinctrl_remove,
|
||||
.remove_new = msm_pinctrl_remove,
|
||||
};
|
||||
|
||||
static int __init ipq6018_pinctrl_init(void)
|
||||
|
||||
@ -631,7 +631,7 @@ static struct platform_driver ipq8064_pinctrl_driver = {
|
||||
.of_match_table = ipq8064_pinctrl_of_match,
|
||||
},
|
||||
.probe = ipq8064_pinctrl_probe,
|
||||
.remove = msm_pinctrl_remove,
|
||||
.remove_new = msm_pinctrl_remove,
|
||||
};
|
||||
|
||||
static int __init ipq8064_pinctrl_init(void)
|
||||
|
||||
@ -1041,7 +1041,7 @@ static struct platform_driver ipq8074_pinctrl_driver = {
|
||||
.of_match_table = ipq8074_pinctrl_of_match,
|
||||
},
|
||||
.probe = ipq8074_pinctrl_probe,
|
||||
.remove = msm_pinctrl_remove,
|
||||
.remove_new = msm_pinctrl_remove,
|
||||
};
|
||||
|
||||
static int __init ipq8074_pinctrl_init(void)
|
||||
|
||||
@ -799,7 +799,7 @@ static struct platform_driver ipq9574_pinctrl_driver = {
|
||||
.of_match_table = ipq9574_pinctrl_of_match,
|
||||
},
|
||||
.probe = ipq9574_pinctrl_probe,
|
||||
.remove = msm_pinctrl_remove,
|
||||
.remove_new = msm_pinctrl_remove,
|
||||
};
|
||||
|
||||
static int __init ipq9574_pinctrl_init(void)
|
||||
|
||||
@ -495,7 +495,7 @@ err_pinctrl:
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(lpi_pinctrl_probe);
|
||||
|
||||
int lpi_pinctrl_remove(struct platform_device *pdev)
|
||||
void lpi_pinctrl_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct lpi_pinctrl *pctrl = platform_get_drvdata(pdev);
|
||||
int i;
|
||||
@ -505,8 +505,6 @@ int lpi_pinctrl_remove(struct platform_device *pdev)
|
||||
|
||||
for (i = 0; i < pctrl->data->npins; i++)
|
||||
pinctrl_generic_remove_group(pctrl->ctrl, i);
|
||||
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(lpi_pinctrl_remove);
|
||||
|
||||
|
||||
@ -85,6 +85,6 @@ struct lpi_pinctrl_variant_data {
|
||||
};
|
||||
|
||||
int lpi_pinctrl_probe(struct platform_device *pdev);
|
||||
int lpi_pinctrl_remove(struct platform_device *pdev);
|
||||
void lpi_pinctrl_remove(struct platform_device *pdev);
|
||||
|
||||
#endif /*__PINCTRL_LPASS_LPI_H__*/
|
||||
|
||||
@ -1059,7 +1059,7 @@ static struct platform_driver mdm9607_pinctrl_driver = {
|
||||
.of_match_table = mdm9607_pinctrl_of_match,
|
||||
},
|
||||
.probe = mdm9607_pinctrl_probe,
|
||||
.remove = msm_pinctrl_remove,
|
||||
.remove_new = msm_pinctrl_remove,
|
||||
};
|
||||
|
||||
static int __init mdm9607_pinctrl_init(void)
|
||||
|
||||
@ -446,7 +446,7 @@ static struct platform_driver mdm9615_pinctrl_driver = {
|
||||
.of_match_table = mdm9615_pinctrl_of_match,
|
||||
},
|
||||
.probe = mdm9615_pinctrl_probe,
|
||||
.remove = msm_pinctrl_remove,
|
||||
.remove_new = msm_pinctrl_remove,
|
||||
};
|
||||
|
||||
static int __init mdm9615_pinctrl_init(void)
|
||||
|
||||
@ -1547,15 +1547,13 @@ int msm_pinctrl_probe(struct platform_device *pdev,
|
||||
}
|
||||
EXPORT_SYMBOL(msm_pinctrl_probe);
|
||||
|
||||
int msm_pinctrl_remove(struct platform_device *pdev)
|
||||
void msm_pinctrl_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct msm_pinctrl *pctrl = platform_get_drvdata(pdev);
|
||||
|
||||
gpiochip_remove(&pctrl->chip);
|
||||
|
||||
unregister_restart_handler(&pctrl->restart_nb);
|
||||
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(msm_pinctrl_remove);
|
||||
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user