scsi: ufs: qcom: Get queue ID from MSI index in ESI handler

platform_msi_domain_alloc_irqs() does not always get consecutive IRQ
numbers, hence queue IDs calculated out from IRQ numbers may be incorrect
if we assume IRQ numbers are consecutive. Fix this by passing msi_desc to
ESI handler to use msi_desc->msi_index as queue ID.

Co-developed-by: Can Guo <quic_cang@quicinc.com>
Signed-off-by: Can Guo <quic_cang@quicinc.com>
Signed-off-by: Ziqi Chen <quic_ziqichen@quicinc.com>
Link: https://lore.kernel.org/r/1689062349-77385-1-git-send-email-quic_ziqichen@quicinc.com
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
Ziqi Chen 2023-07-11 15:59:08 +08:00 committed by Martin K. Petersen
parent 29f45ed18a
commit 8f2b78652d
2 changed files with 10 additions and 16 deletions

View File

@ -1643,11 +1643,13 @@ static void ufs_qcom_write_msi_msg(struct msi_desc *desc, struct msi_msg *msg)
ufshcd_mcq_config_esi(hba, msg); ufshcd_mcq_config_esi(hba, msg);
} }
static irqreturn_t ufs_qcom_mcq_esi_handler(int irq, void *__hba) static irqreturn_t ufs_qcom_mcq_esi_handler(int irq, void *data)
{ {
struct ufs_hba *hba = __hba; struct msi_desc *desc = data;
struct device *dev = msi_desc_to_dev(desc);
struct ufs_hba *hba = dev_get_drvdata(dev);
struct ufs_qcom_host *host = ufshcd_get_variant(hba); struct ufs_qcom_host *host = ufshcd_get_variant(hba);
u32 id = irq - host->esi_base; u32 id = desc->msi_index;
struct ufs_hw_queue *hwq = &hba->uhq[id]; struct ufs_hw_queue *hwq = &hba->uhq[id];
ufshcd_mcq_write_cqis(hba, 0x1, id); ufshcd_mcq_write_cqis(hba, 0x1, id);
@ -1665,8 +1667,6 @@ static int ufs_qcom_config_esi(struct ufs_hba *hba)
if (host->esi_enabled) if (host->esi_enabled)
return 0; return 0;
else if (host->esi_base < 0)
return -EINVAL;
/* /*
* 1. We only handle CQs as of now. * 1. We only handle CQs as of now.
@ -1675,16 +1675,15 @@ static int ufs_qcom_config_esi(struct ufs_hba *hba)
nr_irqs = hba->nr_hw_queues - hba->nr_queues[HCTX_TYPE_POLL]; nr_irqs = hba->nr_hw_queues - hba->nr_queues[HCTX_TYPE_POLL];
ret = platform_msi_domain_alloc_irqs(hba->dev, nr_irqs, ret = platform_msi_domain_alloc_irqs(hba->dev, nr_irqs,
ufs_qcom_write_msi_msg); ufs_qcom_write_msi_msg);
if (ret) if (ret) {
dev_err(hba->dev, "Failed to request Platform MSI %d\n", ret);
goto out; goto out;
}
msi_for_each_desc(desc, hba->dev, MSI_DESC_ALL) { msi_for_each_desc(desc, hba->dev, MSI_DESC_ALL) {
if (!desc->msi_index)
host->esi_base = desc->irq;
ret = devm_request_irq(hba->dev, desc->irq, ret = devm_request_irq(hba->dev, desc->irq,
ufs_qcom_mcq_esi_handler, ufs_qcom_mcq_esi_handler,
IRQF_SHARED, "qcom-mcq-esi", hba); IRQF_SHARED, "qcom-mcq-esi", desc);
if (ret) { if (ret) {
dev_err(hba->dev, "%s: Fail to request IRQ for %d, err = %d\n", dev_err(hba->dev, "%s: Fail to request IRQ for %d, err = %d\n",
__func__, desc->irq, ret); __func__, desc->irq, ret);
@ -1712,12 +1711,8 @@ static int ufs_qcom_config_esi(struct ufs_hba *hba)
} }
out: out:
if (ret) { if (!ret)
host->esi_base = -1;
dev_warn(hba->dev, "Failed to request Platform MSI %d\n", ret);
} else {
host->esi_enabled = true; host->esi_enabled = true;
}
return ret; return ret;
} }

View File

@ -226,7 +226,6 @@ struct ufs_qcom_host {
u32 hs_gear; u32 hs_gear;
int esi_base;
bool esi_enabled; bool esi_enabled;
}; };