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drm/radeon: force the UVD DPB into VRAM as well
Seems to be mandatory for WMV playback. Bugs: https://bugs.freedesktop.org/show_bug.cgi?id=100510 Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -117,11 +117,13 @@ static int radeon_cs_parser_relocs(struct radeon_cs_parser *p)
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priority = (r->flags & RADEON_RELOC_PRIO_MASK) * 2
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+ !!r->write_domain;
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/* the first reloc of an UVD job is the msg and that must be in
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VRAM, also but everything into VRAM on AGP cards and older
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IGP chips to avoid image corruptions */
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/* The first reloc of an UVD job is the msg and that must be in
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* VRAM, the second reloc is the DPB and for WMV that must be in
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* VRAM as well. Also put everything into VRAM on AGP cards and older
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* IGP chips to avoid image corruptions
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*/
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if (p->ring == R600_RING_TYPE_UVD_INDEX &&
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(i == 0 || pci_find_capability(p->rdev->ddev->pdev,
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(i <= 0 || pci_find_capability(p->rdev->ddev->pdev,
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PCI_CAP_ID_AGP) ||
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p->rdev->family == CHIP_RS780 ||
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p->rdev->family == CHIP_RS880)) {
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@ -621,7 +621,7 @@ static int radeon_uvd_cs_reloc(struct radeon_cs_parser *p,
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}
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/* TODO: is this still necessary on NI+ ? */
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if ((cmd == 0 || cmd == 0x3) &&
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if ((cmd == 0 || cmd == 1 || cmd == 0x3) &&
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(start >> 28) != (p->rdev->uvd.gpu_addr >> 28)) {
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DRM_ERROR("msg/fb buffer %LX-%LX out of 256MB segment!\n",
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start, end);
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