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[PATCH] ppc32 CPM_UART: various fixes for pq2 uart users
This fixes various odd things that missed update together with cpm_uart platform_device move. Unified resources names, restructurisation, etc. Also, addressed issue with recent phys/virt translation rework. Being cache-coherent, CPM2's do alloc_bootmem() for the console stuff, and it was used to treat console buffer descriptor mapping 1:1 (as in CPM1 case), which is definitely wrong. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
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6d923f98fe
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8e30a9a299
@ -279,11 +279,11 @@ static int mpc8272ads_platform_notify(struct device *dev)
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static const struct platform_notify_dev_map dev_map[] = {
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{
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.bus_id = "fsl-cpm-fcc",
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.rtn = mpc8272ads_fixup_enet_pdata
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.rtn = mpc8272ads_fixup_enet_pdata,
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},
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{
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.bus_id = "fsl-cpm-scc:uart",
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.rtn = mpc
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.rtn = mpc8272ads_fixup_uart_pdata,
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},
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{
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.bus_id = NULL
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@ -335,15 +335,15 @@ struct platform_device* early_uart_get_pdev(int index)
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struct platform_device* pdev = NULL;
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if(index) { /*assume SCC4 here*/
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pdev = &ppc_sys_platform_devices[MPC82xx_CPM_SCC4];
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pinfo = &mpc8272<F12>_uart_pdata[1];
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pinfo = &mpc8272_uart_pdata[fsid_scc4_uart];
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} else { /*over SCC1*/
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pdev = &ppc_sys_platform_devices[MPC82xx_CPM_SCC1];
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pinfo = &mpc8272_uart_pdata[0];
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pinfo = &mpc8272_uart_pdata[fsid_scc1_uart];
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}
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pinfo->uart_clk = bd->bi_intfreq;
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pdev->dev.platform_data = pinfo;
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ppc_sys_fixup_mem_resource(pdev, IMAP_ADDR);
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ppc_sys_fixup_mem_resource(pdev, CPM_MAP_ADDR);
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return NULL;
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}
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@ -121,13 +121,13 @@ struct platform_device ppc_sys_platform_devices[] = {
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.num_resources = 3,
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.resource = (struct resource[]) {
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{
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.name = "scc_mem",
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.name = "regs",
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.start = 0x11A00,
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.end = 0x11A1F,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "scc_pram",
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.name = "pram",
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.start = 0x8000,
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.end = 0x80ff,
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.flags = IORESOURCE_MEM,
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@ -145,13 +145,13 @@ struct platform_device ppc_sys_platform_devices[] = {
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.num_resources = 3,
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.resource = (struct resource[]) {
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{
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.name = "scc_mem",
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.name = "regs",
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.start = 0x11A20,
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.end = 0x11A3F,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "scc_pram",
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.name = "pram",
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.start = 0x8100,
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.end = 0x81ff,
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.flags = IORESOURCE_MEM,
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@ -169,13 +169,13 @@ struct platform_device ppc_sys_platform_devices[] = {
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.num_resources = 3,
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.resource = (struct resource[]) {
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{
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.name = "scc_mem",
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.name = "regs",
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.start = 0x11A40,
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.end = 0x11A5F,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "scc_pram",
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.name = "pram",
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.start = 0x8200,
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.end = 0x82ff,
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.flags = IORESOURCE_MEM,
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@ -193,13 +193,13 @@ struct platform_device ppc_sys_platform_devices[] = {
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.num_resources = 3,
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.resource = (struct resource[]) {
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{
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.name = "scc_mem",
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.name = "regs",
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.start = 0x11A60,
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.end = 0x11A7F,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "scc_pram",
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.name = "pram",
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.start = 0x8300,
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.end = 0x83ff,
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.flags = IORESOURCE_MEM,
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@ -139,13 +139,13 @@ struct ppc_sys_spec ppc_sys_specs[] = {
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.ppc_sys_name = "8272",
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.mask = 0x0000ff00,
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.value = 0x00000c00,
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.num_devices = 11,
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.num_devices = 12,
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.device_list = (enum ppc_sys_devices[])
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{
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MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1,
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MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SMC1,
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MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
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MPC82xx_CPM_USB, MPC82xx_SEC1,
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MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SCC4,
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MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI,
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MPC82xx_CPM_I2C, MPC82xx_CPM_USB, MPC82xx_SEC1,
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},
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},
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/* below is a list of the 8280 family of processors */
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@ -1164,14 +1164,16 @@ static int __init cpm_uart_console_setup(struct console *co, char *options)
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struct fs_uart_platform_info *pdata;
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struct platform_device* pdev = early_uart_get_pdev(co->index);
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port =
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(struct uart_port *)&cpm_uart_ports[cpm_uart_port_map[co->index]];
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pinfo = (struct uart_cpm_port *)port;
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if (!pdev) {
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pr_info("cpm_uart: console: compat mode\n");
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/* compatibility - will be cleaned up */
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cpm_uart_init_portdesc();
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}
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port =
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(struct uart_port *)&cpm_uart_ports[cpm_uart_port_map[co->index]];
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pinfo = (struct uart_cpm_port *)port;
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if (!pdev) {
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if (pinfo->set_lineif)
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pinfo->set_lineif(pinfo);
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} else {
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@ -213,7 +213,7 @@ int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con)
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L1_CACHE_ALIGN(pinfo->tx_nrfifos * pinfo->tx_fifosize);
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if (is_con) {
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mem_addr = alloc_bootmem(memsz);
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dma_addr = mem_addr;
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dma_addr = virt_to_bus(mem_addr);
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}
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else
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mem_addr = dma_alloc_coherent(NULL, memsz, &dma_addr,
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