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convert some DMA_nnBIT_MASK() callers
We're about to make DMA_nnBIT_MASK() emit `deprecated' warnings. Convert the remaining stragglers which are visible to the x86_64 build. Cc: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Cc: James Bottomley <James.Bottomley@HansenPartnership.com> Cc: Eric Moore <Eric.Moore@lsil.com> Cc: Takashi Iwai <tiwai@suse.de> Cc: "David S. Miller" <davem@davemloft.net> Cc: Alexander Duyck <alexander.h.duyck@intel.com> Cc: Yi Zou <yi.zou@intel.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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@ -4414,11 +4414,11 @@ PrimeIocFifos(MPT_ADAPTER *ioc)
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* 1078 errata workaround for the 36GB limitation
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*/
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if (ioc->pcidev->device == MPI_MANUFACTPAGE_DEVID_SAS1078 &&
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ioc->dma_mask > DMA_35BIT_MASK) {
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ioc->dma_mask > DMA_BIT_MASK(35)) {
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if (!pci_set_dma_mask(ioc->pcidev, DMA_BIT_MASK(32))
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&& !pci_set_consistent_dma_mask(ioc->pcidev,
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DMA_BIT_MASK(32))) {
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dma_mask = DMA_35BIT_MASK;
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dma_mask = DMA_BIT_MASK(35);
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d36memprintk(ioc, printk(MYIOC_s_DEBUG_FMT
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"setting 35 bit addressing for "
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"Request/Reply/Chain and Sense Buffers\n",
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@ -4575,7 +4575,7 @@ PrimeIocFifos(MPT_ADAPTER *ioc)
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alloc_dma += ioc->reply_sz;
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}
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if (dma_mask == DMA_35BIT_MASK && !pci_set_dma_mask(ioc->pcidev,
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if (dma_mask == DMA_BIT_MASK(35) && !pci_set_dma_mask(ioc->pcidev,
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ioc->dma_mask) && !pci_set_consistent_dma_mask(ioc->pcidev,
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ioc->dma_mask))
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d36memprintk(ioc, printk(MYIOC_s_DEBUG_FMT
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@ -4602,7 +4602,7 @@ out_fail:
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ioc->sense_buf_pool = NULL;
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}
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if (dma_mask == DMA_35BIT_MASK && !pci_set_dma_mask(ioc->pcidev,
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if (dma_mask == DMA_BIT_MASK(35) && !pci_set_dma_mask(ioc->pcidev,
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DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(ioc->pcidev,
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DMA_BIT_MASK(64)))
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d36memprintk(ioc, printk(MYIOC_s_DEBUG_FMT
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@ -1281,7 +1281,7 @@ static void igbvf_configure_tx(struct igbvf_adapter *adapter)
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/* Setup the HW Tx Head and Tail descriptor pointers */
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ew32(TDLEN(0), tx_ring->count * sizeof(union e1000_adv_tx_desc));
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tdba = tx_ring->dma;
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ew32(TDBAL(0), (tdba & DMA_32BIT_MASK));
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ew32(TDBAL(0), (tdba & DMA_BIT_MASK(32)));
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ew32(TDBAH(0), (tdba >> 32));
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ew32(TDH(0), 0);
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ew32(TDT(0), 0);
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@ -1367,7 +1367,7 @@ static void igbvf_configure_rx(struct igbvf_adapter *adapter)
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* the Base and Length of the Rx Descriptor Ring
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*/
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rdba = rx_ring->dma;
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ew32(RDBAL(0), (rdba & DMA_32BIT_MASK));
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ew32(RDBAL(0), (rdba & DMA_BIT_MASK(32)));
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ew32(RDBAH(0), (rdba >> 32));
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ew32(RDLEN(0), rx_ring->count * sizeof(union e1000_adv_rx_desc));
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rx_ring->head = E1000_RDH(0);
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@ -2628,15 +2628,16 @@ static int __devinit igbvf_probe(struct pci_dev *pdev,
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return err;
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pci_using_dac = 0;
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err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
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err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
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if (!err) {
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err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
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err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
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if (!err)
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pci_using_dac = 1;
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} else {
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err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
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err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
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if (err) {
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err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
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err = pci_set_consistent_dma_mask(pdev,
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DMA_BIT_MASK(32));
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if (err) {
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dev_err(&pdev->dev, "No usable DMA "
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"configuration, aborting\n");
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@ -251,7 +251,7 @@ int ixgbe_fcoe_ddp_get(struct net_device *netdev, u16 xid,
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/* program DMA context */
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hw = &adapter->hw;
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spin_lock_bh(&fcoe->lock);
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IXGBE_WRITE_REG(hw, IXGBE_FCPTRL, ddp->udp & DMA_32BIT_MASK);
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IXGBE_WRITE_REG(hw, IXGBE_FCPTRL, ddp->udp & DMA_BIT_MASK(32));
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IXGBE_WRITE_REG(hw, IXGBE_FCPTRH, (u64)ddp->udp >> 32);
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IXGBE_WRITE_REG(hw, IXGBE_FCBUFF, fcbuff);
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IXGBE_WRITE_REG(hw, IXGBE_FCDMARW, fcdmarw);
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@ -988,7 +988,7 @@ static int __devinit snd_lx6464es_create(struct snd_card *card,
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pci_set_master(pci);
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/* check if we can restrict PCI DMA transfers to 32 bits */
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err = pci_set_dma_mask(pci, DMA_32BIT_MASK);
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err = pci_set_dma_mask(pci, DMA_BIT_MASK(32));
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if (err < 0) {
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snd_printk(KERN_ERR "architecture does not support "
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"32bit PCI busmaster DMA\n");
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