drm/amd/display: Add dummy p-state latency bounding box override

[Why]

For debugging, it can be useful to be able to modify the dummy
p-state latency, this will make it easier to do so.

Signed-off-by: Joshua Aberback <joshua.aberback@amd.com>
Reviewed-by: Wesley Chalmers <Wesley.Chalmers@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Joshua Aberback 2020-04-22 18:08:00 -04:00 committed by Alex Deucher
parent 18400f91c1
commit 8d829836cf
2 changed files with 8 additions and 0 deletions

View File

@ -478,6 +478,7 @@ struct dc_bounding_box_overrides {
int urgent_latency_ns;
int percent_of_ideal_drambw;
int dram_clock_change_latency_ns;
int dummy_clock_change_latency_ns;
/* This forces a hard min on the DCFCLK we use
* for DML. Unlike the debug option for forcing
* DCFCLK, this override affects watermark calculations

View File

@ -3467,6 +3467,13 @@ void dcn20_patch_bounding_box(struct dc *dc, struct _vcs_dpi_soc_bounding_box_st
bb->dram_clock_change_latency_us =
dc->bb_overrides.dram_clock_change_latency_ns / 1000.0;
}
if ((int)(bb->dummy_pstate_latency_us * 1000)
!= dc->bb_overrides.dummy_clock_change_latency_ns
&& dc->bb_overrides.dummy_clock_change_latency_ns) {
bb->dummy_pstate_latency_us =
dc->bb_overrides.dummy_clock_change_latency_ns / 1000.0;
}
}
static struct _vcs_dpi_soc_bounding_box_st *get_asic_rev_soc_bb(