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drm/amd/display: Add dummy p-state latency bounding box override
[Why] For debugging, it can be useful to be able to modify the dummy p-state latency, this will make it easier to do so. Signed-off-by: Joshua Aberback <joshua.aberback@amd.com> Reviewed-by: Wesley Chalmers <Wesley.Chalmers@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -478,6 +478,7 @@ struct dc_bounding_box_overrides {
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int urgent_latency_ns;
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int percent_of_ideal_drambw;
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int dram_clock_change_latency_ns;
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int dummy_clock_change_latency_ns;
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/* This forces a hard min on the DCFCLK we use
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* for DML. Unlike the debug option for forcing
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* DCFCLK, this override affects watermark calculations
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@ -3467,6 +3467,13 @@ void dcn20_patch_bounding_box(struct dc *dc, struct _vcs_dpi_soc_bounding_box_st
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bb->dram_clock_change_latency_us =
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dc->bb_overrides.dram_clock_change_latency_ns / 1000.0;
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}
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if ((int)(bb->dummy_pstate_latency_us * 1000)
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!= dc->bb_overrides.dummy_clock_change_latency_ns
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&& dc->bb_overrides.dummy_clock_change_latency_ns) {
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bb->dummy_pstate_latency_us =
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dc->bb_overrides.dummy_clock_change_latency_ns / 1000.0;
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}
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}
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static struct _vcs_dpi_soc_bounding_box_st *get_asic_rev_soc_bb(
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