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arm64: dts: qcom: sc8280xp: fix ufs_card_phy ref clock

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The GCC_UFS_REF_CLKREF_CLK must be enabled or the second UFS controller
fails to enumerate on sa8295p-adp.

Note that the vendor kernel enables both GCC_UFS_REF_CLKREF_CLK and
GCC_UFS_1_CARD_CLKREF_CLK and it is possible that the former should be
modelled as a parent of the latter. The clock driver also has a
GCC_UFS_CARD_CLKREF_CLK clock which the firmware appears to enable on
the ADP.

The usual lack of documentation for Qualcomm SoCs makes this a highly
annoying guessing game, but as the second controller works on the ADP
without either card reference clock enabled, only enable
GCC_UFS_REF_CLKREF_CLK for now.

Fixes: 152d1faf1e ("arm64: dts: qcom: add SC8280XP platform")
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Brian Masney <bmasney@redhat.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221005143305.388-1-johan+linaro@kernel.org
This commit is contained in:
Johan Hovold 2022-10-05 16:33:05 +02:00 committed by Bjorn Andersson
parent 1ce8aaf6ab
commit 8d6b458ce6
1 changed files with 1 additions and 1 deletions
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2
arch/arm64/boot/dts/qcom/sc8280xp.dtsi
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@ -959,7 +959,7 @@
ranges;
clock-names = "ref",
"ref_aux";
clocks = <&gcc GCC_UFS_1_CARD_CLKREF_CLK>,
clocks = <&gcc GCC_UFS_REF_CLKREF_CLK>,
<&gcc GCC_UFS_CARD_PHY_AUX_CLK>;
resets = <&ufs_card_hc 0>;