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arm64: dts: ti: Use local header for SERDES MUX idle-state values
The DTS uses constants for SERDES MUX idle state values which were earlier provided as bindings header. But they are unsuitable for bindings. So move these constants in a header next to DTS. Also add J784S4 SERDES4 lane definitions which were missed earlier. Suggested-by: Nishanth Menon <nm@ti.com> Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Suggested-by: Roger Quadros <rogerq@kernel.org> Link: https://lore.kernel.org/linux-arm-kernel/b24c2124-fe3b-246c-9af9-3ecee9fb32d4@kernel.org/ Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Roger Quadros <rogerq@kernel.org> Acked-by: Peter Rosin <peda@axentia.se> Link: https://lore.kernel.org/r/20230721125732.122421-2-j-choudhary@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
This commit is contained in:
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@ -6,12 +6,13 @@
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/dts-v1/;
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#include <dt-bindings/phy/phy.h>
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#include <dt-bindings/mux/ti-serdes.h>
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#include <dt-bindings/leds/common.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/net/ti-dp83867.h>
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#include "k3-am642.dtsi"
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#include "k3-serdes.h"
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/ {
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compatible = "ti,am642-evm", "ti,am642";
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model = "Texas Instruments AM642 EVM";
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@ -16,11 +16,12 @@
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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#include <dt-bindings/leds/leds-pca9532.h>
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#include <dt-bindings/mux/ti-serdes.h>
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#include <dt-bindings/phy/phy.h>
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#include "k3-am642.dtsi"
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#include "k3-am64-phycore-som.dtsi"
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#include "k3-serdes.h"
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/ {
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compatible = "phytec,am642-phyboard-electra-rdk",
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"phytec,am64-phycore-som", "ti,am642";
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@ -5,13 +5,14 @@
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/dts-v1/;
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#include <dt-bindings/mux/ti-serdes.h>
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#include <dt-bindings/phy/phy.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/net/ti-dp83867.h>
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#include <dt-bindings/leds/common.h>
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#include "k3-am642.dtsi"
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#include "k3-serdes.h"
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/ {
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compatible = "ti,am642-sk", "ti,am642";
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model = "Texas Instruments AM642 SK";
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@ -11,7 +11,8 @@
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#include <dt-bindings/net/ti-dp83867.h>
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#include <dt-bindings/phy/phy-cadence.h>
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#include <dt-bindings/phy/phy.h>
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#include <dt-bindings/mux/ti-serdes.h>
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#include "k3-serdes.h"
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/ {
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compatible = "ti,am68-sk", "ti,j721s2";
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@ -8,9 +8,10 @@
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#include "k3-j7200-som-p0.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/net/ti-dp83867.h>
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#include <dt-bindings/mux/ti-serdes.h>
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#include <dt-bindings/phy/phy.h>
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#include "k3-serdes.h"
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/ {
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compatible = "ti,j7200-evm", "ti,j7200";
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model = "Texas Instruments J7200 EVM";
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@ -10,9 +10,9 @@
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/plugin/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/mux/ti-serdes.h>
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#include "k3-pinctrl.h"
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#include "k3-serdes.h"
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&{/} {
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aliases {
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@ -10,11 +10,11 @@
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/plugin/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/mux/ti-serdes.h>
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#include <dt-bindings/phy/phy.h>
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#include <dt-bindings/phy/phy-cadence.h>
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#include "k3-pinctrl.h"
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#include "k3-serdes.h"
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&{/} {
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aliases {
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@ -7,7 +7,8 @@
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#include <dt-bindings/phy/phy.h>
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#include <dt-bindings/phy/phy-ti.h>
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#include <dt-bindings/mux/mux.h>
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#include <dt-bindings/mux/ti-serdes.h>
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#include "k3-serdes.h"
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/ {
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cmn_refclk: clock-cmnrefclk {
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@ -11,7 +11,8 @@
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#include <dt-bindings/net/ti-dp83867.h>
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#include <dt-bindings/phy/phy-cadence.h>
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#include <dt-bindings/phy/phy.h>
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#include <dt-bindings/mux/ti-serdes.h>
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#include "k3-serdes.h"
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/ {
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compatible = "ti,j721s2-evm", "ti,j721s2";
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204
arch/arm64/boot/dts/ti/k3-serdes.h
Normal file
204
arch/arm64/boot/dts/ti/k3-serdes.h
Normal file
@ -0,0 +1,204 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* This header provides constants for SERDES MUX for TI SoCs
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*
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* Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
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*/
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#ifndef DTS_ARM64_TI_K3_SERDES_H
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#define DTS_ARM64_TI_K3_SERDES_H
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/* J721E */
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#define J721E_SERDES0_LANE0_QSGMII_LANE1 0x0
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#define J721E_SERDES0_LANE0_PCIE0_LANE0 0x1
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#define J721E_SERDES0_LANE0_USB3_0_SWAP 0x2
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#define J721E_SERDES0_LANE0_IP4_UNUSED 0x3
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#define J721E_SERDES0_LANE1_QSGMII_LANE2 0x0
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#define J721E_SERDES0_LANE1_PCIE0_LANE1 0x1
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#define J721E_SERDES0_LANE1_USB3_0 0x2
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#define J721E_SERDES0_LANE1_IP4_UNUSED 0x3
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#define J721E_SERDES1_LANE0_QSGMII_LANE3 0x0
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#define J721E_SERDES1_LANE0_PCIE1_LANE0 0x1
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#define J721E_SERDES1_LANE0_USB3_1_SWAP 0x2
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#define J721E_SERDES1_LANE0_SGMII_LANE0 0x3
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#define J721E_SERDES1_LANE1_QSGMII_LANE4 0x0
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#define J721E_SERDES1_LANE1_PCIE1_LANE1 0x1
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#define J721E_SERDES1_LANE1_USB3_1 0x2
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#define J721E_SERDES1_LANE1_SGMII_LANE1 0x3
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#define J721E_SERDES2_LANE0_IP1_UNUSED 0x0
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#define J721E_SERDES2_LANE0_PCIE2_LANE0 0x1
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#define J721E_SERDES2_LANE0_USB3_1_SWAP 0x2
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#define J721E_SERDES2_LANE0_SGMII_LANE0 0x3
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#define J721E_SERDES2_LANE1_IP1_UNUSED 0x0
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#define J721E_SERDES2_LANE1_PCIE2_LANE1 0x1
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#define J721E_SERDES2_LANE1_USB3_1 0x2
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#define J721E_SERDES2_LANE1_SGMII_LANE1 0x3
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#define J721E_SERDES3_LANE0_IP1_UNUSED 0x0
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#define J721E_SERDES3_LANE0_PCIE3_LANE0 0x1
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#define J721E_SERDES3_LANE0_USB3_0_SWAP 0x2
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#define J721E_SERDES3_LANE0_IP4_UNUSED 0x3
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#define J721E_SERDES3_LANE1_IP1_UNUSED 0x0
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#define J721E_SERDES3_LANE1_PCIE3_LANE1 0x1
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#define J721E_SERDES3_LANE1_USB3_0 0x2
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#define J721E_SERDES3_LANE1_IP4_UNUSED 0x3
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#define J721E_SERDES4_LANE0_EDP_LANE0 0x0
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#define J721E_SERDES4_LANE0_IP2_UNUSED 0x1
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#define J721E_SERDES4_LANE0_QSGMII_LANE5 0x2
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#define J721E_SERDES4_LANE0_IP4_UNUSED 0x3
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#define J721E_SERDES4_LANE1_EDP_LANE1 0x0
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#define J721E_SERDES4_LANE1_IP2_UNUSED 0x1
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#define J721E_SERDES4_LANE1_QSGMII_LANE6 0x2
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#define J721E_SERDES4_LANE1_IP4_UNUSED 0x3
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#define J721E_SERDES4_LANE2_EDP_LANE2 0x0
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#define J721E_SERDES4_LANE2_IP2_UNUSED 0x1
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#define J721E_SERDES4_LANE2_QSGMII_LANE7 0x2
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#define J721E_SERDES4_LANE2_IP4_UNUSED 0x3
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#define J721E_SERDES4_LANE3_EDP_LANE3 0x0
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#define J721E_SERDES4_LANE3_IP2_UNUSED 0x1
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#define J721E_SERDES4_LANE3_QSGMII_LANE8 0x2
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#define J721E_SERDES4_LANE3_IP4_UNUSED 0x3
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/* J7200 */
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#define J7200_SERDES0_LANE0_QSGMII_LANE3 0x0
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#define J7200_SERDES0_LANE0_PCIE1_LANE0 0x1
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#define J7200_SERDES0_LANE0_IP3_UNUSED 0x2
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#define J7200_SERDES0_LANE0_IP4_UNUSED 0x3
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#define J7200_SERDES0_LANE1_QSGMII_LANE4 0x0
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#define J7200_SERDES0_LANE1_PCIE1_LANE1 0x1
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#define J7200_SERDES0_LANE1_IP3_UNUSED 0x2
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#define J7200_SERDES0_LANE1_IP4_UNUSED 0x3
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#define J7200_SERDES0_LANE2_QSGMII_LANE1 0x0
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#define J7200_SERDES0_LANE2_PCIE1_LANE2 0x1
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#define J7200_SERDES0_LANE2_IP3_UNUSED 0x2
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#define J7200_SERDES0_LANE2_IP4_UNUSED 0x3
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#define J7200_SERDES0_LANE3_QSGMII_LANE2 0x0
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#define J7200_SERDES0_LANE3_PCIE1_LANE3 0x1
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#define J7200_SERDES0_LANE3_USB 0x2
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#define J7200_SERDES0_LANE3_IP4_UNUSED 0x3
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/* AM64 */
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#define AM64_SERDES0_LANE0_PCIE0 0x0
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#define AM64_SERDES0_LANE0_USB 0x1
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/* J721S2 */
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#define J721S2_SERDES0_LANE0_EDP_LANE0 0x0
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#define J721S2_SERDES0_LANE0_PCIE1_LANE0 0x1
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#define J721S2_SERDES0_LANE0_IP3_UNUSED 0x2
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#define J721S2_SERDES0_LANE0_IP4_UNUSED 0x3
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#define J721S2_SERDES0_LANE1_EDP_LANE1 0x0
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#define J721S2_SERDES0_LANE1_PCIE1_LANE1 0x1
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#define J721S2_SERDES0_LANE1_USB 0x2
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#define J721S2_SERDES0_LANE1_IP4_UNUSED 0x3
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#define J721S2_SERDES0_LANE2_EDP_LANE2 0x0
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#define J721S2_SERDES0_LANE2_PCIE1_LANE2 0x1
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#define J721S2_SERDES0_LANE2_IP3_UNUSED 0x2
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#define J721S2_SERDES0_LANE2_IP4_UNUSED 0x3
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#define J721S2_SERDES0_LANE3_EDP_LANE3 0x0
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#define J721S2_SERDES0_LANE3_PCIE1_LANE3 0x1
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#define J721S2_SERDES0_LANE3_USB 0x2
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#define J721S2_SERDES0_LANE3_IP4_UNUSED 0x3
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/* J784S4 */
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#define J784S4_SERDES0_LANE0_IP1_UNUSED 0x0
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#define J784S4_SERDES0_LANE0_PCIE1_LANE0 0x1
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#define J784S4_SERDES0_LANE0_IP3_UNUSED 0x2
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#define J784S4_SERDES0_LANE0_IP4_UNUSED 0x3
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#define J784S4_SERDES0_LANE1_IP1_UNUSED 0x0
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#define J784S4_SERDES0_LANE1_PCIE1_LANE1 0x1
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#define J784S4_SERDES0_LANE1_IP3_UNUSED 0x2
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#define J784S4_SERDES0_LANE1_IP4_UNUSED 0x3
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#define J784S4_SERDES0_LANE2_PCIE3_LANE0 0x0
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#define J784S4_SERDES0_LANE2_PCIE1_LANE2 0x1
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#define J784S4_SERDES0_LANE2_IP3_UNUSED 0x2
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#define J784S4_SERDES0_LANE2_IP4_UNUSED 0x3
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#define J784S4_SERDES0_LANE3_PCIE3_LANE1 0x0
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#define J784S4_SERDES0_LANE3_PCIE1_LANE3 0x1
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#define J784S4_SERDES0_LANE3_USB 0x2
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#define J784S4_SERDES0_LANE3_IP4_UNUSED 0x3
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#define J784S4_SERDES1_LANE0_QSGMII_LANE3 0x0
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#define J784S4_SERDES1_LANE0_PCIE0_LANE0 0x1
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#define J784S4_SERDES1_LANE0_IP3_UNUSED 0x2
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#define J784S4_SERDES1_LANE0_IP4_UNUSED 0x3
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#define J784S4_SERDES1_LANE1_QSGMII_LANE4 0x0
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#define J784S4_SERDES1_LANE1_PCIE0_LANE1 0x1
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#define J784S4_SERDES1_LANE1_IP3_UNUSED 0x2
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#define J784S4_SERDES1_LANE1_IP4_UNUSED 0x3
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#define J784S4_SERDES1_LANE2_QSGMII_LANE1 0x0
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#define J784S4_SERDES1_LANE2_PCIE0_LANE2 0x1
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#define J784S4_SERDES1_LANE2_PCIE2_LANE0 0x2
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#define J784S4_SERDES1_LANE2_IP4_UNUSED 0x3
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#define J784S4_SERDES1_LANE3_QSGMII_LANE2 0x0
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#define J784S4_SERDES1_LANE3_PCIE0_LANE3 0x1
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#define J784S4_SERDES1_LANE3_PCIE2_LANE1 0x2
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#define J784S4_SERDES1_LANE3_IP4_UNUSED 0x3
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#define J784S4_SERDES2_LANE0_QSGMII_LANE5 0x0
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#define J784S4_SERDES2_LANE0_IP2_UNUSED 0x1
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#define J784S4_SERDES2_LANE0_IP3_UNUSED 0x2
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#define J784S4_SERDES2_LANE0_IP4_UNUSED 0x3
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#define J784S4_SERDES2_LANE1_QSGMII_LANE6 0x0
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#define J784S4_SERDES2_LANE1_IP2_UNUSED 0x1
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#define J784S4_SERDES2_LANE1_IP3_UNUSED 0x2
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#define J784S4_SERDES2_LANE1_IP4_UNUSED 0x3
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#define J784S4_SERDES2_LANE2_QSGMII_LANE7 0x0
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#define J784S4_SERDES2_LANE2_QSGMII_LANE1 0x1
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#define J784S4_SERDES2_LANE2_IP3_UNUSED 0x2
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#define J784S4_SERDES2_LANE2_IP4_UNUSED 0x3
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#define J784S4_SERDES2_LANE3_QSGMII_LANE8 0x0
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#define J784S4_SERDES2_LANE3_QSGMII_LANE2 0x1
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#define J784S4_SERDES2_LANE3_IP3_UNUSED 0x2
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#define J784S4_SERDES2_LANE3_IP4_UNUSED 0x3
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#define J784S4_SERDES4_LANE0_EDP_LANE0 0x0
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#define J784S4_SERDES4_LANE0_QSGMII_LANE5 0x1
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#define J784S4_SERDES4_LANE0_IP3_UNUSED 0x2
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#define J784S4_SERDES4_LANE0_IP4_UNUSED 0x3
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#define J784S4_SERDES4_LANE1_EDP_LANE1 0x0
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#define J784S4_SERDES4_LANE1_QSGMII_LANE6 0x1
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#define J784S4_SERDES4_LANE1_IP3_UNUSED 0x2
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#define J784S4_SERDES4_LANE1_IP4_UNUSED 0x3
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#define J784S4_SERDES4_LANE2_EDP_LANE2 0x0
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#define J784S4_SERDES4_LANE2_QSGMII_LANE7 0x1
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#define J784S4_SERDES4_LANE2_IP3_UNUSED 0x2
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#define J784S4_SERDES4_LANE2_IP4_UNUSED 0x3
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#define J784S4_SERDES4_LANE3_EDP_LANE3 0x0
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#define J784S4_SERDES4_LANE3_QSGMII_LANE8 0x1
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#define J784S4_SERDES4_LANE3_USB 0x2
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#define J784S4_SERDES4_LANE3_IP4_UNUSED 0x3
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#endif /* DTS_ARM64_TI_K3_SERDES_H */
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