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drm/i915: refactor pll code out into intel_dpll.c

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This pulls a large chunk of the pll calculation code out of
intel_display.c to a new file.

One function makes sense to be an inline, otherwise this
is pretty much a straight copy cover. Also all the
remaining hooks for g45 and older end up the same now.

Signed-off-by: Dave Airlie <airlied@redhat.com>
[Jani: cleaned up intel_dpll.h a bit, de-duped intel_panel_use_ssc().]
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/74b58e0572858b5d1734818ca594a23040d7d44f.1610622609.git.jani.nikula@intel.com
This commit is contained in:
Dave Airlie 2021-01-14 13:13:46 +02:00 committed by Jani Nikula
parent fbf756c31c
commit 8cf41f316e
6 changed files with 1414 additions and 1391 deletions
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1
drivers/gpu/drm/i915/Makefile
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@ -202,6 +202,7 @@ i915-y += \
display/intel_display.o \
display/intel_display_power.o \
display/intel_dpio_phy.o \
display/intel_dpll.o \
display/intel_dpll_mgr.o \
display/intel_dsb.o \
display/intel_fbc.o \

1402
drivers/gpu/drm/i915/display/intel_display.c
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File diff suppressed because it is too large Load Diff

3
drivers/gpu/drm/i915/display/intel_display.h
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@ -651,6 +651,9 @@ u32 intel_plane_compute_aligned_offset(int *x, int *y,
int color_plane);
int intel_plane_pin_fb(struct intel_plane_state *plane_state);
void intel_plane_unpin_fb(struct intel_plane_state *old_plane_state);
struct intel_encoder *
intel_get_crtc_new_encoder(const struct intel_atomic_state *state,
const struct intel_crtc_state *crtc_state);
/* modesetting */
void intel_modeset_init_hw(struct drm_i915_private *i915);

13
drivers/gpu/drm/i915/display/intel_display_types.h
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@ -1839,4 +1839,17 @@ to_intel_frontbuffer(struct drm_framebuffer *fb)
return fb ? to_intel_framebuffer(fb)->frontbuffer : NULL;
}
static inline bool intel_panel_use_ssc(struct drm_i915_private *dev_priv)
{
if (dev_priv->params.panel_use_ssc >= 0)
return dev_priv->params.panel_use_ssc != 0;
return dev_priv->vbt.lvds_use_ssc
&& !(dev_priv->quirks & QUIRK_LVDS_SSC_DISABLE);
}
static inline u32 i9xx_dpll_compute_fp(struct dpll *dpll)
{
return dpll->n << 16 | dpll->m1 << 8 | dpll->m2;
}
#endif /* __INTEL_DISPLAY_TYPES_H__ */

1363
drivers/gpu/drm/i915/display/intel_dpll.c Normal file
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File diff suppressed because it is too large Load Diff

23
drivers/gpu/drm/i915/display/intel_dpll.h Normal file
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@ -0,0 +1,23 @@
/* SPDX-License-Identifier: MIT */
/*
* Copyright © 2020 Intel Corporation
*/
#ifndef _INTEL_DPLL_H_
#define _INTEL_DPLL_H_
struct dpll;
struct drm_i915_private;
struct intel_crtc;
struct intel_crtc_state;
void intel_dpll_init_clock_hook(struct drm_i915_private *dev_priv);
int vlv_calc_dpll_params(int refclk, struct dpll *clock);
int pnv_calc_dpll_params(int refclk, struct dpll *clock);
int i9xx_calc_dpll_params(int refclk, struct dpll *clock);
void vlv_compute_dpll(struct intel_crtc *crtc,
struct intel_crtc_state *pipe_config);
void chv_compute_dpll(struct intel_crtc *crtc,
struct intel_crtc_state *pipe_config);
#endif