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[TG3]: Fix tg3_set_power_state()
Fix tg3_set_power_state to drive GPIOs properly based on the TG3_FLAG_EEPROM_WRITE_PROTECT flag. Some delays are also added after D0 and D3 power state changes. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -1005,8 +1005,13 @@ static int tg3_set_power_state(struct tg3 *tp, int state)
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pci_write_config_word(tp->pdev,
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pm + PCI_PM_CTRL,
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power_control);
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tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl);
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udelay(100);
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udelay(100); /* Delay after power state change */
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/* Switch out of Vaux if it is not a LOM */
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if (!(tp->tg3_flags & TG3_FLAG_EEPROM_WRITE_PROT)) {
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tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl);
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udelay(100);
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}
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return 0;
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@ -1151,6 +1156,7 @@ static int tg3_set_power_state(struct tg3 *tp, int state)
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/* Finally, set the new power state. */
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pci_write_config_word(tp->pdev, pm + PCI_PM_CTRL, power_control);
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udelay(100); /* Delay after power state change */
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tg3_write_sig_post_reset(tp, RESET_KIND_SHUTDOWN);
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