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arm64: dts: hisilicon: write the values of property-units into a uint32 array

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Use <> to separate the values of property-units will be treated as
multiple arrays. The errors similar to the following will be reported by
property-units.yaml.

ufs@ff3c0000: freq-table-hz: [[0, 0], [0, 0]] is too long

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
This commit is contained in:
Zhen Lei 2020-10-12 21:17:31 +08:00 committed by Wei Xu
parent 24402ce1e2
commit 8c563f55ee
3 changed files with 8 additions and 7 deletions
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3
arch/arm64/boot/dts/hisilicon/hi3660.dtsi
View File

@ -1045,7 +1045,8 @@
clocks = <&crg_ctrl HI3660_CLK_GATE_UFSIO_REF>,
<&crg_ctrl HI3660_CLK_GATE_UFSPHY_CFG>;
clock-names = "ref_clk", "phy_clk";
freq-table-hz = <0 0>, <0 0>;
freq-table-hz = <0 0
0 0>;
/* offset: 0x84; bit: 12 */
resets = <&crg_rst 0x84 12>;
reset-names = "rst";

3
arch/arm64/boot/dts/hisilicon/hi3670.dtsi
View File

@ -667,7 +667,8 @@
clocks = <&crg_ctrl HI3670_CLK_GATE_UFSIO_REF>,
<&crg_ctrl HI3670_CLK_GATE_UFS_SUBSYS>;
clock-names = "ref_clk", "phy_clk";
freq-table-hz = <0 0>, <0 0>;
freq-table-hz = <0 0
0 0>;
/* offset: 0x84; bit: 12 */
resets = <&crg_rst 0x84 12>;
reset-names = "rst";

9
arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
View File

@ -91,11 +91,10 @@
gmacphyrst: reset-controller {
compatible = "ti,syscon-reset";
#reset-cells = <1>;
ti,reset-bits =
<0xcc 12 0xcc 12 0 0 (ASSERT_CLEAR |
DEASSERT_SET|STATUS_NONE)>,
<0xcc 13 0xcc 13 0 0 (ASSERT_CLEAR |
DEASSERT_SET|STATUS_NONE)>;
ti,reset-bits = <
0xcc 12 0xcc 12 0 0 (ASSERT_CLEAR | DEASSERT_SET | STATUS_NONE)
0xcc 13 0xcc 13 0 0 (ASSERT_CLEAR | DEASSERT_SET | STATUS_NONE)
>;
};
};