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rtc: pcf85063: Add pcf85063 clkout control to common clock framework
The PCF85063 has a configurable clock output signal. Add support for it using in the CCF. Signed-off-by: Michael McCormick <michael.mccormick@enatel.net> Link: https://lore.kernel.org/r/20200124015239.24662-1-michael.mccormick@enatel.net Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
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@ -9,6 +9,7 @@
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* Copyright (C) 2019 Micro Crystal AG
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* Author: Alexandre Belloni <alexandre.belloni@bootlin.com>
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*/
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#include <linux/clk-provider.h>
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#include <linux/i2c.h>
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#include <linux/bcd.h>
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#include <linux/rtc.h>
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@ -44,6 +45,10 @@
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#define PCF85063_OFFSET_STEP0 4340
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#define PCF85063_OFFSET_STEP1 4069
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#define PCF85063_REG_CLKO_F_MASK 0x07 /* frequency mask */
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#define PCF85063_REG_CLKO_F_32768HZ 0x00
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#define PCF85063_REG_CLKO_F_OFF 0x07
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#define PCF85063_REG_RAM 0x03
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#define PCF85063_REG_SC 0x04 /* datetime */
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@ -61,6 +66,9 @@ struct pcf85063_config {
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struct pcf85063 {
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struct rtc_device *rtc;
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struct regmap *regmap;
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#ifdef CONFIG_COMMON_CLK
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struct clk_hw clkout_hw;
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#endif
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};
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static int pcf85063_rtc_read_time(struct device *dev, struct rtc_time *tm)
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@ -357,6 +365,150 @@ static int pcf85063_load_capacitance(struct pcf85063 *pcf85063,
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PCF85063_REG_CTRL1_CAP_SEL, reg);
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}
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#ifdef CONFIG_COMMON_CLK
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/*
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* Handling of the clkout
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*/
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#define clkout_hw_to_pcf85063(_hw) container_of(_hw, struct pcf85063, clkout_hw)
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static int clkout_rates[] = {
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32768,
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16384,
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8192,
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4096,
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2048,
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1024,
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1,
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0
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};
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static unsigned long pcf85063_clkout_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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struct pcf85063 *pcf85063 = clkout_hw_to_pcf85063(hw);
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unsigned int buf;
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int ret = regmap_read(pcf85063->regmap, PCF85063_REG_CTRL2, &buf);
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if (ret < 0)
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return 0;
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buf &= PCF85063_REG_CLKO_F_MASK;
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return clkout_rates[buf];
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}
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static long pcf85063_clkout_round_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long *prate)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(clkout_rates); i++)
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if (clkout_rates[i] <= rate)
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return clkout_rates[i];
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return 0;
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}
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static int pcf85063_clkout_set_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long parent_rate)
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{
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struct pcf85063 *pcf85063 = clkout_hw_to_pcf85063(hw);
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int i;
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for (i = 0; i < ARRAY_SIZE(clkout_rates); i++)
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if (clkout_rates[i] == rate)
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return regmap_update_bits(pcf85063->regmap,
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PCF85063_REG_CTRL2,
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PCF85063_REG_CLKO_F_MASK, i);
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return -EINVAL;
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}
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static int pcf85063_clkout_control(struct clk_hw *hw, bool enable)
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{
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struct pcf85063 *pcf85063 = clkout_hw_to_pcf85063(hw);
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unsigned int buf;
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int ret;
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ret = regmap_read(pcf85063->regmap, PCF85063_REG_OFFSET, &buf);
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if (ret < 0)
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return ret;
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buf &= PCF85063_REG_CLKO_F_MASK;
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if (enable) {
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if (buf == PCF85063_REG_CLKO_F_OFF)
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buf = PCF85063_REG_CLKO_F_32768HZ;
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else
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return 0;
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} else {
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if (buf != PCF85063_REG_CLKO_F_OFF)
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buf = PCF85063_REG_CLKO_F_OFF;
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else
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return 0;
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}
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return regmap_update_bits(pcf85063->regmap, PCF85063_REG_CTRL2,
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PCF85063_REG_CLKO_F_MASK, buf);
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}
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static int pcf85063_clkout_prepare(struct clk_hw *hw)
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{
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return pcf85063_clkout_control(hw, 1);
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}
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static void pcf85063_clkout_unprepare(struct clk_hw *hw)
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{
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pcf85063_clkout_control(hw, 0);
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}
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static int pcf85063_clkout_is_prepared(struct clk_hw *hw)
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{
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struct pcf85063 *pcf85063 = clkout_hw_to_pcf85063(hw);
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unsigned int buf;
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int ret = regmap_read(pcf85063->regmap, PCF85063_REG_CTRL2, &buf);
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if (ret < 0)
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return 0;
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return (buf & PCF85063_REG_CLKO_F_MASK) != PCF85063_REG_CLKO_F_OFF;
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}
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static const struct clk_ops pcf85063_clkout_ops = {
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.prepare = pcf85063_clkout_prepare,
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.unprepare = pcf85063_clkout_unprepare,
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.is_prepared = pcf85063_clkout_is_prepared,
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.recalc_rate = pcf85063_clkout_recalc_rate,
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.round_rate = pcf85063_clkout_round_rate,
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.set_rate = pcf85063_clkout_set_rate,
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};
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static struct clk *pcf85063_clkout_register_clk(struct pcf85063 *pcf85063)
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{
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struct clk *clk;
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struct clk_init_data init;
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init.name = "pcf85063-clkout";
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init.ops = &pcf85063_clkout_ops;
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init.flags = 0;
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init.parent_names = NULL;
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init.num_parents = 0;
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pcf85063->clkout_hw.init = &init;
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/* optional override of the clockname */
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of_property_read_string(pcf85063->rtc->dev.of_node,
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"clock-output-names", &init.name);
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/* register the clock */
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clk = devm_clk_register(&pcf85063->rtc->dev, &pcf85063->clkout_hw);
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if (!IS_ERR(clk))
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of_clk_add_provider(pcf85063->rtc->dev.of_node,
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of_clk_src_simple_get, clk);
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return clk;
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}
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#endif
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static const struct pcf85063_config pcf85063a_config = {
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.regmap = {
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.reg_bits = 8,
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@ -457,6 +609,11 @@ static int pcf85063_probe(struct i2c_client *client)
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nvmem_cfg.priv = pcf85063->regmap;
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rtc_nvmem_register(pcf85063->rtc, &nvmem_cfg);
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#ifdef CONFIG_COMMON_CLK
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/* register clk in common clk framework */
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pcf85063_clkout_register_clk(pcf85063);
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#endif
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return rtc_register_device(pcf85063->rtc);
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}
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