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arm: plat-omap: Cleanup irq_desc access
1) Core code stores the flow type already 2) Flow type is accessible in irq_data Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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d1118f68b6
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8c04a1769f
@ -755,12 +755,6 @@ static int gpio_irq_type(struct irq_data *d, unsigned type)
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bank = irq_data_get_irq_chip_data(d);
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bank = irq_data_get_irq_chip_data(d);
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spin_lock_irqsave(&bank->lock, flags);
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spin_lock_irqsave(&bank->lock, flags);
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retval = _set_gpio_triggering(bank, get_gpio_index(gpio), type);
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retval = _set_gpio_triggering(bank, get_gpio_index(gpio), type);
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if (retval == 0) {
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struct irq_desc *desc = irq_to_desc(d->irq);
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desc->status &= ~IRQ_TYPE_SENSE_MASK;
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desc->status |= type;
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}
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spin_unlock_irqrestore(&bank->lock, flags);
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spin_unlock_irqrestore(&bank->lock, flags);
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if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
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if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
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@ -1270,8 +1264,7 @@ static void gpio_unmask_irq(struct irq_data *d)
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unsigned int gpio = d->irq - IH_GPIO_BASE;
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unsigned int gpio = d->irq - IH_GPIO_BASE;
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struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
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struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
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unsigned int irq_mask = 1 << get_gpio_index(gpio);
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unsigned int irq_mask = 1 << get_gpio_index(gpio);
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struct irq_desc *desc = irq_to_desc(d->irq);
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u32 trigger = irqd_get_trigger_type(d);
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u32 trigger = desc->status & IRQ_TYPE_SENSE_MASK;
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if (trigger)
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if (trigger)
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_set_gpio_triggering(bank, get_gpio_index(gpio), trigger);
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_set_gpio_triggering(bank, get_gpio_index(gpio), trigger);
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