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KVM: x86: smm: use smram struct for 64 bit smram load/restore
Use kvm_smram_state_64 struct to save/restore the 64 bit SMM state (used when X86_FEATURE_LM is present in the guest CPUID, regardless of 32-bitness of the guest). Signed-off-by: Maxim Levitsky <mlevitsk@redhat.com> Message-Id: <20221025124741.228045-20-mlevitsk@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -163,20 +163,17 @@ static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu,
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}
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#ifdef CONFIG_X86_64
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static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
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static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu,
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struct kvm_smm_seg_state_64 *state,
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int n)
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{
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struct kvm_segment seg;
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int offset;
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u16 flags;
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kvm_get_segment(vcpu, &seg, n);
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offset = 0x7e00 + n * 16;
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flags = enter_smm_get_segment_flags(&seg) >> 8;
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PUT_SMSTATE(u16, buf, offset, seg.selector);
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PUT_SMSTATE(u16, buf, offset + 2, flags);
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PUT_SMSTATE(u32, buf, offset + 4, seg.limit);
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PUT_SMSTATE(u64, buf, offset + 8, seg.base);
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state->selector = seg.selector;
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state->attributes = enter_smm_get_segment_flags(&seg) >> 8;
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state->limit = seg.limit;
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state->base = seg.base;
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}
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#endif
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@ -225,57 +222,52 @@ static void enter_smm_save_state_32(struct kvm_vcpu *vcpu,
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}
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#ifdef CONFIG_X86_64
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static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
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static void enter_smm_save_state_64(struct kvm_vcpu *vcpu,
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struct kvm_smram_state_64 *smram)
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{
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struct desc_ptr dt;
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struct kvm_segment seg;
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unsigned long val;
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int i;
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for (i = 0; i < 16; i++)
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PUT_SMSTATE(u64, buf, 0x7ff8 - i * 8, kvm_register_read_raw(vcpu, i));
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smram->gprs[15 - i] = kvm_register_read_raw(vcpu, i);
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smram->rip = kvm_rip_read(vcpu);
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smram->rflags = kvm_get_rflags(vcpu);
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PUT_SMSTATE(u64, buf, 0x7f78, kvm_rip_read(vcpu));
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PUT_SMSTATE(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
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kvm_get_dr(vcpu, 6, &val);
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PUT_SMSTATE(u64, buf, 0x7f68, val);
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smram->dr6 = val;
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kvm_get_dr(vcpu, 7, &val);
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PUT_SMSTATE(u64, buf, 0x7f60, val);
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smram->dr7 = val;
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PUT_SMSTATE(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
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PUT_SMSTATE(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
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PUT_SMSTATE(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
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smram->cr0 = kvm_read_cr0(vcpu);
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smram->cr3 = kvm_read_cr3(vcpu);
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smram->cr4 = kvm_read_cr4(vcpu);
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PUT_SMSTATE(u32, buf, 0x7f00, vcpu->arch.smbase);
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smram->smbase = vcpu->arch.smbase;
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smram->smm_revison = 0x00020064;
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/* revision id */
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PUT_SMSTATE(u32, buf, 0x7efc, 0x00020064);
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smram->efer = vcpu->arch.efer;
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PUT_SMSTATE(u64, buf, 0x7ed0, vcpu->arch.efer);
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kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
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PUT_SMSTATE(u16, buf, 0x7e90, seg.selector);
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PUT_SMSTATE(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
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PUT_SMSTATE(u32, buf, 0x7e94, seg.limit);
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PUT_SMSTATE(u64, buf, 0x7e98, seg.base);
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enter_smm_save_seg_64(vcpu, &smram->tr, VCPU_SREG_TR);
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static_call(kvm_x86_get_idt)(vcpu, &dt);
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PUT_SMSTATE(u32, buf, 0x7e84, dt.size);
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PUT_SMSTATE(u64, buf, 0x7e88, dt.address);
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smram->idtr.limit = dt.size;
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smram->idtr.base = dt.address;
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kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
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PUT_SMSTATE(u16, buf, 0x7e70, seg.selector);
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PUT_SMSTATE(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
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PUT_SMSTATE(u32, buf, 0x7e74, seg.limit);
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PUT_SMSTATE(u64, buf, 0x7e78, seg.base);
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enter_smm_save_seg_64(vcpu, &smram->ldtr, VCPU_SREG_LDTR);
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static_call(kvm_x86_get_gdt)(vcpu, &dt);
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PUT_SMSTATE(u32, buf, 0x7e64, dt.size);
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PUT_SMSTATE(u64, buf, 0x7e68, dt.address);
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smram->gdtr.limit = dt.size;
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smram->gdtr.base = dt.address;
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for (i = 0; i < 6; i++)
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enter_smm_save_seg_64(vcpu, buf, i);
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enter_smm_save_seg_64(vcpu, &smram->es, VCPU_SREG_ES);
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enter_smm_save_seg_64(vcpu, &smram->cs, VCPU_SREG_CS);
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enter_smm_save_seg_64(vcpu, &smram->ss, VCPU_SREG_SS);
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enter_smm_save_seg_64(vcpu, &smram->ds, VCPU_SREG_DS);
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enter_smm_save_seg_64(vcpu, &smram->fs, VCPU_SREG_FS);
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enter_smm_save_seg_64(vcpu, &smram->gs, VCPU_SREG_GS);
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}
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#endif
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@ -292,7 +284,7 @@ void enter_smm(struct kvm_vcpu *vcpu)
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#ifdef CONFIG_X86_64
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if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
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enter_smm_save_state_64(vcpu, smram.bytes);
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enter_smm_save_state_64(vcpu, &smram.smram64);
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else
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#endif
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enter_smm_save_state_32(vcpu, &smram.smram32);
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@ -402,18 +394,17 @@ static int rsm_load_seg_32(struct kvm_vcpu *vcpu,
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}
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#ifdef CONFIG_X86_64
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static int rsm_load_seg_64(struct kvm_vcpu *vcpu, const char *smstate,
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static int rsm_load_seg_64(struct kvm_vcpu *vcpu,
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const struct kvm_smm_seg_state_64 *state,
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int n)
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{
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struct kvm_segment desc;
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int offset;
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offset = 0x7e00 + n * 16;
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desc.selector = GET_SMSTATE(u16, smstate, offset);
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rsm_set_desc_flags(&desc, GET_SMSTATE(u16, smstate, offset + 2) << 8);
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desc.limit = GET_SMSTATE(u32, smstate, offset + 4);
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desc.base = GET_SMSTATE(u64, smstate, offset + 8);
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desc.selector = state->selector;
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rsm_set_desc_flags(&desc, state->attributes << 8);
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desc.limit = state->limit;
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desc.base = state->base;
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kvm_set_segment(vcpu, &desc, n);
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return X86EMUL_CONTINUE;
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}
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@ -509,68 +500,50 @@ static int rsm_load_state_32(struct x86_emulate_ctxt *ctxt,
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#ifdef CONFIG_X86_64
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static int rsm_load_state_64(struct x86_emulate_ctxt *ctxt,
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u8 *smstate)
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const struct kvm_smram_state_64 *smstate)
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{
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struct kvm_vcpu *vcpu = ctxt->vcpu;
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struct kvm_segment desc;
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struct desc_ptr dt;
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u64 val, cr0, cr3, cr4;
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int i, r;
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for (i = 0; i < 16; i++)
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*reg_write(ctxt, i) = GET_SMSTATE(u64, smstate, 0x7ff8 - i * 8);
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*reg_write(ctxt, i) = smstate->gprs[15 - i];
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ctxt->_eip = GET_SMSTATE(u64, smstate, 0x7f78);
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ctxt->eflags = GET_SMSTATE(u32, smstate, 0x7f70) | X86_EFLAGS_FIXED;
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ctxt->_eip = smstate->rip;
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ctxt->eflags = smstate->rflags | X86_EFLAGS_FIXED;
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val = GET_SMSTATE(u64, smstate, 0x7f68);
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if (kvm_set_dr(vcpu, 6, val))
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if (kvm_set_dr(vcpu, 6, smstate->dr6))
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return X86EMUL_UNHANDLEABLE;
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if (kvm_set_dr(vcpu, 7, smstate->dr7))
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return X86EMUL_UNHANDLEABLE;
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val = GET_SMSTATE(u64, smstate, 0x7f60);
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vcpu->arch.smbase = smstate->smbase;
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if (kvm_set_dr(vcpu, 7, val))
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if (kvm_set_msr(vcpu, MSR_EFER, smstate->efer & ~EFER_LMA))
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return X86EMUL_UNHANDLEABLE;
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cr0 = GET_SMSTATE(u64, smstate, 0x7f58);
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cr3 = GET_SMSTATE(u64, smstate, 0x7f50);
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cr4 = GET_SMSTATE(u64, smstate, 0x7f48);
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vcpu->arch.smbase = GET_SMSTATE(u32, smstate, 0x7f00);
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val = GET_SMSTATE(u64, smstate, 0x7ed0);
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rsm_load_seg_64(vcpu, &smstate->tr, VCPU_SREG_TR);
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if (kvm_set_msr(vcpu, MSR_EFER, val & ~EFER_LMA))
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return X86EMUL_UNHANDLEABLE;
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desc.selector = GET_SMSTATE(u32, smstate, 0x7e90);
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rsm_set_desc_flags(&desc, GET_SMSTATE(u32, smstate, 0x7e92) << 8);
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desc.limit = GET_SMSTATE(u32, smstate, 0x7e94);
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desc.base = GET_SMSTATE(u64, smstate, 0x7e98);
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kvm_set_segment(vcpu, &desc, VCPU_SREG_TR);
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dt.size = GET_SMSTATE(u32, smstate, 0x7e84);
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dt.address = GET_SMSTATE(u64, smstate, 0x7e88);
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dt.size = smstate->idtr.limit;
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dt.address = smstate->idtr.base;
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static_call(kvm_x86_set_idt)(vcpu, &dt);
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desc.selector = GET_SMSTATE(u32, smstate, 0x7e70);
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rsm_set_desc_flags(&desc, GET_SMSTATE(u32, smstate, 0x7e72) << 8);
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desc.limit = GET_SMSTATE(u32, smstate, 0x7e74);
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desc.base = GET_SMSTATE(u64, smstate, 0x7e78);
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kvm_set_segment(vcpu, &desc, VCPU_SREG_LDTR);
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rsm_load_seg_64(vcpu, &smstate->ldtr, VCPU_SREG_LDTR);
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dt.size = GET_SMSTATE(u32, smstate, 0x7e64);
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dt.address = GET_SMSTATE(u64, smstate, 0x7e68);
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dt.size = smstate->gdtr.limit;
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dt.address = smstate->gdtr.base;
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static_call(kvm_x86_set_gdt)(vcpu, &dt);
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r = rsm_enter_protected_mode(vcpu, cr0, cr3, cr4);
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r = rsm_enter_protected_mode(vcpu, smstate->cr0, smstate->cr3, smstate->cr4);
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if (r != X86EMUL_CONTINUE)
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return r;
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for (i = 0; i < 6; i++) {
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r = rsm_load_seg_64(vcpu, smstate, i);
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if (r != X86EMUL_CONTINUE)
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return r;
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}
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rsm_load_seg_64(vcpu, &smstate->es, VCPU_SREG_ES);
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rsm_load_seg_64(vcpu, &smstate->cs, VCPU_SREG_CS);
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rsm_load_seg_64(vcpu, &smstate->ss, VCPU_SREG_SS);
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rsm_load_seg_64(vcpu, &smstate->ds, VCPU_SREG_DS);
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rsm_load_seg_64(vcpu, &smstate->fs, VCPU_SREG_FS);
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rsm_load_seg_64(vcpu, &smstate->gs, VCPU_SREG_GS);
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return X86EMUL_CONTINUE;
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}
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@ -648,7 +621,7 @@ int emulator_leave_smm(struct x86_emulate_ctxt *ctxt)
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#ifdef CONFIG_X86_64
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if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
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return rsm_load_state_64(ctxt, smram.bytes);
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return rsm_load_state_64(ctxt, &smram.smram64);
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else
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#endif
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return rsm_load_state_32(ctxt, &smram.smram32);
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