ARM: S3C64XX: make regs-gpio-memport.h local

The header can be local in mach-s3c64xx/.

Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This commit is contained in:
Kukjin Kim 2013-01-02 13:20:38 -08:00
parent e62359283c
commit 8bb86ead06
3 changed files with 7 additions and 8 deletions

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@ -54,8 +54,6 @@
#include <mach/regs-gpio.h> #include <mach/regs-gpio.h>
#include <mach/regs-modem.h> #include <mach/regs-modem.h>
#include <mach/regs-gpio-memport.h>
#include <plat/regs-serial.h> #include <plat/regs-serial.h>
#include <plat/fb.h> #include <plat/fb.h>
#include <plat/sdhci.h> #include <plat/sdhci.h>
@ -72,6 +70,7 @@
#include "common.h" #include "common.h"
#include "crag6410.h" #include "crag6410.h"
#include "regs-gpio-memport.h"
/* serial port setup */ /* serial port setup */

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@ -30,9 +30,10 @@
#include <mach/regs-gpio.h> #include <mach/regs-gpio.h>
#include <mach/regs-clock.h> #include <mach/regs-clock.h>
#include <mach/regs-syscon-power.h> #include <mach/regs-syscon-power.h>
#include <mach/regs-gpio-memport.h>
#include <mach/regs-modem.h> #include <mach/regs-modem.h>
#include "regs-gpio-memport.h"
struct s3c64xx_pm_domain { struct s3c64xx_pm_domain {
char *const name; char *const name;
u32 ena; u32 ena;

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@ -1,5 +1,4 @@
/* linux/arch/arm/plat-s3c64xx/include/mach/regs-gpio-memport.h /*
*
* Copyright 2008 Openmoko, Inc. * Copyright 2008 Openmoko, Inc.
* Copyright 2008 Simtec Electronics * Copyright 2008 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk> * Ben Dooks <ben@simtec.co.uk>
@ -8,8 +7,8 @@
* S3C64XX - GPIO memory port register definitions * S3C64XX - GPIO memory port register definitions
*/ */
#ifndef __ASM_PLAT_S3C64XX_REGS_GPIO_MEMPORT_H #ifndef __MACH_S3C64XX_REGS_GPIO_MEMPORT_H
#define __ASM_PLAT_S3C64XX_REGS_GPIO_MEMPORT_H __FILE__ #define __MACH_S3C64XX_REGS_GPIO_MEMPORT_H __FILE__
#define S3C64XX_MEM0CONSTOP S3C64XX_GPIOREG(0x1B0) #define S3C64XX_MEM0CONSTOP S3C64XX_GPIOREG(0x1B0)
#define S3C64XX_MEM1CONSTOP S3C64XX_GPIOREG(0x1B4) #define S3C64XX_MEM1CONSTOP S3C64XX_GPIOREG(0x1B4)
@ -21,5 +20,5 @@
#define S3C64XX_MEM0DRVCON S3C64XX_GPIOREG(0x1D0) #define S3C64XX_MEM0DRVCON S3C64XX_GPIOREG(0x1D0)
#define S3C64XX_MEM1DRVCON S3C64XX_GPIOREG(0x1D4) #define S3C64XX_MEM1DRVCON S3C64XX_GPIOREG(0x1D4)
#endif /* __ASM_PLAT_S3C64XX_REGS_GPIO_MEMPORT_H */ #endif /* __MACH_S3C64XX_REGS_GPIO_MEMPORT_H */