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iio: adc: stx104: Implement and utilize register structures
[ Upstream commit6cfd14c54b
] Reduce magic numbers and improve code readability by implementing and utilizing named register data structures. Tested-by: Fred Eckert <Frede@cmslaser.com> Signed-off-by: William Breathitt Gray <william.gray@linaro.org> Link: https://lore.kernel.org/r/8cb91d5b53e57b066120e42ea07000d6c7ef5543.1657213745.git.william.gray@linaro.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Stable-dep-of:4f9b80aefb
("iio: addac: stx104: Fix race condition when converting analog-to-digital") Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -16,6 +16,7 @@
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/spinlock.h>
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#include <linux/types.h>
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#define STX104_OUT_CHAN(chan) { \
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.type = IIO_VOLTAGE, \
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@ -44,14 +45,36 @@ static unsigned int num_stx104;
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module_param_hw_array(base, uint, ioport, &num_stx104, 0);
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MODULE_PARM_DESC(base, "Apex Embedded Systems STX104 base addresses");
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/**
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* struct stx104_reg - device register structure
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* @ssr_ad: Software Strobe Register and ADC Data
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* @achan: ADC Channel
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* @dio: Digital I/O
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* @dac: DAC Channels
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* @cir_asr: Clear Interrupts and ADC Status
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* @acr: ADC Control
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* @pccr_fsh: Pacer Clock Control and FIFO Status MSB
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* @acfg: ADC Configuration
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*/
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struct stx104_reg {
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u16 ssr_ad;
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u8 achan;
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u8 dio;
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u16 dac[2];
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u8 cir_asr;
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u8 acr;
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u8 pccr_fsh;
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u8 acfg;
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};
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/**
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* struct stx104_iio - IIO device private data structure
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* @chan_out_states: channels' output states
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* @base: base port address of the IIO device
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* @reg: I/O address offset for the device registers
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*/
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struct stx104_iio {
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unsigned int chan_out_states[STX104_NUM_OUT_CHAN];
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void __iomem *base;
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struct stx104_reg __iomem *reg;
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};
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/**
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@ -64,7 +87,7 @@ struct stx104_iio {
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struct stx104_gpio {
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struct gpio_chip chip;
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spinlock_t lock;
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void __iomem *base;
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u8 __iomem *base;
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unsigned int out_state;
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};
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@ -72,6 +95,7 @@ static int stx104_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan, int *val, int *val2, long mask)
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{
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struct stx104_iio *const priv = iio_priv(indio_dev);
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struct stx104_reg __iomem *const reg = priv->reg;
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unsigned int adc_config;
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int adbu;
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int gain;
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@ -79,7 +103,7 @@ static int stx104_read_raw(struct iio_dev *indio_dev,
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switch (mask) {
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case IIO_CHAN_INFO_HARDWAREGAIN:
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/* get gain configuration */
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adc_config = ioread8(priv->base + 11);
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adc_config = ioread8(®->acfg);
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gain = adc_config & 0x3;
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*val = 1 << gain;
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@ -91,24 +115,26 @@ static int stx104_read_raw(struct iio_dev *indio_dev,
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}
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/* select ADC channel */
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iowrite8(chan->channel | (chan->channel << 4), priv->base + 2);
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iowrite8(chan->channel | (chan->channel << 4), ®->achan);
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/* trigger ADC sample capture and wait for completion */
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iowrite8(0, priv->base);
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while (ioread8(priv->base + 8) & BIT(7));
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/* trigger ADC sample capture by writing to the 8-bit
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* Software Strobe Register and wait for completion
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*/
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iowrite8(0, ®->ssr_ad);
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while (ioread8(®->cir_asr) & BIT(7));
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*val = ioread16(priv->base);
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*val = ioread16(®->ssr_ad);
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_OFFSET:
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/* get ADC bipolar/unipolar configuration */
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adc_config = ioread8(priv->base + 11);
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adc_config = ioread8(®->acfg);
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adbu = !(adc_config & BIT(2));
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*val = -32768 * adbu;
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SCALE:
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/* get ADC bipolar/unipolar and gain configuration */
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adc_config = ioread8(priv->base + 11);
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adc_config = ioread8(®->acfg);
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adbu = !(adc_config & BIT(2));
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gain = adc_config & 0x3;
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@ -130,16 +156,16 @@ static int stx104_write_raw(struct iio_dev *indio_dev,
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/* Only four gain states (x1, x2, x4, x8) */
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switch (val) {
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case 1:
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iowrite8(0, priv->base + 11);
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iowrite8(0, &priv->reg->acfg);
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break;
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case 2:
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iowrite8(1, priv->base + 11);
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iowrite8(1, &priv->reg->acfg);
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break;
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case 4:
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iowrite8(2, priv->base + 11);
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iowrite8(2, &priv->reg->acfg);
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break;
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case 8:
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iowrite8(3, priv->base + 11);
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iowrite8(3, &priv->reg->acfg);
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break;
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default:
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return -EINVAL;
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@ -153,7 +179,7 @@ static int stx104_write_raw(struct iio_dev *indio_dev,
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return -EINVAL;
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priv->chan_out_states[chan->channel] = val;
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iowrite16(val, priv->base + 4 + 2 * chan->channel);
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iowrite16(val, &priv->reg->dac[chan->channel]);
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return 0;
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}
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@ -307,15 +333,15 @@ static int stx104_probe(struct device *dev, unsigned int id)
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}
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priv = iio_priv(indio_dev);
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priv->base = devm_ioport_map(dev, base[id], STX104_EXTENT);
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if (!priv->base)
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priv->reg = devm_ioport_map(dev, base[id], STX104_EXTENT);
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if (!priv->reg)
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return -ENOMEM;
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indio_dev->info = &stx104_info;
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indio_dev->modes = INDIO_DIRECT_MODE;
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/* determine if differential inputs */
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if (ioread8(priv->base + 8) & BIT(5)) {
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if (ioread8(&priv->reg->cir_asr) & BIT(5)) {
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indio_dev->num_channels = ARRAY_SIZE(stx104_channels_diff);
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indio_dev->channels = stx104_channels_diff;
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} else {
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@ -327,14 +353,14 @@ static int stx104_probe(struct device *dev, unsigned int id)
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indio_dev->dev.parent = dev;
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/* configure device for software trigger operation */
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iowrite8(0, priv->base + 9);
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iowrite8(0, &priv->reg->acr);
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/* initialize gain setting to x1 */
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iowrite8(0, priv->base + 11);
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iowrite8(0, &priv->reg->acfg);
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/* initialize DAC output to 0V */
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iowrite16(0, priv->base + 4);
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iowrite16(0, priv->base + 6);
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iowrite16(0, &priv->reg->dac[0]);
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iowrite16(0, &priv->reg->dac[1]);
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stx104gpio->chip.label = dev_name(dev);
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stx104gpio->chip.parent = dev;
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@ -349,7 +375,7 @@ static int stx104_probe(struct device *dev, unsigned int id)
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stx104gpio->chip.get_multiple = stx104_gpio_get_multiple;
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stx104gpio->chip.set = stx104_gpio_set;
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stx104gpio->chip.set_multiple = stx104_gpio_set_multiple;
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stx104gpio->base = priv->base + 3;
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stx104gpio->base = &priv->reg->dio;
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stx104gpio->out_state = 0x0;
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spin_lock_init(&stx104gpio->lock);
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