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clk: qcom: ipq8074: add USB GDSCs

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Add GDSC-s for each of the two USB controllers built-in the IPQ8074.

Signed-off-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220515210048.483898-9-robimarko@gmail.com
This commit is contained in:
Robert Marko 2022-05-15 23:00:46 +02:00 committed by Bjorn Andersson
parent c87969d218
commit 8add990ace
2 changed files with 25 additions and 0 deletions
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1
drivers/clk/qcom/Kconfig
View File

@ -166,6 +166,7 @@ config IPQ_LCC_806X
config IPQ_GCC_8074
tristate "IPQ8074 Global Clock Controller"
select QCOM_GDSC
help
Support for global clock controller on ipq8074 devices.
Say Y if you want to use peripheral devices such as UART, SPI,

24
drivers/clk/qcom/gcc-ipq8074.c
View File

@ -22,6 +22,7 @@
#include "clk-alpha-pll.h"
#include "clk-regmap-divider.h"
#include "clk-regmap-mux.h"
#include "gdsc.h"
#include "reset.h"
enum {
@ -4407,6 +4408,22 @@ static struct clk_branch gcc_pcie0_axi_s_bridge_clk = {
},
};
static struct gdsc usb0_gdsc = {
.gdscr = 0x3e078,
.pd = {
.name = "usb0_gdsc",
},
.pwrsts = PWRSTS_OFF_ON,
};
static struct gdsc usb1_gdsc = {
.gdscr = 0x3f078,
.pd = {
.name = "usb1_gdsc",
},
.pwrsts = PWRSTS_OFF_ON,
};
static const struct alpha_pll_config ubi32_pll_config = {
.l = 0x4e,
.config_ctl_val = 0x200d4aa8,
@ -4810,6 +4827,11 @@ static const struct qcom_reset_map gcc_ipq8074_resets[] = {
[GCC_PCIE1_AXI_MASTER_STICKY_ARES] = { 0x76040, 6 },
};
static struct gdsc *gcc_ipq8074_gdscs[] = {
[USB0_GDSC] = &usb0_gdsc,
[USB1_GDSC] = &usb1_gdsc,
};
static const struct of_device_id gcc_ipq8074_match_table[] = {
{ .compatible = "qcom,gcc-ipq8074" },
{ }
@ -4832,6 +4854,8 @@ static const struct qcom_cc_desc gcc_ipq8074_desc = {
.num_resets = ARRAY_SIZE(gcc_ipq8074_resets),
.clk_hws = gcc_ipq8074_hws,
.num_clk_hws = ARRAY_SIZE(gcc_ipq8074_hws),
.gdscs = gcc_ipq8074_gdscs,
.num_gdscs = ARRAY_SIZE(gcc_ipq8074_gdscs),
};
static int gcc_ipq8074_probe(struct platform_device *pdev)