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ARM: shmobile: r8a7791: Add Audio DMAC devices to DT
Instantiate the two Audio DMA controllers in the r8a7791 device tree. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> [geert: corrected spelling of audmac1] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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@ -301,6 +301,62 @@
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dma-channels = <15>;
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};
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audma0: dma-controller@ec700000 {
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compatible = "renesas,rcar-dmac";
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reg = <0 0xec700000 0 0x10000>;
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interrupts = <0 346 IRQ_TYPE_LEVEL_HIGH
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0 320 IRQ_TYPE_LEVEL_HIGH
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0 321 IRQ_TYPE_LEVEL_HIGH
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0 322 IRQ_TYPE_LEVEL_HIGH
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0 323 IRQ_TYPE_LEVEL_HIGH
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0 324 IRQ_TYPE_LEVEL_HIGH
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0 325 IRQ_TYPE_LEVEL_HIGH
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0 326 IRQ_TYPE_LEVEL_HIGH
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0 327 IRQ_TYPE_LEVEL_HIGH
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0 328 IRQ_TYPE_LEVEL_HIGH
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0 329 IRQ_TYPE_LEVEL_HIGH
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0 330 IRQ_TYPE_LEVEL_HIGH
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0 331 IRQ_TYPE_LEVEL_HIGH
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0 332 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "error",
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"ch0", "ch1", "ch2", "ch3",
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"ch4", "ch5", "ch6", "ch7",
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"ch8", "ch9", "ch10", "ch11",
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"ch12";
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clocks = <&mstp5_clks R8A7791_CLK_AUDIO_DMAC0>;
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clock-names = "fck";
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#dma-cells = <1>;
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dma-channels = <13>;
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};
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audma1: dma-controller@ec720000 {
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compatible = "renesas,rcar-dmac";
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reg = <0 0xec720000 0 0x10000>;
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interrupts = <0 347 IRQ_TYPE_LEVEL_HIGH
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0 333 IRQ_TYPE_LEVEL_HIGH
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0 334 IRQ_TYPE_LEVEL_HIGH
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0 335 IRQ_TYPE_LEVEL_HIGH
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0 336 IRQ_TYPE_LEVEL_HIGH
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0 337 IRQ_TYPE_LEVEL_HIGH
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0 338 IRQ_TYPE_LEVEL_HIGH
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0 339 IRQ_TYPE_LEVEL_HIGH
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0 340 IRQ_TYPE_LEVEL_HIGH
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0 341 IRQ_TYPE_LEVEL_HIGH
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0 342 IRQ_TYPE_LEVEL_HIGH
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0 343 IRQ_TYPE_LEVEL_HIGH
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0 344 IRQ_TYPE_LEVEL_HIGH
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0 345 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "error",
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"ch0", "ch1", "ch2", "ch3",
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"ch4", "ch5", "ch6", "ch7",
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"ch8", "ch9", "ch10", "ch11",
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"ch12";
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clocks = <&mstp5_clks R8A7791_CLK_AUDIO_DMAC1>;
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clock-names = "fck";
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#dma-cells = <1>;
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dma-channels = <13>;
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};
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/* The memory map in the User's Manual maps the cores to bus numbers */
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i2c0: i2c@e6508000 {
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#address-cells = <1>;
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@ -1053,10 +1109,11 @@
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mstp5_clks: mstp5_clks@e6150144 {
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compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
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reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>;
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clocks = <&extal_clk>, <&p_clk>;
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clocks = <&hp_clk>, <&hp_clk>, <&extal_clk>, <&p_clk>;
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#clock-cells = <1>;
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renesas,clock-indices = <R8A7791_CLK_THERMAL R8A7791_CLK_PWM>;
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clock-output-names = "thermal", "pwm";
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renesas,clock-indices = <R8A7791_CLK_AUDIO_DMAC0 R8A7791_CLK_AUDIO_DMAC1
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R8A7791_CLK_THERMAL R8A7791_CLK_PWM>;
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clock-output-names = "audmac0", "audmac1", "thermal", "pwm";
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};
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mstp7_clks: mstp7_clks@e615014c {
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compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
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@ -69,6 +69,8 @@
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#define R8A7791_CLK_USBDMAC1 31
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/* MSTP5 */
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#define R8A7791_CLK_AUDIO_DMAC1 1
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#define R8A7791_CLK_AUDIO_DMAC0 2
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#define R8A7791_CLK_THERMAL 22
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#define R8A7791_CLK_PWM 23
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