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MIPS: Oprofile: Loongson: Cleanup the comments
Removes some out-of-date comments and empty lines. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1204/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -8,7 +8,6 @@
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* This file is subject to the terms and conditions of the GNU General Public
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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* for more details.
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*
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*/
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*/
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#include <linux/init.h>
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#include <linux/init.h>
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#include <linux/oprofile.h>
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#include <linux/oprofile.h>
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@ -17,11 +16,6 @@
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#include <loongson.h> /* LOONGSON2_PERFCNT_IRQ */
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#include <loongson.h> /* LOONGSON2_PERFCNT_IRQ */
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#include "op_impl.h"
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#include "op_impl.h"
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/*
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* a patch should be sent to oprofile with the loongson-specific support.
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* otherwise, the oprofile tool will not recognize this and complain about
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* "cpu_type 'unset' is not valid".
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*/
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#define LOONGSON2_CPU_TYPE "mips/loongson2"
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#define LOONGSON2_CPU_TYPE "mips/loongson2"
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#define LOONGSON2_PERFCNT_OVERFLOW (1ULL << 31)
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#define LOONGSON2_PERFCNT_OVERFLOW (1ULL << 31)
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@ -34,7 +28,6 @@
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#define LOONGSON2_PERFCTRL_EVENT(idx, event) \
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#define LOONGSON2_PERFCTRL_EVENT(idx, event) \
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(((event) & 0x0f) << ((idx) ? 9 : 5))
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(((event) & 0x0f) << ((idx) ? 9 : 5))
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/* Loongson2 performance counter register */
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#define read_c0_perfctrl() __read_64bit_c0_register($24, 0)
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#define read_c0_perfctrl() __read_64bit_c0_register($24, 0)
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#define write_c0_perfctrl(val) __write_64bit_c0_register($24, 0, val)
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#define write_c0_perfctrl(val) __write_64bit_c0_register($24, 0, val)
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#define read_c0_perfcnt() __read_64bit_c0_register($25, 0)
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#define read_c0_perfcnt() __read_64bit_c0_register($25, 0)
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@ -49,7 +42,6 @@ static struct loongson2_register_config {
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static char *oprofid = "LoongsonPerf";
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static char *oprofid = "LoongsonPerf";
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static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id);
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static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id);
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/* Compute all of the registers in preparation for enabling profiling. */
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static void loongson2_reg_setup(struct op_counter_config *cfg)
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static void loongson2_reg_setup(struct op_counter_config *cfg)
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{
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{
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@ -57,8 +49,11 @@ static void loongson2_reg_setup(struct op_counter_config *cfg)
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reg.reset_counter1 = 0;
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reg.reset_counter1 = 0;
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reg.reset_counter2 = 0;
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reg.reset_counter2 = 0;
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/* Compute the performance counter ctrl word. */
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/* For now count kernel and user mode */
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/*
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* Compute the performance counter ctrl word.
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* For now, count kernel and user mode.
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*/
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if (cfg[0].enabled) {
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if (cfg[0].enabled) {
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ctrl |= LOONGSON2_PERFCTRL_EVENT(0, cfg[0].event);
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ctrl |= LOONGSON2_PERFCTRL_EVENT(0, cfg[0].event);
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reg.reset_counter1 = 0x80000000ULL - cfg[0].count;
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reg.reset_counter1 = 0x80000000ULL - cfg[0].count;
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@ -81,11 +76,8 @@ static void loongson2_reg_setup(struct op_counter_config *cfg)
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reg.cnt1_enabled = cfg[0].enabled;
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reg.cnt1_enabled = cfg[0].enabled;
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reg.cnt2_enabled = cfg[1].enabled;
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reg.cnt2_enabled = cfg[1].enabled;
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}
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}
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/* Program all of the registers in preparation for enabling profiling. */
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static void loongson2_cpu_setup(void *args)
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static void loongson2_cpu_setup(void *args)
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{
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{
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write_c0_perfcnt((reg.reset_counter2 << 32) | reg.reset_counter1);
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write_c0_perfcnt((reg.reset_counter2 << 32) | reg.reset_counter1);
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@ -111,13 +103,6 @@ static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id)
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struct pt_regs *regs = get_irq_regs();
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struct pt_regs *regs = get_irq_regs();
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int enabled;
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int enabled;
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/*
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* LOONGSON2 defines two 32-bit performance counters.
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* To avoid a race updating the registers we need to stop the counters
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* while we're messing with
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* them ...
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*/
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/* Check whether the irq belongs to me */
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/* Check whether the irq belongs to me */
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enabled = read_c0_perfctrl() & LOONGSON2_PERFCTRL_ENABLE;
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enabled = read_c0_perfctrl() & LOONGSON2_PERFCTRL_ENABLE;
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if (!enabled)
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if (!enabled)
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