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iommu/io-pgtable: Add DART pagetable format
Apple's DART iommu uses a pagetable format that shares some similarities with the ones already implemented by io-pgtable.c. Add a new format variant to support the required differences so that we don't have to duplicate the pagetable handling code. Reviewed-by: Alexander Graf <graf@amazon.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Sven Peter <sven@svenpeter.dev> Link: https://lore.kernel.org/r/20210803121651.61594-2-sven@svenpeter.dev Signed-off-by: Joerg Roedel <jroedel@suse.de>
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@ -130,6 +130,9 @@
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#define ARM_MALI_LPAE_MEMATTR_IMP_DEF 0x88ULL
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#define ARM_MALI_LPAE_MEMATTR_WRITE_ALLOC 0x8DULL
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#define APPLE_DART_PTE_PROT_NO_WRITE (1<<7)
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#define APPLE_DART_PTE_PROT_NO_READ (1<<8)
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/* IOPTE accessors */
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#define iopte_deref(pte,d) __va(iopte_to_paddr(pte, d))
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@ -402,6 +405,15 @@ static arm_lpae_iopte arm_lpae_prot_to_pte(struct arm_lpae_io_pgtable *data,
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{
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arm_lpae_iopte pte;
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if (data->iop.fmt == APPLE_DART) {
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pte = 0;
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if (!(prot & IOMMU_WRITE))
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pte |= APPLE_DART_PTE_PROT_NO_WRITE;
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if (!(prot & IOMMU_READ))
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pte |= APPLE_DART_PTE_PROT_NO_READ;
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return pte;
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}
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if (data->iop.fmt == ARM_64_LPAE_S1 ||
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data->iop.fmt == ARM_32_LPAE_S1) {
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pte = ARM_LPAE_PTE_nG;
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@ -1102,6 +1114,52 @@ out_free_data:
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return NULL;
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}
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static struct io_pgtable *
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apple_dart_alloc_pgtable(struct io_pgtable_cfg *cfg, void *cookie)
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{
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struct arm_lpae_io_pgtable *data;
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int i;
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if (cfg->oas > 36)
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return NULL;
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data = arm_lpae_alloc_pgtable(cfg);
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if (!data)
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return NULL;
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/*
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* The table format itself always uses two levels, but the total VA
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* space is mapped by four separate tables, making the MMIO registers
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* an effective "level 1". For simplicity, though, we treat this
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* equivalently to LPAE stage 2 concatenation at level 2, with the
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* additional TTBRs each just pointing at consecutive pages.
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*/
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if (data->start_level < 1)
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goto out_free_data;
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if (data->start_level == 1 && data->pgd_bits > 2)
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goto out_free_data;
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if (data->start_level > 1)
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data->pgd_bits = 0;
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data->start_level = 2;
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cfg->apple_dart_cfg.n_ttbrs = 1 << data->pgd_bits;
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data->pgd_bits += data->bits_per_level;
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data->pgd = __arm_lpae_alloc_pages(ARM_LPAE_PGD_SIZE(data), GFP_KERNEL,
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cfg);
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if (!data->pgd)
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goto out_free_data;
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for (i = 0; i < cfg->apple_dart_cfg.n_ttbrs; ++i)
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cfg->apple_dart_cfg.ttbr[i] =
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virt_to_phys(data->pgd + i * ARM_LPAE_GRANULE(data));
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return &data->iop;
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out_free_data:
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kfree(data);
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return NULL;
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}
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struct io_pgtable_init_fns io_pgtable_arm_64_lpae_s1_init_fns = {
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.alloc = arm_64_lpae_alloc_pgtable_s1,
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.free = arm_lpae_free_pgtable,
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@ -1127,6 +1185,11 @@ struct io_pgtable_init_fns io_pgtable_arm_mali_lpae_init_fns = {
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.free = arm_lpae_free_pgtable,
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};
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struct io_pgtable_init_fns io_pgtable_apple_dart_init_fns = {
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.alloc = apple_dart_alloc_pgtable,
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.free = arm_lpae_free_pgtable,
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};
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#ifdef CONFIG_IOMMU_IO_PGTABLE_LPAE_SELFTEST
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static struct io_pgtable_cfg *cfg_cookie __initdata;
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@ -20,6 +20,7 @@ io_pgtable_init_table[IO_PGTABLE_NUM_FMTS] = {
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[ARM_64_LPAE_S1] = &io_pgtable_arm_64_lpae_s1_init_fns,
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[ARM_64_LPAE_S2] = &io_pgtable_arm_64_lpae_s2_init_fns,
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[ARM_MALI_LPAE] = &io_pgtable_arm_mali_lpae_init_fns,
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[APPLE_DART] = &io_pgtable_apple_dart_init_fns,
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#endif
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#ifdef CONFIG_IOMMU_IO_PGTABLE_ARMV7S
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[ARM_V7S] = &io_pgtable_arm_v7s_init_fns,
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@ -16,6 +16,7 @@ enum io_pgtable_fmt {
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ARM_V7S,
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ARM_MALI_LPAE,
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AMD_IOMMU_V1,
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APPLE_DART,
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IO_PGTABLE_NUM_FMTS,
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};
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@ -136,6 +137,11 @@ struct io_pgtable_cfg {
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u64 transtab;
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u64 memattr;
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} arm_mali_lpae_cfg;
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struct {
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u64 ttbr[4];
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u32 n_ttbrs;
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} apple_dart_cfg;
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};
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};
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@ -254,5 +260,6 @@ extern struct io_pgtable_init_fns io_pgtable_arm_64_lpae_s2_init_fns;
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extern struct io_pgtable_init_fns io_pgtable_arm_v7s_init_fns;
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extern struct io_pgtable_init_fns io_pgtable_arm_mali_lpae_init_fns;
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extern struct io_pgtable_init_fns io_pgtable_amd_iommu_v1_init_fns;
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extern struct io_pgtable_init_fns io_pgtable_apple_dart_init_fns;
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#endif /* __IO_PGTABLE_H */
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