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mfd: Add comments for the twl4030-power register and bit layout
Describe how the resource registers are laid out and the various bit-fields in them. Signed-off-by: Amit Kucheria <amit.kucheria@verdurent.com> Cc: linux-omap@vger.kernel.org Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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@ -67,14 +67,22 @@ static u8 twl4030_start_script_address = 0x2b;
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#define R_KEY_1 0xC0
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#define R_KEY_2 0x0C
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/* resource configuration registers */
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/* resource configuration registers
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<RESOURCE>_DEV_GRP at address 'n+0'
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<RESOURCE>_TYPE at address 'n+1'
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<RESOURCE>_REMAP at address 'n+2'
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<RESOURCE>_DEDICATED at address 'n+3'
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*/
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#define DEV_GRP_OFFSET 0
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#define TYPE_OFFSET 1
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/* Bit positions in the registers */
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/* <RESOURCE>_DEV_GRP */
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#define DEV_GRP_SHIFT 5
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#define DEV_GRP_MASK (7 << DEV_GRP_SHIFT)
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/* <RESOURCE>_TYPE */
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#define TYPE_SHIFT 0
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#define TYPE_MASK (7 << TYPE_SHIFT)
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#define TYPE2_SHIFT 3
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