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net: hns: Modify GMAC init TX threshold value
This patch reduces GMAC TX threshold value to avoid gmac hang-up with speed 100M/duplex half. Signed-off-by: lipeng <lipeng321@huawei.com> Signed-off-by: JinchuanTian <tianjinchuan1@huawei.com> Reviewed-by: Yisen Zhuang <yisen.zhuang@huawei.com> Signed-off-by: Salil Mehta <salil.mehta@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -325,6 +325,12 @@ static void hns_gmac_init(void *mac_drv)
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hns_gmac_tx_loop_pkt_dis(mac_drv);
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hns_gmac_tx_loop_pkt_dis(mac_drv);
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if (drv->mac_cb->mac_type == HNAE_PORT_DEBUG)
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if (drv->mac_cb->mac_type == HNAE_PORT_DEBUG)
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hns_gmac_set_uc_match(mac_drv, 0);
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hns_gmac_set_uc_match(mac_drv, 0);
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/* reduce gmac tx water line to avoid gmac hang-up
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* in speed 100M and duplex half.
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*/
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dsaf_set_dev_field(drv, GMAC_TX_WATER_LINE_REG, GMAC_TX_WATER_LINE_MASK,
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GMAC_TX_WATER_LINE_SHIFT, 8);
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}
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}
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void hns_gmac_update_stats(void *mac_drv)
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void hns_gmac_update_stats(void *mac_drv)
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@ -466,6 +466,7 @@
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#define GMAC_DUPLEX_TYPE_REG 0x0008UL
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#define GMAC_DUPLEX_TYPE_REG 0x0008UL
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#define GMAC_FD_FC_TYPE_REG 0x000CUL
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#define GMAC_FD_FC_TYPE_REG 0x000CUL
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#define GMAC_TX_WATER_LINE_REG 0x0010UL
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#define GMAC_FC_TX_TIMER_REG 0x001CUL
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#define GMAC_FC_TX_TIMER_REG 0x001CUL
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#define GMAC_FD_FC_ADDR_LOW_REG 0x0020UL
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#define GMAC_FD_FC_ADDR_LOW_REG 0x0020UL
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#define GMAC_FD_FC_ADDR_HIGH_REG 0x0024UL
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#define GMAC_FD_FC_ADDR_HIGH_REG 0x0024UL
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@ -912,6 +913,9 @@
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#define GMAC_DUPLEX_TYPE_B 0
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#define GMAC_DUPLEX_TYPE_B 0
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#define GMAC_TX_WATER_LINE_MASK ((1UL << 8) - 1)
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#define GMAC_TX_WATER_LINE_SHIFT 0
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#define GMAC_FC_TX_TIMER_S 0
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#define GMAC_FC_TX_TIMER_S 0
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#define GMAC_FC_TX_TIMER_M 0xffff
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#define GMAC_FC_TX_TIMER_M 0xffff
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