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ARM i.MX53: tqma53: fix pinctrl settings
BIT(31) is NO_PAD_CTL, not BIT(16) Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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@ -72,11 +72,11 @@
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i2s {
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pinctrl_i2s_1: i2s-grp1 {
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fsl,pins = <
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MX53_PAD_GPIO_19__GPIO4_5 0x10000 /* I2S_MCLK */
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MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC 0x10000 /* I2S_SCLK */
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MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD 0x10000 /* I2S_DOUT */
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MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS 0x10000 /* I2S_LRCLK */
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MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD 0x10000 /* I2S_DIN */
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MX53_PAD_GPIO_19__GPIO4_5 0x80000000 /* I2S_MCLK */
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MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC 0x80000000 /* I2S_SCLK */
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MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD 0x80000000 /* I2S_DOUT */
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MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS 0x80000000 /* I2S_LRCLK */
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MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD 0x80000000 /* I2S_DIN */
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>;
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};
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};
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@ -84,16 +84,16 @@
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hog {
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pinctrl_hog: hoggrp {
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fsl,pins = <
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MX53_PAD_EIM_CS1__IPU_DI1_PIN6 0x10000 /* VSYNC */
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MX53_PAD_EIM_DA15__IPU_DI1_PIN4 0x10000 /* HSYNC */
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MX53_PAD_PATA_DA_1__GPIO7_7 0x10000 /* LCD_BLT_EN */
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MX53_PAD_PATA_DA_2__GPIO7_8 0x10000 /* LCD_RESET */
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MX53_PAD_PATA_DATA5__GPIO2_5 0x10000 /* LCD_POWER */
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MX53_PAD_PATA_DATA6__GPIO2_6 0x10000 /* PMIC_INT */
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MX53_PAD_PATA_DATA14__GPIO2_14 0x10000 /* CSI_RST */
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MX53_PAD_PATA_DATA15__GPIO2_15 0x10000 /* CSI_PWDN */
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MX53_PAD_GPIO_0__GPIO1_0 0x10000 /* SYSTEM_DOWN */
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MX53_PAD_GPIO_3__GPIO1_3 0x10000
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MX53_PAD_EIM_CS1__IPU_DI1_PIN6 0x80000000 /* VSYNC */
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MX53_PAD_EIM_DA15__IPU_DI1_PIN4 0x80000000 /* HSYNC */
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MX53_PAD_PATA_DA_1__GPIO7_7 0x80000000 /* LCD_BLT_EN */
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MX53_PAD_PATA_DA_2__GPIO7_8 0x80000000 /* LCD_RESET */
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MX53_PAD_PATA_DATA5__GPIO2_5 0x80000000 /* LCD_POWER */
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MX53_PAD_PATA_DATA6__GPIO2_6 0x80000000 /* PMIC_INT */
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MX53_PAD_PATA_DATA14__GPIO2_14 0x80000000 /* CSI_RST */
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MX53_PAD_PATA_DATA15__GPIO2_15 0x80000000 /* CSI_PWDN */
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MX53_PAD_GPIO_0__GPIO1_0 0x80000000 /* SYSTEM_DOWN */
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MX53_PAD_GPIO_3__GPIO1_3 0x80000000
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>;
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};
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};
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