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ARM: imx: Remove i.MX27 board files
i.MX27 has basic device tree support. To achieve the goal of converting all i.MX SoCs to a devicetree-only platform, remove imx27 board files. Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Fabio Estevam
Shawn Guo
parent
4b563a0666
commit
879c0e5e0a
@ -20,9 +20,9 @@ CONFIG_MACH_MX27ADS=y
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CONFIG_MACH_MX27_3DS=y
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CONFIG_MACH_IMX27_VISSTRIM_M10=y
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CONFIG_MACH_PCA100=y
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CONFIG_MACH_IMX27_DT=y
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CONFIG_SOC_IMX1=y
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CONFIG_SOC_IMX25=y
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CONFIG_SOC_IMX27=y
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CONFIG_AEABI=y
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CONFIG_ZBOOT_ROM_TEXT=0x0
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CONFIG_ZBOOT_ROM_BSS=0x0
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@ -29,8 +29,8 @@ CONFIG_MACH_MX27ADS=y
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CONFIG_MACH_MX27_3DS=y
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CONFIG_MACH_IMX27_VISSTRIM_M10=y
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CONFIG_MACH_PCA100=y
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CONFIG_MACH_IMX27_DT=y
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CONFIG_SOC_IMX25=y
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CONFIG_SOC_IMX27=y
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CONFIG_ARCH_MVEBU=y
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CONFIG_MACH_KIRKWOOD=y
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CONFIG_ARCH_ORION5X=y
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@ -53,13 +53,6 @@ config IMX_HAVE_IOMUX_V1
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config ARCH_MXC_IOMUX_V3
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bool
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config SOC_IMX27
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bool
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select CPU_ARM926T
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select IMX_HAVE_IOMUX_V1
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select MXC_AVIC
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select PINCTRL_IMX27
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config SOC_IMX31
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bool
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select CPU_V6
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@ -71,88 +64,6 @@ config SOC_IMX35
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select MXC_AVIC
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select PINCTRL_IMX35
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if ARCH_MULTI_V5
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comment "MX27 platforms:"
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config MACH_MX27ADS
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bool "MX27ADS platform"
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select IMX_HAVE_PLATFORM_IMX_FB
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select IMX_HAVE_PLATFORM_IMX_I2C
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select IMX_HAVE_PLATFORM_IMX_UART
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select IMX_HAVE_PLATFORM_MXC_MMC
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select IMX_HAVE_PLATFORM_MXC_NAND
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select IMX_HAVE_PLATFORM_MXC_W1
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select SOC_IMX27
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help
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Include support for MX27ADS platform. This includes specific
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configurations for the board and its peripherals.
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config MACH_MX27_3DS
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bool "MX27PDK platform"
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select IMX_HAVE_PLATFORM_FSL_USB2_UDC
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select IMX_HAVE_PLATFORM_IMX2_WDT
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select IMX_HAVE_PLATFORM_IMX_FB
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select IMX_HAVE_PLATFORM_IMX_I2C
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select IMX_HAVE_PLATFORM_IMX_KEYPAD
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select IMX_HAVE_PLATFORM_IMX_SSI
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select IMX_HAVE_PLATFORM_IMX_UART
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select IMX_HAVE_PLATFORM_MX2_CAMERA
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select IMX_HAVE_PLATFORM_MXC_EHCI
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select IMX_HAVE_PLATFORM_MXC_MMC
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select IMX_HAVE_PLATFORM_SPI_IMX
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select MXC_DEBUG_BOARD
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select USB_ULPI_VIEWPORT if USB_ULPI
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select SOC_IMX27
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help
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Include support for MX27PDK platform. This includes specific
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configurations for the board and its peripherals.
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config MACH_IMX27_VISSTRIM_M10
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bool "Vista Silicon i.MX27 Visstrim_m10"
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select IMX_HAVE_PLATFORM_GPIO_KEYS
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select IMX_HAVE_PLATFORM_IMX_I2C
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select IMX_HAVE_PLATFORM_IMX_SSI
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select IMX_HAVE_PLATFORM_IMX_UART
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select IMX_HAVE_PLATFORM_MX2_CAMERA
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select IMX_HAVE_PLATFORM_MX2_EMMA
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select IMX_HAVE_PLATFORM_MXC_EHCI
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select IMX_HAVE_PLATFORM_MXC_MMC
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select LEDS_GPIO_REGISTER
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select SOC_IMX27
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help
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Include support for Visstrim_m10 platform and its different variants.
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This includes specific configurations for the board and its
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peripherals.
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config MACH_PCA100
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bool "Phytec phyCARD-s (pca100)"
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select IMX_HAVE_PLATFORM_FSL_USB2_UDC
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select IMX_HAVE_PLATFORM_IMX2_WDT
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select IMX_HAVE_PLATFORM_IMX_FB
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select IMX_HAVE_PLATFORM_IMX_I2C
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select IMX_HAVE_PLATFORM_IMX_SSI
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select IMX_HAVE_PLATFORM_IMX_UART
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select IMX_HAVE_PLATFORM_MXC_EHCI
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select IMX_HAVE_PLATFORM_MXC_MMC
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select IMX_HAVE_PLATFORM_MXC_NAND
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select IMX_HAVE_PLATFORM_MXC_W1
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select IMX_HAVE_PLATFORM_SPI_IMX
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select USB_ULPI_VIEWPORT if USB_ULPI
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select SOC_IMX27
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help
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Include support for phyCARD-s (aka pca100) platform. This
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includes specific configurations for the module and its peripherals.
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config MACH_IMX27_DT
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bool "Support i.MX27 platforms from device tree"
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select SOC_IMX27
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help
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Include support for Freescale i.MX27 based platforms
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using the device tree for discovery
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endif
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if ARCH_MULTI_V6
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comment "MX31 platforms:"
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@ -391,8 +302,6 @@ config MACH_VPR200
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endif
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comment "Device tree only"
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if ARCH_MULTI_V4T
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config SOC_IMX1
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@ -415,6 +324,16 @@ config SOC_IMX25
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select PINCTRL_IMX25
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help
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This enables support for Freescale i.MX25 processor
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config SOC_IMX27
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bool "i.MX27 support"
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select IMX_HAVE_IOMUX_V1
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select CPU_ARM926T
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select MXC_AVIC
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select PINCTRL_IMX27
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help
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This enables support for Freescale i.MX27 processor
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endif
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if ARCH_MULTI_V7
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@ -3,7 +3,7 @@ obj-y := cpu.o system.o irq-common.o
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obj-$(CONFIG_SOC_IMX25) += cpu-imx25.o mach-imx25.o pm-imx25.o
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obj-$(CONFIG_SOC_IMX27) += cpu-imx27.o pm-imx27.o
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obj-$(CONFIG_SOC_IMX27) += cpu-imx27.o pm-imx27.o mach-imx27.o
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obj-$(CONFIG_SOC_IMX27) += mm-imx27.o ehci-imx27.o
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obj-$(CONFIG_SOC_IMX31) += mm-imx3.o cpu-imx31.o iomux-imx31.o ehci-imx31.o
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@ -35,13 +35,6 @@ obj-y += ssi-fiq.o
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obj-y += ssi-fiq-ksym.o
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endif
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# i.MX27 based machines
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obj-$(CONFIG_MACH_MX27ADS) += mach-mx27ads.o
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obj-$(CONFIG_MACH_MX27_3DS) += mach-mx27_3ds.o
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obj-$(CONFIG_MACH_IMX27_VISSTRIM_M10) += mach-imx27_visstrim_m10.o
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obj-$(CONFIG_MACH_PCA100) += mach-pca100.o
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obj-$(CONFIG_MACH_IMX27_DT) += imx27-dt.o
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# i.MX31 based machines
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obj-$(CONFIG_MACH_MX31ADS) += mach-mx31ads.o
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obj-$(CONFIG_MACH_MX31LILLY) += mach-mx31lilly.o mx31lilly-db.o
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@ -1,562 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* mach-imx27_visstrim_m10.c
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*
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* Copyright 2010 Javier Martin <javier.martin@vista-silicon.com>
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*
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* Based on mach-pcm038.c, mach-pca100.c, mach-mx27ads.c and others.
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/platform_device.h>
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#include <linux/mtd/physmap.h>
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#include <linux/i2c.h>
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#include <linux/platform_data/pca953x.h>
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#include <linux/input.h>
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#include <linux/gpio.h>
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#include <linux/delay.h>
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#include <linux/dma-mapping.h>
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#include <linux/leds.h>
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#include <linux/platform_data/asoc-mx27vis.h>
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#include <sound/tlv320aic32x4.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/time.h>
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#include <asm/system_info.h>
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#include <asm/memblock.h>
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#include "common.h"
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#include "devices-imx27.h"
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#include "ehci.h"
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#include "hardware.h"
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#include "iomux-mx27.h"
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#define TVP5150_RSTN (GPIO_PORTC + 18)
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#define TVP5150_PWDN (GPIO_PORTC + 19)
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#define OTG_PHY_CS_GPIO (GPIO_PORTF + 17)
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#define SDHC1_IRQ_GPIO IMX_GPIO_NR(2, 25)
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#define VERSION_MASK 0x7
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#define MOTHERBOARD_SHIFT 4
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#define EXPBOARD_SHIFT 0
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#define MOTHERBOARD_BIT2 (GPIO_PORTD + 31)
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#define MOTHERBOARD_BIT1 (GPIO_PORTD + 30)
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#define MOTHERBOARD_BIT0 (GPIO_PORTD + 29)
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#define EXPBOARD_BIT2 (GPIO_PORTD + 25)
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#define EXPBOARD_BIT1 (GPIO_PORTD + 27)
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#define EXPBOARD_BIT0 (GPIO_PORTD + 28)
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#define AMP_GAIN_0 (GPIO_PORTF + 9)
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#define AMP_GAIN_1 (GPIO_PORTF + 8)
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#define AMP_MUTE_SDL (GPIO_PORTE + 5)
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#define AMP_MUTE_SDR (GPIO_PORTF + 7)
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static const int visstrim_m10_pins[] __initconst = {
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/* UART1 (console) */
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PE12_PF_UART1_TXD,
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PE13_PF_UART1_RXD,
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PE14_PF_UART1_CTS,
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PE15_PF_UART1_RTS,
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/* FEC */
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PD0_AIN_FEC_TXD0,
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PD1_AIN_FEC_TXD1,
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PD2_AIN_FEC_TXD2,
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PD3_AIN_FEC_TXD3,
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PD4_AOUT_FEC_RX_ER,
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PD5_AOUT_FEC_RXD1,
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PD6_AOUT_FEC_RXD2,
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PD7_AOUT_FEC_RXD3,
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PD8_AF_FEC_MDIO,
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PD9_AIN_FEC_MDC,
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PD10_AOUT_FEC_CRS,
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PD11_AOUT_FEC_TX_CLK,
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PD12_AOUT_FEC_RXD0,
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PD13_AOUT_FEC_RX_DV,
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PD14_AOUT_FEC_RX_CLK,
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PD15_AOUT_FEC_COL,
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PD16_AIN_FEC_TX_ER,
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PF23_AIN_FEC_TX_EN,
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/* SSI1 */
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PC20_PF_SSI1_FS,
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PC21_PF_SSI1_RXD,
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PC22_PF_SSI1_TXD,
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PC23_PF_SSI1_CLK,
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/* SDHC1 */
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PE18_PF_SD1_D0,
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PE19_PF_SD1_D1,
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PE20_PF_SD1_D2,
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PE21_PF_SD1_D3,
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PE22_PF_SD1_CMD,
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PE23_PF_SD1_CLK,
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/* Both I2Cs */
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PD17_PF_I2C_DATA,
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PD18_PF_I2C_CLK,
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PC5_PF_I2C2_SDA,
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PC6_PF_I2C2_SCL,
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/* USB OTG */
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OTG_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT,
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PC9_PF_USBOTG_DATA0,
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PC11_PF_USBOTG_DATA1,
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PC10_PF_USBOTG_DATA2,
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PC13_PF_USBOTG_DATA3,
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PC12_PF_USBOTG_DATA4,
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PC7_PF_USBOTG_DATA5,
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PC8_PF_USBOTG_DATA6,
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PE25_PF_USBOTG_DATA7,
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PE24_PF_USBOTG_CLK,
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PE2_PF_USBOTG_DIR,
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PE0_PF_USBOTG_NXT,
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PE1_PF_USBOTG_STP,
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PB23_PF_USB_PWR,
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PB24_PF_USB_OC,
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/* CSI */
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TVP5150_RSTN | GPIO_GPIO | GPIO_OUT,
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TVP5150_PWDN | GPIO_GPIO | GPIO_OUT,
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PB10_PF_CSI_D0,
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PB11_PF_CSI_D1,
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PB12_PF_CSI_D2,
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PB13_PF_CSI_D3,
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PB14_PF_CSI_D4,
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PB15_PF_CSI_MCLK,
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PB16_PF_CSI_PIXCLK,
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PB17_PF_CSI_D5,
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PB18_PF_CSI_D6,
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PB19_PF_CSI_D7,
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PB20_PF_CSI_VSYNC,
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PB21_PF_CSI_HSYNC,
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/* mother board version */
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MOTHERBOARD_BIT2 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
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MOTHERBOARD_BIT1 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
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MOTHERBOARD_BIT0 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
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/* expansion board version */
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EXPBOARD_BIT2 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
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EXPBOARD_BIT1 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
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EXPBOARD_BIT0 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
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/* Audio AMP control */
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AMP_GAIN_0 | GPIO_GPIO | GPIO_OUT,
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AMP_GAIN_1 | GPIO_GPIO | GPIO_OUT,
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AMP_MUTE_SDL | GPIO_GPIO | GPIO_OUT,
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AMP_MUTE_SDR | GPIO_GPIO | GPIO_OUT,
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};
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static struct gpio visstrim_m10_version_gpios[] = {
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{ EXPBOARD_BIT0, GPIOF_IN, "exp-version-0" },
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{ EXPBOARD_BIT1, GPIOF_IN, "exp-version-1" },
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{ EXPBOARD_BIT2, GPIOF_IN, "exp-version-2" },
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{ MOTHERBOARD_BIT0, GPIOF_IN, "mother-version-0" },
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{ MOTHERBOARD_BIT1, GPIOF_IN, "mother-version-1" },
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{ MOTHERBOARD_BIT2, GPIOF_IN, "mother-version-2" },
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};
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static const struct gpio visstrim_m10_gpios[] __initconst = {
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{
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.gpio = TVP5150_RSTN,
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.flags = GPIOF_DIR_OUT | GPIOF_INIT_HIGH,
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.label = "tvp5150_rstn",
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},
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{
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.gpio = TVP5150_PWDN,
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.flags = GPIOF_DIR_OUT | GPIOF_INIT_LOW,
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.label = "tvp5150_pwdn",
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},
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{
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.gpio = OTG_PHY_CS_GPIO,
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.flags = GPIOF_DIR_OUT | GPIOF_INIT_LOW,
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.label = "usbotg_cs",
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},
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{
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.gpio = AMP_GAIN_0,
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.flags = GPIOF_DIR_OUT,
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.label = "amp-gain-0",
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},
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{
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.gpio = AMP_GAIN_1,
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.flags = GPIOF_DIR_OUT,
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.label = "amp-gain-1",
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},
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{
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.gpio = AMP_MUTE_SDL,
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.flags = GPIOF_DIR_OUT,
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.label = "amp-mute-sdl",
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},
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{
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.gpio = AMP_MUTE_SDR,
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.flags = GPIOF_DIR_OUT,
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.label = "amp-mute-sdr",
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},
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};
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/* Camera */
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static struct mx2_camera_platform_data visstrim_camera = {
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.flags = MX2_CAMERA_CCIR | MX2_CAMERA_CCIR_INTERLACE |
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MX2_CAMERA_PCLK_SAMPLE_RISING,
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.clk = 100000,
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};
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static phys_addr_t mx2_camera_base __initdata;
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#define MX2_CAMERA_BUF_SIZE SZ_8M
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static void __init visstrim_analog_camera_init(void)
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{
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struct platform_device *pdev;
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gpio_set_value(TVP5150_PWDN, 1);
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ndelay(1);
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gpio_set_value(TVP5150_RSTN, 0);
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ndelay(500);
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gpio_set_value(TVP5150_RSTN, 1);
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ndelay(200000);
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pdev = imx27_add_mx2_camera(&visstrim_camera);
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if (IS_ERR(pdev))
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return;
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dma_declare_coherent_memory(&pdev->dev, mx2_camera_base,
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mx2_camera_base, MX2_CAMERA_BUF_SIZE);
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}
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static void __init visstrim_reserve(void)
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{
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/* reserve 4 MiB for mx2-camera */
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mx2_camera_base = arm_memblock_steal(3 * MX2_CAMERA_BUF_SIZE,
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MX2_CAMERA_BUF_SIZE);
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}
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/* GPIOs used as events for applications */
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static struct gpio_keys_button visstrim_gpio_keys[] = {
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{
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.type = EV_KEY,
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.code = KEY_RESTART,
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.gpio = (GPIO_PORTC + 15),
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.desc = "Default config",
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.active_low = 0,
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.wakeup = 1,
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},
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{
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.type = EV_KEY,
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.code = KEY_RECORD,
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.gpio = (GPIO_PORTF + 14),
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.desc = "Record",
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.active_low = 0,
|
||||
.wakeup = 1,
|
||||
},
|
||||
{
|
||||
.type = EV_KEY,
|
||||
.code = KEY_STOP,
|
||||
.gpio = (GPIO_PORTF + 13),
|
||||
.desc = "Stop",
|
||||
.active_low = 0,
|
||||
.wakeup = 1,
|
||||
}
|
||||
};
|
||||
|
||||
static const struct gpio_keys_platform_data
|
||||
visstrim_gpio_keys_platform_data __initconst = {
|
||||
.buttons = visstrim_gpio_keys,
|
||||
.nbuttons = ARRAY_SIZE(visstrim_gpio_keys),
|
||||
};
|
||||
|
||||
/* led */
|
||||
static const struct gpio_led visstrim_m10_leds[] __initconst = {
|
||||
{
|
||||
.name = "visstrim:ld0",
|
||||
.default_trigger = "nand-disk",
|
||||
.gpio = (GPIO_PORTC + 29),
|
||||
},
|
||||
{
|
||||
.name = "visstrim:ld1",
|
||||
.default_trigger = "nand-disk",
|
||||
.gpio = (GPIO_PORTC + 24),
|
||||
},
|
||||
{
|
||||
.name = "visstrim:ld2",
|
||||
.default_trigger = "nand-disk",
|
||||
.gpio = (GPIO_PORTC + 28),
|
||||
},
|
||||
{
|
||||
.name = "visstrim:ld3",
|
||||
.default_trigger = "nand-disk",
|
||||
.gpio = (GPIO_PORTC + 25),
|
||||
},
|
||||
};
|
||||
|
||||
static const struct gpio_led_platform_data visstrim_m10_led_data __initconst = {
|
||||
.leds = visstrim_m10_leds,
|
||||
.num_leds = ARRAY_SIZE(visstrim_m10_leds),
|
||||
};
|
||||
|
||||
/* Visstrim_SM10 has a microSD slot connected to sdhc1 */
|
||||
static int visstrim_m10_sdhc1_init(struct device *dev,
|
||||
irq_handler_t detect_irq, void *data)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = request_irq(gpio_to_irq(SDHC1_IRQ_GPIO), detect_irq,
|
||||
IRQF_TRIGGER_FALLING, "mmc-detect", data);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void visstrim_m10_sdhc1_exit(struct device *dev, void *data)
|
||||
{
|
||||
free_irq(gpio_to_irq(SDHC1_IRQ_GPIO), data);
|
||||
}
|
||||
|
||||
static const struct imxmmc_platform_data visstrim_m10_sdhc_pdata __initconst = {
|
||||
.init = visstrim_m10_sdhc1_init,
|
||||
.exit = visstrim_m10_sdhc1_exit,
|
||||
};
|
||||
|
||||
/* Visstrim_SM10 NOR flash */
|
||||
static struct physmap_flash_data visstrim_m10_flash_data = {
|
||||
.width = 2,
|
||||
};
|
||||
|
||||
static struct resource visstrim_m10_flash_resource = {
|
||||
.start = 0xc0000000,
|
||||
.end = 0xc0000000 + SZ_64M - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
};
|
||||
|
||||
static struct platform_device visstrim_m10_nor_mtd_device = {
|
||||
.name = "physmap-flash",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.platform_data = &visstrim_m10_flash_data,
|
||||
},
|
||||
.num_resources = 1,
|
||||
.resource = &visstrim_m10_flash_resource,
|
||||
};
|
||||
|
||||
static struct platform_device *platform_devices[] __initdata = {
|
||||
&visstrim_m10_nor_mtd_device,
|
||||
};
|
||||
|
||||
/* Visstrim_M10 uses UART0 as console */
|
||||
static const struct imxuart_platform_data uart_pdata __initconst = {
|
||||
.flags = IMXUART_HAVE_RTSCTS,
|
||||
};
|
||||
|
||||
/* I2C */
|
||||
static const struct imxi2c_platform_data visstrim_m10_i2c_data __initconst = {
|
||||
.bitrate = 100000,
|
||||
};
|
||||
|
||||
static struct pca953x_platform_data visstrim_m10_pca9555_pdata = {
|
||||
.gpio_base = 240, /* After MX27 internal GPIOs */
|
||||
.invert = 0,
|
||||
};
|
||||
|
||||
static struct aic32x4_pdata visstrim_m10_aic32x4_pdata = {
|
||||
.power_cfg = AIC32X4_PWR_MICBIAS_2075_LDOIN |
|
||||
AIC32X4_PWR_AVDD_DVDD_WEAK_DISABLE |
|
||||
AIC32X4_PWR_AIC32X4_LDO_ENABLE |
|
||||
AIC32X4_PWR_CMMODE_LDOIN_RANGE_18_36 |
|
||||
AIC32X4_PWR_CMMODE_HP_LDOIN_POWERED,
|
||||
.micpga_routing = AIC32X4_MICPGA_ROUTE_LMIC_IN2R_10K |
|
||||
AIC32X4_MICPGA_ROUTE_RMIC_IN1L_10K,
|
||||
.swapdacs = false,
|
||||
};
|
||||
|
||||
static struct i2c_board_info visstrim_m10_i2c_devices[] = {
|
||||
{
|
||||
I2C_BOARD_INFO("pca9555", 0x20),
|
||||
.platform_data = &visstrim_m10_pca9555_pdata,
|
||||
},
|
||||
{
|
||||
I2C_BOARD_INFO("tlv320aic32x4", 0x18),
|
||||
.platform_data = &visstrim_m10_aic32x4_pdata,
|
||||
},
|
||||
{
|
||||
I2C_BOARD_INFO("m41t00", 0x68),
|
||||
}
|
||||
};
|
||||
|
||||
/* USB OTG */
|
||||
static int otg_phy_init(struct platform_device *pdev)
|
||||
{
|
||||
return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
|
||||
}
|
||||
|
||||
static const struct mxc_usbh_platform_data
|
||||
visstrim_m10_usbotg_pdata __initconst = {
|
||||
.init = otg_phy_init,
|
||||
.portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
|
||||
};
|
||||
|
||||
/* SSI */
|
||||
static const struct imx_ssi_platform_data visstrim_m10_ssi_pdata __initconst = {
|
||||
.flags = IMX_SSI_DMA | IMX_SSI_SYN,
|
||||
};
|
||||
|
||||
/* coda */
|
||||
|
||||
static void __init visstrim_coda_init(void)
|
||||
{
|
||||
struct platform_device *pdev;
|
||||
|
||||
pdev = imx27_add_coda();
|
||||
dma_declare_coherent_memory(&pdev->dev,
|
||||
mx2_camera_base + MX2_CAMERA_BUF_SIZE,
|
||||
mx2_camera_base + MX2_CAMERA_BUF_SIZE,
|
||||
MX2_CAMERA_BUF_SIZE);
|
||||
}
|
||||
|
||||
/* DMA deinterlace */
|
||||
static struct platform_device visstrim_deinterlace = {
|
||||
.name = "m2m-deinterlace",
|
||||
.id = 0,
|
||||
};
|
||||
|
||||
static void __init visstrim_deinterlace_init(void)
|
||||
{
|
||||
int ret = -ENOMEM;
|
||||
struct platform_device *pdev = &visstrim_deinterlace;
|
||||
|
||||
ret = platform_device_register(pdev);
|
||||
|
||||
dma_declare_coherent_memory(&pdev->dev,
|
||||
mx2_camera_base + 2 * MX2_CAMERA_BUF_SIZE,
|
||||
mx2_camera_base + 2 * MX2_CAMERA_BUF_SIZE,
|
||||
MX2_CAMERA_BUF_SIZE);
|
||||
}
|
||||
|
||||
/* Emma-PrP for format conversion */
|
||||
static void __init visstrim_emmaprp_init(void)
|
||||
{
|
||||
struct platform_device *pdev;
|
||||
int ret;
|
||||
|
||||
pdev = imx27_add_mx2_emmaprp();
|
||||
if (IS_ERR(pdev))
|
||||
return;
|
||||
|
||||
/*
|
||||
* Use the same memory area as the analog camera since both
|
||||
* devices are, by nature, exclusive.
|
||||
*/
|
||||
ret = dma_declare_coherent_memory(&pdev->dev,
|
||||
mx2_camera_base, mx2_camera_base,
|
||||
MX2_CAMERA_BUF_SIZE);
|
||||
if (ret)
|
||||
pr_err("Failed to declare memory for emmaprp\n");
|
||||
}
|
||||
|
||||
/* Audio */
|
||||
static const struct snd_mx27vis_platform_data snd_mx27vis_pdata __initconst = {
|
||||
.amp_gain0_gpio = AMP_GAIN_0,
|
||||
.amp_gain1_gpio = AMP_GAIN_1,
|
||||
.amp_mutel_gpio = AMP_MUTE_SDL,
|
||||
.amp_muter_gpio = AMP_MUTE_SDR,
|
||||
};
|
||||
|
||||
static void __init visstrim_m10_revision(void)
|
||||
{
|
||||
int exp_version = 0;
|
||||
int mo_version = 0;
|
||||
int ret;
|
||||
|
||||
ret = gpio_request_array(visstrim_m10_version_gpios,
|
||||
ARRAY_SIZE(visstrim_m10_version_gpios));
|
||||
if (ret) {
|
||||
pr_err("Failed to request version gpios");
|
||||
return;
|
||||
}
|
||||
|
||||
/* Get expansion board version (negative logic) */
|
||||
exp_version |= !gpio_get_value(EXPBOARD_BIT2) << 2;
|
||||
exp_version |= !gpio_get_value(EXPBOARD_BIT1) << 1;
|
||||
exp_version |= !gpio_get_value(EXPBOARD_BIT0);
|
||||
|
||||
/* Get mother board version (negative logic) */
|
||||
mo_version |= !gpio_get_value(MOTHERBOARD_BIT2) << 2;
|
||||
mo_version |= !gpio_get_value(MOTHERBOARD_BIT1) << 1;
|
||||
mo_version |= !gpio_get_value(MOTHERBOARD_BIT0);
|
||||
|
||||
system_rev = 0x27000;
|
||||
system_rev |= (mo_version << MOTHERBOARD_SHIFT);
|
||||
system_rev |= (exp_version << EXPBOARD_SHIFT);
|
||||
}
|
||||
|
||||
static void __init visstrim_m10_board_init(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
imx27_soc_init();
|
||||
visstrim_m10_revision();
|
||||
|
||||
ret = mxc_gpio_setup_multiple_pins(visstrim_m10_pins,
|
||||
ARRAY_SIZE(visstrim_m10_pins), "VISSTRIM_M10");
|
||||
if (ret)
|
||||
pr_err("Failed to setup pins (%d)\n", ret);
|
||||
|
||||
imx27_add_imx_ssi(0, &visstrim_m10_ssi_pdata);
|
||||
imx27_add_imx_uart0(&uart_pdata);
|
||||
|
||||
imx27_add_imx_i2c(0, &visstrim_m10_i2c_data);
|
||||
imx27_add_imx_i2c(1, &visstrim_m10_i2c_data);
|
||||
i2c_register_board_info(0, visstrim_m10_i2c_devices,
|
||||
ARRAY_SIZE(visstrim_m10_i2c_devices));
|
||||
|
||||
imx27_add_mxc_mmc(0, &visstrim_m10_sdhc_pdata);
|
||||
imx27_add_mxc_ehci_otg(&visstrim_m10_usbotg_pdata);
|
||||
imx27_add_fec(NULL);
|
||||
|
||||
platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
|
||||
}
|
||||
|
||||
static void __init visstrim_m10_late_init(void)
|
||||
{
|
||||
int mo_version, ret;
|
||||
|
||||
ret = gpio_request_array(visstrim_m10_gpios,
|
||||
ARRAY_SIZE(visstrim_m10_gpios));
|
||||
if (ret)
|
||||
pr_err("Failed to request gpios (%d)\n", ret);
|
||||
|
||||
imx_add_gpio_keys(&visstrim_gpio_keys_platform_data);
|
||||
|
||||
imx_add_platform_device("mx27vis", 0, NULL, 0, &snd_mx27vis_pdata,
|
||||
sizeof(snd_mx27vis_pdata));
|
||||
|
||||
gpio_led_register_device(0, &visstrim_m10_led_data);
|
||||
|
||||
/* Use mother board version to decide what video devices we shall use */
|
||||
mo_version = (system_rev >> MOTHERBOARD_SHIFT) & VERSION_MASK;
|
||||
if (mo_version & 0x1) {
|
||||
visstrim_emmaprp_init();
|
||||
|
||||
/*
|
||||
* Despite not being used, tvp5150 must be
|
||||
* powered on to avoid I2C problems. To minimize
|
||||
* power consupmtion keep reset enabled.
|
||||
*/
|
||||
gpio_set_value(TVP5150_PWDN, 1);
|
||||
ndelay(1);
|
||||
gpio_set_value(TVP5150_RSTN, 0);
|
||||
} else {
|
||||
visstrim_deinterlace_init();
|
||||
visstrim_analog_camera_init();
|
||||
}
|
||||
|
||||
visstrim_coda_init();
|
||||
}
|
||||
|
||||
static void __init visstrim_m10_timer_init(void)
|
||||
{
|
||||
mx27_clocks_init((unsigned long)25000000);
|
||||
}
|
||||
|
||||
MACHINE_START(IMX27_VISSTRIM_M10, "Vista Silicon Visstrim_M10")
|
||||
.atag_offset = 0x100,
|
||||
.reserve = visstrim_reserve,
|
||||
.map_io = mx27_map_io,
|
||||
.init_early = imx27_init_early,
|
||||
.init_irq = mx27_init_irq,
|
||||
.init_time = visstrim_m10_timer_init,
|
||||
.init_machine = visstrim_m10_board_init,
|
||||
.init_late = visstrim_m10_late_init,
|
||||
.restart = mxc_restart,
|
||||
MACHINE_END
|
||||
@ -1,470 +0,0 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved.
|
||||
*
|
||||
* Author: Fabio Estevam <fabio.estevam@freescale.com>
|
||||
*/
|
||||
|
||||
/*
|
||||
* This machine is known as:
|
||||
* - i.MX27 3-Stack Development System
|
||||
* - i.MX27 Platform Development Kit (i.MX27 PDK)
|
||||
*/
|
||||
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/gpio/machine.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/usb/otg.h>
|
||||
#include <linux/usb/ulpi.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/mfd/mc13783.h>
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/regulator/machine.h>
|
||||
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/time.h>
|
||||
|
||||
#include "3ds_debugboard.h"
|
||||
#include "common.h"
|
||||
#include "devices-imx27.h"
|
||||
#include "ehci.h"
|
||||
#include "hardware.h"
|
||||
#include "iomux-mx27.h"
|
||||
#include "ulpi.h"
|
||||
|
||||
#define SD1_EN_GPIO IMX_GPIO_NR(2, 25)
|
||||
#define OTG_PHY_RESET_GPIO IMX_GPIO_NR(2, 23)
|
||||
#define SPI2_SS0 IMX_GPIO_NR(4, 21)
|
||||
#define PMIC_INT IMX_GPIO_NR(3, 14)
|
||||
#define SPI1_SS0 IMX_GPIO_NR(4, 28)
|
||||
#define SD1_CD IMX_GPIO_NR(2, 26)
|
||||
#define LCD_RESET IMX_GPIO_NR(1, 3)
|
||||
#define LCD_ENABLE IMX_GPIO_NR(1, 31)
|
||||
|
||||
static const int mx27pdk_pins[] __initconst = {
|
||||
/* UART1 */
|
||||
PE12_PF_UART1_TXD,
|
||||
PE13_PF_UART1_RXD,
|
||||
PE14_PF_UART1_CTS,
|
||||
PE15_PF_UART1_RTS,
|
||||
/* FEC */
|
||||
PD0_AIN_FEC_TXD0,
|
||||
PD1_AIN_FEC_TXD1,
|
||||
PD2_AIN_FEC_TXD2,
|
||||
PD3_AIN_FEC_TXD3,
|
||||
PD4_AOUT_FEC_RX_ER,
|
||||
PD5_AOUT_FEC_RXD1,
|
||||
PD6_AOUT_FEC_RXD2,
|
||||
PD7_AOUT_FEC_RXD3,
|
||||
PD8_AF_FEC_MDIO,
|
||||
PD9_AIN_FEC_MDC,
|
||||
PD10_AOUT_FEC_CRS,
|
||||
PD11_AOUT_FEC_TX_CLK,
|
||||
PD12_AOUT_FEC_RXD0,
|
||||
PD13_AOUT_FEC_RX_DV,
|
||||
PD14_AOUT_FEC_RX_CLK,
|
||||
PD15_AOUT_FEC_COL,
|
||||
PD16_AIN_FEC_TX_ER,
|
||||
PF23_AIN_FEC_TX_EN,
|
||||
/* SDHC1 */
|
||||
PE18_PF_SD1_D0,
|
||||
PE19_PF_SD1_D1,
|
||||
PE20_PF_SD1_D2,
|
||||
PE21_PF_SD1_D3,
|
||||
PE22_PF_SD1_CMD,
|
||||
PE23_PF_SD1_CLK,
|
||||
SD1_EN_GPIO | GPIO_GPIO | GPIO_OUT,
|
||||
/* OTG */
|
||||
OTG_PHY_RESET_GPIO | GPIO_GPIO | GPIO_OUT,
|
||||
PC7_PF_USBOTG_DATA5,
|
||||
PC8_PF_USBOTG_DATA6,
|
||||
PC9_PF_USBOTG_DATA0,
|
||||
PC10_PF_USBOTG_DATA2,
|
||||
PC11_PF_USBOTG_DATA1,
|
||||
PC12_PF_USBOTG_DATA4,
|
||||
PC13_PF_USBOTG_DATA3,
|
||||
PE0_PF_USBOTG_NXT,
|
||||
PE1_PF_USBOTG_STP,
|
||||
PE2_PF_USBOTG_DIR,
|
||||
PE24_PF_USBOTG_CLK,
|
||||
PE25_PF_USBOTG_DATA7,
|
||||
/* CSPI1 */
|
||||
PD31_PF_CSPI1_MOSI,
|
||||
PD30_PF_CSPI1_MISO,
|
||||
PD29_PF_CSPI1_SCLK,
|
||||
PD25_PF_CSPI1_RDY,
|
||||
SPI1_SS0 | GPIO_GPIO | GPIO_OUT,
|
||||
/* CSPI2 */
|
||||
PD22_PF_CSPI2_SCLK,
|
||||
PD23_PF_CSPI2_MISO,
|
||||
PD24_PF_CSPI2_MOSI,
|
||||
SPI2_SS0 | GPIO_GPIO | GPIO_OUT,
|
||||
/* I2C1 */
|
||||
PD17_PF_I2C_DATA,
|
||||
PD18_PF_I2C_CLK,
|
||||
/* PMIC INT */
|
||||
PMIC_INT | GPIO_GPIO | GPIO_IN,
|
||||
/* LCD */
|
||||
PA5_PF_LSCLK,
|
||||
PA6_PF_LD0,
|
||||
PA7_PF_LD1,
|
||||
PA8_PF_LD2,
|
||||
PA9_PF_LD3,
|
||||
PA10_PF_LD4,
|
||||
PA11_PF_LD5,
|
||||
PA12_PF_LD6,
|
||||
PA13_PF_LD7,
|
||||
PA14_PF_LD8,
|
||||
PA15_PF_LD9,
|
||||
PA16_PF_LD10,
|
||||
PA17_PF_LD11,
|
||||
PA18_PF_LD12,
|
||||
PA19_PF_LD13,
|
||||
PA20_PF_LD14,
|
||||
PA21_PF_LD15,
|
||||
PA22_PF_LD16,
|
||||
PA23_PF_LD17,
|
||||
PA28_PF_HSYNC,
|
||||
PA29_PF_VSYNC,
|
||||
PA30_PF_CONTRAST,
|
||||
LCD_ENABLE | GPIO_GPIO | GPIO_OUT,
|
||||
LCD_RESET | GPIO_GPIO | GPIO_OUT,
|
||||
/* SSI4 */
|
||||
PC16_PF_SSI4_FS,
|
||||
PC17_PF_SSI4_RXD,
|
||||
PC18_PF_SSI4_TXD,
|
||||
PC19_PF_SSI4_CLK,
|
||||
};
|
||||
|
||||
static const struct imxuart_platform_data uart_pdata __initconst = {
|
||||
.flags = IMXUART_HAVE_RTSCTS,
|
||||
};
|
||||
|
||||
/*
|
||||
* Matrix keyboard
|
||||
*/
|
||||
|
||||
static const uint32_t mx27_3ds_keymap[] = {
|
||||
KEY(0, 0, KEY_UP),
|
||||
KEY(0, 1, KEY_DOWN),
|
||||
KEY(1, 0, KEY_RIGHT),
|
||||
KEY(1, 1, KEY_LEFT),
|
||||
KEY(1, 2, KEY_ENTER),
|
||||
KEY(2, 0, KEY_F6),
|
||||
KEY(2, 1, KEY_F8),
|
||||
KEY(2, 2, KEY_F9),
|
||||
KEY(2, 3, KEY_F10),
|
||||
};
|
||||
|
||||
static const struct matrix_keymap_data mx27_3ds_keymap_data __initconst = {
|
||||
.keymap = mx27_3ds_keymap,
|
||||
.keymap_size = ARRAY_SIZE(mx27_3ds_keymap),
|
||||
};
|
||||
|
||||
static int mx27_3ds_sdhc1_init(struct device *dev, irq_handler_t detect_irq,
|
||||
void *data)
|
||||
{
|
||||
return request_irq(gpio_to_irq(SD1_CD), detect_irq,
|
||||
IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, "sdhc1-card-detect", data);
|
||||
}
|
||||
|
||||
static void mx27_3ds_sdhc1_exit(struct device *dev, void *data)
|
||||
{
|
||||
free_irq(gpio_to_irq(SD1_CD), data);
|
||||
}
|
||||
|
||||
static const struct imxmmc_platform_data sdhc1_pdata __initconst = {
|
||||
.init = mx27_3ds_sdhc1_init,
|
||||
.exit = mx27_3ds_sdhc1_exit,
|
||||
};
|
||||
|
||||
static void mx27_3ds_sdhc1_enable_level_translator(void)
|
||||
{
|
||||
/* Turn on TXB0108 OE pin */
|
||||
gpio_request(SD1_EN_GPIO, "sd1_enable");
|
||||
gpio_direction_output(SD1_EN_GPIO, 1);
|
||||
}
|
||||
|
||||
|
||||
static int otg_phy_init(void)
|
||||
{
|
||||
gpio_request(OTG_PHY_RESET_GPIO, "usb-otg-reset");
|
||||
gpio_direction_output(OTG_PHY_RESET_GPIO, 0);
|
||||
mdelay(1);
|
||||
gpio_set_value(OTG_PHY_RESET_GPIO, 1);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int mx27_3ds_otg_init(struct platform_device *pdev)
|
||||
{
|
||||
return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
|
||||
}
|
||||
|
||||
static struct mxc_usbh_platform_data otg_pdata __initdata = {
|
||||
.init = mx27_3ds_otg_init,
|
||||
.portsc = MXC_EHCI_MODE_ULPI,
|
||||
};
|
||||
|
||||
static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
|
||||
.operating_mode = FSL_USB2_DR_DEVICE,
|
||||
.phy_mode = FSL_USB2_PHY_ULPI,
|
||||
};
|
||||
|
||||
static bool otg_mode_host __initdata;
|
||||
|
||||
static int __init mx27_3ds_otg_mode(char *options)
|
||||
{
|
||||
if (!strcmp(options, "host"))
|
||||
otg_mode_host = true;
|
||||
else if (!strcmp(options, "device"))
|
||||
otg_mode_host = false;
|
||||
else
|
||||
pr_info("otg_mode neither \"host\" nor \"device\". "
|
||||
"Defaulting to device\n");
|
||||
return 1;
|
||||
}
|
||||
__setup("otg_mode=", mx27_3ds_otg_mode);
|
||||
|
||||
/* Regulators */
|
||||
static struct regulator_init_data gpo_init = {
|
||||
.constraints = {
|
||||
.boot_on = 1,
|
||||
.always_on = 1,
|
||||
}
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply vmmc1_consumers[] = {
|
||||
REGULATOR_SUPPLY("vcore", "spi0.0"),
|
||||
};
|
||||
|
||||
static struct regulator_init_data vmmc1_init = {
|
||||
.constraints = {
|
||||
.min_uV = 2800000,
|
||||
.max_uV = 2800000,
|
||||
.apply_uV = 1,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
|
||||
REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(vmmc1_consumers),
|
||||
.consumer_supplies = vmmc1_consumers,
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply vgen_consumers[] = {
|
||||
REGULATOR_SUPPLY("vdd", "spi0.0"),
|
||||
};
|
||||
|
||||
static struct regulator_init_data vgen_init = {
|
||||
.constraints = {
|
||||
.min_uV = 1800000,
|
||||
.max_uV = 1800000,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(vgen_consumers),
|
||||
.consumer_supplies = vgen_consumers,
|
||||
};
|
||||
|
||||
static struct mc13xxx_regulator_init_data mx27_3ds_regulators[] = {
|
||||
{
|
||||
.id = MC13783_REG_VMMC1,
|
||||
.init_data = &vmmc1_init,
|
||||
}, {
|
||||
.id = MC13783_REG_VGEN,
|
||||
.init_data = &vgen_init,
|
||||
}, {
|
||||
.id = MC13783_REG_GPO1, /* Turn on 1.8V */
|
||||
.init_data = &gpo_init,
|
||||
}, {
|
||||
.id = MC13783_REG_GPO3, /* Turn on 3.3V */
|
||||
.init_data = &gpo_init,
|
||||
},
|
||||
};
|
||||
|
||||
/* MC13783 */
|
||||
static struct mc13xxx_codec_platform_data mx27_3ds_codec = {
|
||||
.dac_ssi_port = MC13783_SSI1_PORT,
|
||||
.adc_ssi_port = MC13783_SSI1_PORT,
|
||||
};
|
||||
|
||||
static struct mc13xxx_platform_data mc13783_pdata = {
|
||||
.regulators = {
|
||||
.regulators = mx27_3ds_regulators,
|
||||
.num_regulators = ARRAY_SIZE(mx27_3ds_regulators),
|
||||
|
||||
},
|
||||
.flags = MC13XXX_USE_TOUCHSCREEN | MC13XXX_USE_RTC |
|
||||
MC13XXX_USE_CODEC,
|
||||
.codec = &mx27_3ds_codec,
|
||||
};
|
||||
|
||||
static struct imx_ssi_platform_data mx27_3ds_ssi_pdata = {
|
||||
.flags = IMX_SSI_DMA | IMX_SSI_NET,
|
||||
};
|
||||
|
||||
/* SPI */
|
||||
static struct gpiod_lookup_table mx27_spi1_gpiod_table = {
|
||||
.dev_id = "imx27-cspi.0", /* Actual device name for spi1 */
|
||||
.table = {
|
||||
/*
|
||||
* The i.MX27 has the i.MX21 GPIO controller, the SPI1 CS GPIO
|
||||
* SPI1_SS0 is numbered IMX_GPIO_NR(4, 28).
|
||||
*
|
||||
* This is in "bank 4" which is subtracted by one in the macro
|
||||
* so this is actually bank 3 on "imx21-gpio.3".
|
||||
*/
|
||||
GPIO_LOOKUP_IDX("imx21-gpio.3", 28, "cs", 0, GPIO_ACTIVE_LOW),
|
||||
{ },
|
||||
},
|
||||
};
|
||||
|
||||
static struct gpiod_lookup_table mx27_spi2_gpiod_table = {
|
||||
.dev_id = "imx27-cspi.1", /* Actual device name for spi2 */
|
||||
.table = {
|
||||
/*
|
||||
* The i.MX27 has the i.MX21 GPIO controller, the SPI2 CS GPIO
|
||||
* SPI2_SS0 is numbered IMX_GPIO_NR(4, 21).
|
||||
*
|
||||
* This is in "bank 4" which is subtracted by one in the macro
|
||||
* so this is actually bank 3 on "imx21-gpio.3".
|
||||
*/
|
||||
GPIO_LOOKUP_IDX("imx21-gpio.3", 21, "cs", 0, GPIO_ACTIVE_LOW),
|
||||
{ },
|
||||
},
|
||||
};
|
||||
|
||||
static struct imx_fb_videomode mx27_3ds_modes[] = {
|
||||
{ /* 480x640 @ 60 Hz */
|
||||
.mode = {
|
||||
.name = "Epson-VGA",
|
||||
.refresh = 60,
|
||||
.xres = 480,
|
||||
.yres = 640,
|
||||
.pixclock = 41701,
|
||||
.left_margin = 20,
|
||||
.right_margin = 41,
|
||||
.upper_margin = 10,
|
||||
.lower_margin = 5,
|
||||
.hsync_len = 20,
|
||||
.vsync_len = 10,
|
||||
.sync = FB_SYNC_OE_ACT_HIGH |
|
||||
FB_SYNC_CLK_INVERT,
|
||||
.vmode = FB_VMODE_NONINTERLACED,
|
||||
.flag = 0,
|
||||
},
|
||||
.bpp = 16,
|
||||
.pcr = 0xFAC08B82,
|
||||
},
|
||||
};
|
||||
|
||||
static const struct imx_fb_platform_data mx27_3ds_fb_data __initconst = {
|
||||
.mode = mx27_3ds_modes,
|
||||
.num_modes = ARRAY_SIZE(mx27_3ds_modes),
|
||||
.pwmr = 0x00A903FF,
|
||||
.lscr1 = 0x00120300,
|
||||
.dmacr = 0x00020010,
|
||||
};
|
||||
|
||||
/* LCD */
|
||||
static struct gpiod_lookup_table mx27_3ds_lcd_gpiod_table = {
|
||||
.dev_id = "spi0.0", /* Bus 0 chipselect 0 */
|
||||
.table = {
|
||||
/*
|
||||
* The i.MX27 has the i.MX21 GPIO controller, the GPIOs
|
||||
* numbered IMX_GPIO_NR(1, 3) and IMX_GPIO_NR(1, 31)
|
||||
* are in "bank 1" which is subtracted by one in the macro
|
||||
* so these are actually bank 0 on "imx21-gpio.0".
|
||||
*/
|
||||
GPIO_LOOKUP("imx21-gpio.0", 3, "reset", GPIO_ACTIVE_HIGH),
|
||||
GPIO_LOOKUP("imx21-gpio.0", 31, "enable", GPIO_ACTIVE_HIGH),
|
||||
{ },
|
||||
},
|
||||
};
|
||||
|
||||
static struct spi_board_info mx27_3ds_spi_devs[] __initdata = {
|
||||
{
|
||||
.modalias = "mc13783",
|
||||
.max_speed_hz = 1000000,
|
||||
.bus_num = 1,
|
||||
.chip_select = 0, /* SS0 */
|
||||
.platform_data = &mc13783_pdata,
|
||||
/* irq number is run-time assigned */
|
||||
.mode = SPI_CS_HIGH,
|
||||
}, {
|
||||
.modalias = "l4f00242t03",
|
||||
.max_speed_hz = 5000000,
|
||||
.bus_num = 0,
|
||||
.chip_select = 0, /* SS0 */
|
||||
},
|
||||
};
|
||||
|
||||
static const struct imxi2c_platform_data mx27_3ds_i2c0_data __initconst = {
|
||||
.bitrate = 100000,
|
||||
};
|
||||
|
||||
static void __init mx27pdk_init(void)
|
||||
{
|
||||
imx27_soc_init();
|
||||
|
||||
mxc_gpio_setup_multiple_pins(mx27pdk_pins, ARRAY_SIZE(mx27pdk_pins),
|
||||
"mx27pdk");
|
||||
imx27_add_imx_uart0(&uart_pdata);
|
||||
imx27_add_fec(NULL);
|
||||
imx27_add_imx_keypad(&mx27_3ds_keymap_data);
|
||||
imx27_add_imx2_wdt();
|
||||
|
||||
imx27_add_spi_imx1(&mx27_spi2_gpiod_table);
|
||||
imx27_add_spi_imx0(&mx27_spi1_gpiod_table);
|
||||
|
||||
imx27_add_imx_i2c(0, &mx27_3ds_i2c0_data);
|
||||
imx27_add_imx_fb(&mx27_3ds_fb_data);
|
||||
|
||||
imx27_add_imx_ssi(0, &mx27_3ds_ssi_pdata);
|
||||
}
|
||||
|
||||
static void __init mx27pdk_late_init(void)
|
||||
{
|
||||
mx27_3ds_sdhc1_enable_level_translator();
|
||||
imx27_add_mxc_mmc(0, &sdhc1_pdata);
|
||||
|
||||
otg_phy_init();
|
||||
|
||||
if (otg_mode_host) {
|
||||
otg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
|
||||
ULPI_OTG_DRVVBUS_EXT);
|
||||
|
||||
if (otg_pdata.otg)
|
||||
imx27_add_mxc_ehci_otg(&otg_pdata);
|
||||
}
|
||||
|
||||
if (!otg_mode_host)
|
||||
imx27_add_fsl_usb2_udc(&otg_device_pdata);
|
||||
|
||||
gpiod_add_lookup_table(&mx27_3ds_lcd_gpiod_table);
|
||||
mx27_3ds_spi_devs[0].irq = gpio_to_irq(PMIC_INT);
|
||||
spi_register_board_info(mx27_3ds_spi_devs,
|
||||
ARRAY_SIZE(mx27_3ds_spi_devs));
|
||||
|
||||
if (mxc_expio_init(MX27_CS5_BASE_ADDR, IMX_GPIO_NR(3, 28)))
|
||||
pr_warn("Init of the debugboard failed, all devices on the debugboard are unusable.\n");
|
||||
|
||||
|
||||
imx_add_platform_device("imx_mc13783", 0, NULL, 0, NULL, 0);
|
||||
}
|
||||
|
||||
static void __init mx27pdk_timer_init(void)
|
||||
{
|
||||
mx27_clocks_init(26000000);
|
||||
}
|
||||
|
||||
MACHINE_START(MX27_3DS, "Freescale MX27PDK")
|
||||
/* maintainer: Freescale Semiconductor, Inc. */
|
||||
.atag_offset = 0x100,
|
||||
.map_io = mx27_map_io,
|
||||
.init_early = imx27_init_early,
|
||||
.init_irq = mx27_init_irq,
|
||||
.init_time = mx27pdk_timer_init,
|
||||
.init_machine = mx27pdk_init,
|
||||
.init_late = mx27pdk_late_init,
|
||||
.restart = mxc_restart,
|
||||
MACHINE_END
|
||||
@ -1,407 +0,0 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* Copyright (C) 2000 Deep Blue Solutions Ltd
|
||||
* Copyright (C) 2002 Shane Nay (shane@minirl.com)
|
||||
* Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
|
||||
*/
|
||||
#include <linux/gpio/driver.h>
|
||||
/* Needed for gpio_to_irq() */
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/gpio/machine.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/mtd/mtd.h>
|
||||
#include <linux/mtd/map.h>
|
||||
#include <linux/mtd/partitions.h>
|
||||
#include <linux/mtd/physmap.h>
|
||||
#include <linux/i2c.h>
|
||||
#include <linux/irq.h>
|
||||
|
||||
#include <linux/regulator/fixed.h>
|
||||
#include <linux/regulator/machine.h>
|
||||
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/time.h>
|
||||
#include <asm/mach/map.h>
|
||||
|
||||
#include "common.h"
|
||||
#include "devices-imx27.h"
|
||||
#include "hardware.h"
|
||||
#include "iomux-mx27.h"
|
||||
|
||||
/*
|
||||
* Base address of PBC controller, CS4
|
||||
*/
|
||||
#define PBC_BASE_ADDRESS 0xf4300000
|
||||
#define PBC_REG_ADDR(offset) (void __force __iomem *) \
|
||||
(PBC_BASE_ADDRESS + (offset))
|
||||
|
||||
/* When the PBC address connection is fixed in h/w, defined as 1 */
|
||||
#define PBC_ADDR_SH 0
|
||||
|
||||
/* Offsets for the PBC Controller register */
|
||||
/*
|
||||
* PBC Board version register offset
|
||||
*/
|
||||
#define PBC_VERSION_REG PBC_REG_ADDR(0x00000 >> PBC_ADDR_SH)
|
||||
/*
|
||||
* PBC Board control register 1 set address.
|
||||
*/
|
||||
#define PBC_BCTRL1_SET_REG PBC_REG_ADDR(0x00008 >> PBC_ADDR_SH)
|
||||
/*
|
||||
* PBC Board control register 1 clear address.
|
||||
*/
|
||||
#define PBC_BCTRL1_CLEAR_REG PBC_REG_ADDR(0x0000C >> PBC_ADDR_SH)
|
||||
|
||||
/* PBC Board Control Register 1 bit definitions */
|
||||
#define PBC_BCTRL1_LCDON 0x0800 /* Enable the LCD */
|
||||
|
||||
/* to determine the correct external crystal reference */
|
||||
#define CKIH_27MHZ_BIT_SET (1 << 3)
|
||||
|
||||
static const int mx27ads_pins[] __initconst = {
|
||||
/* UART0 */
|
||||
PE12_PF_UART1_TXD,
|
||||
PE13_PF_UART1_RXD,
|
||||
PE14_PF_UART1_CTS,
|
||||
PE15_PF_UART1_RTS,
|
||||
/* UART1 */
|
||||
PE3_PF_UART2_CTS,
|
||||
PE4_PF_UART2_RTS,
|
||||
PE6_PF_UART2_TXD,
|
||||
PE7_PF_UART2_RXD,
|
||||
/* UART2 */
|
||||
PE8_PF_UART3_TXD,
|
||||
PE9_PF_UART3_RXD,
|
||||
PE10_PF_UART3_CTS,
|
||||
PE11_PF_UART3_RTS,
|
||||
/* UART3 */
|
||||
PB26_AF_UART4_RTS,
|
||||
PB28_AF_UART4_TXD,
|
||||
PB29_AF_UART4_CTS,
|
||||
PB31_AF_UART4_RXD,
|
||||
/* UART4 */
|
||||
PB18_AF_UART5_TXD,
|
||||
PB19_AF_UART5_RXD,
|
||||
PB20_AF_UART5_CTS,
|
||||
PB21_AF_UART5_RTS,
|
||||
/* UART5 */
|
||||
PB10_AF_UART6_TXD,
|
||||
PB12_AF_UART6_CTS,
|
||||
PB11_AF_UART6_RXD,
|
||||
PB13_AF_UART6_RTS,
|
||||
/* FEC */
|
||||
PD0_AIN_FEC_TXD0,
|
||||
PD1_AIN_FEC_TXD1,
|
||||
PD2_AIN_FEC_TXD2,
|
||||
PD3_AIN_FEC_TXD3,
|
||||
PD4_AOUT_FEC_RX_ER,
|
||||
PD5_AOUT_FEC_RXD1,
|
||||
PD6_AOUT_FEC_RXD2,
|
||||
PD7_AOUT_FEC_RXD3,
|
||||
PD8_AF_FEC_MDIO,
|
||||
PD9_AIN_FEC_MDC,
|
||||
PD10_AOUT_FEC_CRS,
|
||||
PD11_AOUT_FEC_TX_CLK,
|
||||
PD12_AOUT_FEC_RXD0,
|
||||
PD13_AOUT_FEC_RX_DV,
|
||||
PD14_AOUT_FEC_RX_CLK,
|
||||
PD15_AOUT_FEC_COL,
|
||||
PD16_AIN_FEC_TX_ER,
|
||||
PF23_AIN_FEC_TX_EN,
|
||||
/* I2C2 */
|
||||
PC5_PF_I2C2_SDA,
|
||||
PC6_PF_I2C2_SCL,
|
||||
/* FB */
|
||||
PA5_PF_LSCLK,
|
||||
PA6_PF_LD0,
|
||||
PA7_PF_LD1,
|
||||
PA8_PF_LD2,
|
||||
PA9_PF_LD3,
|
||||
PA10_PF_LD4,
|
||||
PA11_PF_LD5,
|
||||
PA12_PF_LD6,
|
||||
PA13_PF_LD7,
|
||||
PA14_PF_LD8,
|
||||
PA15_PF_LD9,
|
||||
PA16_PF_LD10,
|
||||
PA17_PF_LD11,
|
||||
PA18_PF_LD12,
|
||||
PA19_PF_LD13,
|
||||
PA20_PF_LD14,
|
||||
PA21_PF_LD15,
|
||||
PA22_PF_LD16,
|
||||
PA23_PF_LD17,
|
||||
PA24_PF_REV,
|
||||
PA25_PF_CLS,
|
||||
PA26_PF_PS,
|
||||
PA27_PF_SPL_SPR,
|
||||
PA28_PF_HSYNC,
|
||||
PA29_PF_VSYNC,
|
||||
PA30_PF_CONTRAST,
|
||||
PA31_PF_OE_ACD,
|
||||
/* OWIRE */
|
||||
PE16_AF_OWIRE,
|
||||
/* SDHC1*/
|
||||
PE18_PF_SD1_D0,
|
||||
PE19_PF_SD1_D1,
|
||||
PE20_PF_SD1_D2,
|
||||
PE21_PF_SD1_D3,
|
||||
PE22_PF_SD1_CMD,
|
||||
PE23_PF_SD1_CLK,
|
||||
/* SDHC2*/
|
||||
PB4_PF_SD2_D0,
|
||||
PB5_PF_SD2_D1,
|
||||
PB6_PF_SD2_D2,
|
||||
PB7_PF_SD2_D3,
|
||||
PB8_PF_SD2_CMD,
|
||||
PB9_PF_SD2_CLK,
|
||||
};
|
||||
|
||||
static const struct mxc_nand_platform_data
|
||||
mx27ads_nand_board_info __initconst = {
|
||||
.width = 1,
|
||||
.hw_ecc = 1,
|
||||
};
|
||||
|
||||
/* ADS's NOR flash */
|
||||
static struct physmap_flash_data mx27ads_flash_data = {
|
||||
.width = 2,
|
||||
};
|
||||
|
||||
static struct resource mx27ads_flash_resource = {
|
||||
.start = 0xc0000000,
|
||||
.end = 0xc0000000 + 0x02000000 - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
|
||||
};
|
||||
|
||||
static struct platform_device mx27ads_nor_mtd_device = {
|
||||
.name = "physmap-flash",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.platform_data = &mx27ads_flash_data,
|
||||
},
|
||||
.num_resources = 1,
|
||||
.resource = &mx27ads_flash_resource,
|
||||
};
|
||||
|
||||
static const struct imxi2c_platform_data mx27ads_i2c1_data __initconst = {
|
||||
.bitrate = 100000,
|
||||
};
|
||||
|
||||
static struct i2c_board_info mx27ads_i2c_devices[] = {
|
||||
};
|
||||
|
||||
static void vgpio_set(struct gpio_chip *chip, unsigned offset, int value)
|
||||
{
|
||||
if (value)
|
||||
imx_writew(PBC_BCTRL1_LCDON, PBC_BCTRL1_SET_REG);
|
||||
else
|
||||
imx_writew(PBC_BCTRL1_LCDON, PBC_BCTRL1_CLEAR_REG);
|
||||
}
|
||||
|
||||
static int vgpio_dir_out(struct gpio_chip *chip, unsigned offset, int value)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
#define MX27ADS_LCD_GPIO (6 * 32)
|
||||
|
||||
static struct regulator_consumer_supply mx27ads_lcd_regulator_consumer =
|
||||
REGULATOR_SUPPLY("lcd", "imx-fb.0");
|
||||
|
||||
static struct regulator_init_data mx27ads_lcd_regulator_init_data = {
|
||||
.constraints = {
|
||||
.valid_ops_mask = REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.consumer_supplies = &mx27ads_lcd_regulator_consumer,
|
||||
.num_consumer_supplies = 1,
|
||||
};
|
||||
|
||||
static struct fixed_voltage_config mx27ads_lcd_regulator_pdata = {
|
||||
.supply_name = "LCD",
|
||||
.microvolts = 3300000,
|
||||
.init_data = &mx27ads_lcd_regulator_init_data,
|
||||
};
|
||||
|
||||
static struct gpiod_lookup_table mx27ads_lcd_regulator_gpiod_table = {
|
||||
.dev_id = "reg-fixed-voltage.0", /* Let's hope ID 0 is what we get */
|
||||
.table = {
|
||||
GPIO_LOOKUP("LCD", 0, NULL, GPIO_ACTIVE_LOW),
|
||||
{ },
|
||||
},
|
||||
};
|
||||
|
||||
static void __init mx27ads_regulator_init(void)
|
||||
{
|
||||
struct gpio_chip *vchip;
|
||||
|
||||
vchip = kzalloc(sizeof(*vchip), GFP_KERNEL);
|
||||
vchip->owner = THIS_MODULE;
|
||||
vchip->label = "LCD";
|
||||
vchip->base = MX27ADS_LCD_GPIO;
|
||||
vchip->ngpio = 1;
|
||||
vchip->direction_output = vgpio_dir_out;
|
||||
vchip->set = vgpio_set;
|
||||
gpiochip_add_data(vchip, NULL);
|
||||
|
||||
gpiod_add_lookup_table(&mx27ads_lcd_regulator_gpiod_table);
|
||||
|
||||
platform_device_register_data(NULL, "reg-fixed-voltage",
|
||||
PLATFORM_DEVID_AUTO,
|
||||
&mx27ads_lcd_regulator_pdata,
|
||||
sizeof(mx27ads_lcd_regulator_pdata));
|
||||
}
|
||||
|
||||
static struct imx_fb_videomode mx27ads_modes[] = {
|
||||
{
|
||||
.mode = {
|
||||
.name = "Sharp-LQ035Q7",
|
||||
.refresh = 60,
|
||||
.xres = 240,
|
||||
.yres = 320,
|
||||
.pixclock = 188679, /* in ps (5.3MHz) */
|
||||
.hsync_len = 1,
|
||||
.left_margin = 9,
|
||||
.right_margin = 16,
|
||||
.vsync_len = 1,
|
||||
.upper_margin = 7,
|
||||
.lower_margin = 9,
|
||||
},
|
||||
.bpp = 16,
|
||||
.pcr = 0xFB008BC0,
|
||||
},
|
||||
};
|
||||
|
||||
static const struct imx_fb_platform_data mx27ads_fb_data __initconst = {
|
||||
.mode = mx27ads_modes,
|
||||
.num_modes = ARRAY_SIZE(mx27ads_modes),
|
||||
|
||||
/*
|
||||
* - HSYNC active high
|
||||
* - VSYNC active high
|
||||
* - clk notenabled while idle
|
||||
* - clock inverted
|
||||
* - data not inverted
|
||||
* - data enable low active
|
||||
* - enable sharp mode
|
||||
*/
|
||||
.pwmr = 0x00A903FF,
|
||||
.lscr1 = 0x00120300,
|
||||
.dmacr = 0x00020010,
|
||||
};
|
||||
|
||||
static int mx27ads_sdhc1_init(struct device *dev, irq_handler_t detect_irq,
|
||||
void *data)
|
||||
{
|
||||
return request_irq(gpio_to_irq(IMX_GPIO_NR(5, 21)), detect_irq,
|
||||
IRQF_TRIGGER_RISING, "sdhc1-card-detect", data);
|
||||
}
|
||||
|
||||
static int mx27ads_sdhc2_init(struct device *dev, irq_handler_t detect_irq,
|
||||
void *data)
|
||||
{
|
||||
return request_irq(gpio_to_irq(IMX_GPIO_NR(2, 7)), detect_irq,
|
||||
IRQF_TRIGGER_RISING, "sdhc2-card-detect", data);
|
||||
}
|
||||
|
||||
static void mx27ads_sdhc1_exit(struct device *dev, void *data)
|
||||
{
|
||||
free_irq(gpio_to_irq(IMX_GPIO_NR(5, 21)), data);
|
||||
}
|
||||
|
||||
static void mx27ads_sdhc2_exit(struct device *dev, void *data)
|
||||
{
|
||||
free_irq(gpio_to_irq(IMX_GPIO_NR(2, 7)), data);
|
||||
}
|
||||
|
||||
static const struct imxmmc_platform_data sdhc1_pdata __initconst = {
|
||||
.init = mx27ads_sdhc1_init,
|
||||
.exit = mx27ads_sdhc1_exit,
|
||||
};
|
||||
|
||||
static const struct imxmmc_platform_data sdhc2_pdata __initconst = {
|
||||
.init = mx27ads_sdhc2_init,
|
||||
.exit = mx27ads_sdhc2_exit,
|
||||
};
|
||||
|
||||
static struct platform_device *platform_devices[] __initdata = {
|
||||
&mx27ads_nor_mtd_device,
|
||||
};
|
||||
|
||||
static const struct imxuart_platform_data uart_pdata __initconst = {
|
||||
.flags = IMXUART_HAVE_RTSCTS,
|
||||
};
|
||||
|
||||
static void __init mx27ads_board_init(void)
|
||||
{
|
||||
imx27_soc_init();
|
||||
|
||||
mxc_gpio_setup_multiple_pins(mx27ads_pins, ARRAY_SIZE(mx27ads_pins),
|
||||
"mx27ads");
|
||||
|
||||
imx27_add_imx_uart0(&uart_pdata);
|
||||
imx27_add_imx_uart1(&uart_pdata);
|
||||
imx27_add_imx_uart2(&uart_pdata);
|
||||
imx27_add_imx_uart3(&uart_pdata);
|
||||
imx27_add_imx_uart4(&uart_pdata);
|
||||
imx27_add_imx_uart5(&uart_pdata);
|
||||
imx27_add_mxc_nand(&mx27ads_nand_board_info);
|
||||
|
||||
/* only the i2c master 1 is used on this CPU card */
|
||||
i2c_register_board_info(1, mx27ads_i2c_devices,
|
||||
ARRAY_SIZE(mx27ads_i2c_devices));
|
||||
imx27_add_imx_i2c(1, &mx27ads_i2c1_data);
|
||||
imx27_add_imx_fb(&mx27ads_fb_data);
|
||||
|
||||
imx27_add_fec(NULL);
|
||||
imx27_add_mxc_w1();
|
||||
}
|
||||
|
||||
static void __init mx27ads_late_init(void)
|
||||
{
|
||||
mx27ads_regulator_init();
|
||||
|
||||
imx27_add_mxc_mmc(0, &sdhc1_pdata);
|
||||
imx27_add_mxc_mmc(1, &sdhc2_pdata);
|
||||
|
||||
platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
|
||||
}
|
||||
|
||||
static void __init mx27ads_timer_init(void)
|
||||
{
|
||||
unsigned long fref = 26000000;
|
||||
|
||||
if ((imx_readw(PBC_VERSION_REG) & CKIH_27MHZ_BIT_SET) == 0)
|
||||
fref = 27000000;
|
||||
|
||||
mx27_clocks_init(fref);
|
||||
}
|
||||
|
||||
static struct map_desc mx27ads_io_desc[] __initdata = {
|
||||
{
|
||||
.virtual = PBC_BASE_ADDRESS,
|
||||
.pfn = __phys_to_pfn(MX27_CS4_BASE_ADDR),
|
||||
.length = SZ_1M,
|
||||
.type = MT_DEVICE,
|
||||
},
|
||||
};
|
||||
|
||||
static void __init mx27ads_map_io(void)
|
||||
{
|
||||
mx27_map_io();
|
||||
iotable_init(mx27ads_io_desc, ARRAY_SIZE(mx27ads_io_desc));
|
||||
}
|
||||
|
||||
MACHINE_START(MX27ADS, "Freescale i.MX27ADS")
|
||||
/* maintainer: Freescale Semiconductor, Inc. */
|
||||
.atag_offset = 0x100,
|
||||
.map_io = mx27ads_map_io,
|
||||
.init_early = imx27_init_early,
|
||||
.init_irq = mx27_init_irq,
|
||||
.init_time = mx27ads_timer_init,
|
||||
.init_machine = mx27ads_board_init,
|
||||
.init_late = mx27ads_late_init,
|
||||
.restart = mxc_restart,
|
||||
MACHINE_END
|
||||
@ -1,426 +0,0 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
|
||||
* Copyright (C) 2009 Sascha Hauer (kernel@pengutronix.de)
|
||||
*/
|
||||
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/i2c.h>
|
||||
#include <linux/property.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/spi/eeprom.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/gpio/machine.h>
|
||||
#include <linux/usb/otg.h>
|
||||
#include <linux/usb/ulpi.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/time.h>
|
||||
|
||||
#include "common.h"
|
||||
#include "devices-imx27.h"
|
||||
#include "ehci.h"
|
||||
#include "hardware.h"
|
||||
#include "iomux-mx27.h"
|
||||
#include "ulpi.h"
|
||||
|
||||
#define OTG_PHY_CS_GPIO (GPIO_PORTB + 23)
|
||||
#define USBH2_PHY_CS_GPIO (GPIO_PORTB + 24)
|
||||
#define SPI1_SS0 (GPIO_PORTD + 28)
|
||||
#define SPI1_SS1 (GPIO_PORTD + 27)
|
||||
#define SD2_CD (GPIO_PORTC + 29)
|
||||
|
||||
static const int pca100_pins[] __initconst = {
|
||||
/* UART1 */
|
||||
PE12_PF_UART1_TXD,
|
||||
PE13_PF_UART1_RXD,
|
||||
PE14_PF_UART1_CTS,
|
||||
PE15_PF_UART1_RTS,
|
||||
/* SDHC */
|
||||
PB4_PF_SD2_D0,
|
||||
PB5_PF_SD2_D1,
|
||||
PB6_PF_SD2_D2,
|
||||
PB7_PF_SD2_D3,
|
||||
PB8_PF_SD2_CMD,
|
||||
PB9_PF_SD2_CLK,
|
||||
SD2_CD | GPIO_GPIO | GPIO_IN,
|
||||
/* FEC */
|
||||
PD0_AIN_FEC_TXD0,
|
||||
PD1_AIN_FEC_TXD1,
|
||||
PD2_AIN_FEC_TXD2,
|
||||
PD3_AIN_FEC_TXD3,
|
||||
PD4_AOUT_FEC_RX_ER,
|
||||
PD5_AOUT_FEC_RXD1,
|
||||
PD6_AOUT_FEC_RXD2,
|
||||
PD7_AOUT_FEC_RXD3,
|
||||
PD8_AF_FEC_MDIO,
|
||||
PD9_AIN_FEC_MDC,
|
||||
PD10_AOUT_FEC_CRS,
|
||||
PD11_AOUT_FEC_TX_CLK,
|
||||
PD12_AOUT_FEC_RXD0,
|
||||
PD13_AOUT_FEC_RX_DV,
|
||||
PD14_AOUT_FEC_RX_CLK,
|
||||
PD15_AOUT_FEC_COL,
|
||||
PD16_AIN_FEC_TX_ER,
|
||||
PF23_AIN_FEC_TX_EN,
|
||||
/* SSI1 */
|
||||
PC20_PF_SSI1_FS,
|
||||
PC21_PF_SSI1_RXD,
|
||||
PC22_PF_SSI1_TXD,
|
||||
PC23_PF_SSI1_CLK,
|
||||
/* onboard I2C */
|
||||
PC5_PF_I2C2_SDA,
|
||||
PC6_PF_I2C2_SCL,
|
||||
/* external I2C */
|
||||
PD17_PF_I2C_DATA,
|
||||
PD18_PF_I2C_CLK,
|
||||
/* SPI1 */
|
||||
PD25_PF_CSPI1_RDY,
|
||||
PD29_PF_CSPI1_SCLK,
|
||||
PD30_PF_CSPI1_MISO,
|
||||
PD31_PF_CSPI1_MOSI,
|
||||
/* OTG */
|
||||
OTG_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT,
|
||||
PC7_PF_USBOTG_DATA5,
|
||||
PC8_PF_USBOTG_DATA6,
|
||||
PC9_PF_USBOTG_DATA0,
|
||||
PC10_PF_USBOTG_DATA2,
|
||||
PC11_PF_USBOTG_DATA1,
|
||||
PC12_PF_USBOTG_DATA4,
|
||||
PC13_PF_USBOTG_DATA3,
|
||||
PE0_PF_USBOTG_NXT,
|
||||
PE1_PF_USBOTG_STP,
|
||||
PE2_PF_USBOTG_DIR,
|
||||
PE24_PF_USBOTG_CLK,
|
||||
PE25_PF_USBOTG_DATA7,
|
||||
/* USBH2 */
|
||||
USBH2_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT,
|
||||
PA0_PF_USBH2_CLK,
|
||||
PA1_PF_USBH2_DIR,
|
||||
PA2_PF_USBH2_DATA7,
|
||||
PA3_PF_USBH2_NXT,
|
||||
PA4_PF_USBH2_STP,
|
||||
PD19_AF_USBH2_DATA4,
|
||||
PD20_AF_USBH2_DATA3,
|
||||
PD21_AF_USBH2_DATA6,
|
||||
PD22_AF_USBH2_DATA0,
|
||||
PD23_AF_USBH2_DATA2,
|
||||
PD24_AF_USBH2_DATA1,
|
||||
PD26_AF_USBH2_DATA5,
|
||||
/* display */
|
||||
PA5_PF_LSCLK,
|
||||
PA6_PF_LD0,
|
||||
PA7_PF_LD1,
|
||||
PA8_PF_LD2,
|
||||
PA9_PF_LD3,
|
||||
PA10_PF_LD4,
|
||||
PA11_PF_LD5,
|
||||
PA12_PF_LD6,
|
||||
PA13_PF_LD7,
|
||||
PA14_PF_LD8,
|
||||
PA15_PF_LD9,
|
||||
PA16_PF_LD10,
|
||||
PA17_PF_LD11,
|
||||
PA18_PF_LD12,
|
||||
PA19_PF_LD13,
|
||||
PA20_PF_LD14,
|
||||
PA21_PF_LD15,
|
||||
PA22_PF_LD16,
|
||||
PA23_PF_LD17,
|
||||
PA26_PF_PS,
|
||||
PA28_PF_HSYNC,
|
||||
PA29_PF_VSYNC,
|
||||
PA31_PF_OE_ACD,
|
||||
/* free GPIO */
|
||||
GPIO_PORTC | 31 | GPIO_GPIO | GPIO_IN, /* GPIO0_IRQ */
|
||||
GPIO_PORTC | 25 | GPIO_GPIO | GPIO_IN, /* GPIO1_IRQ */
|
||||
GPIO_PORTE | 5 | GPIO_GPIO | GPIO_IN, /* GPIO2_IRQ */
|
||||
};
|
||||
|
||||
static const struct imxuart_platform_data uart_pdata __initconst = {
|
||||
.flags = IMXUART_HAVE_RTSCTS,
|
||||
};
|
||||
|
||||
static const struct mxc_nand_platform_data
|
||||
pca100_nand_board_info __initconst = {
|
||||
.width = 1,
|
||||
.hw_ecc = 1,
|
||||
};
|
||||
|
||||
static const struct imxi2c_platform_data pca100_i2c1_data __initconst = {
|
||||
.bitrate = 100000,
|
||||
};
|
||||
|
||||
static const struct property_entry board_eeprom_properties[] = {
|
||||
PROPERTY_ENTRY_U32("pagesize", 32),
|
||||
{ }
|
||||
};
|
||||
|
||||
static struct i2c_board_info pca100_i2c_devices[] = {
|
||||
{
|
||||
I2C_BOARD_INFO("24c32", 0x52), /* E0=0, E1=1, E2=0 */
|
||||
.properties = board_eeprom_properties,
|
||||
}, {
|
||||
I2C_BOARD_INFO("pcf8563", 0x51),
|
||||
}, {
|
||||
I2C_BOARD_INFO("lm75", 0x4a),
|
||||
}
|
||||
};
|
||||
|
||||
static struct spi_eeprom at25320 = {
|
||||
.name = "at25320an",
|
||||
.byte_len = 4096,
|
||||
.page_size = 32,
|
||||
.flags = EE_ADDR2,
|
||||
};
|
||||
|
||||
static struct spi_board_info pca100_spi_board_info[] __initdata = {
|
||||
{
|
||||
.modalias = "at25",
|
||||
.max_speed_hz = 30000,
|
||||
.bus_num = 0,
|
||||
.chip_select = 1,
|
||||
.platform_data = &at25320,
|
||||
},
|
||||
};
|
||||
|
||||
static struct gpiod_lookup_table pca100_spi0_gpiod_table = {
|
||||
.dev_id = "imx27-cspi.0", /* Actual device name for spi0 */
|
||||
.table = {
|
||||
/*
|
||||
* The i.MX27 has the i.MX21 GPIO controller, port D is
|
||||
* bank 3 and thus named "imx21-gpio.3".
|
||||
* SPI1_SS0 is GPIO_PORTD + 28
|
||||
* SPI1_SS1 is GPIO_PORTD + 27
|
||||
*/
|
||||
GPIO_LOOKUP_IDX("imx21-gpio.3", 28, "cs", 0, GPIO_ACTIVE_LOW),
|
||||
GPIO_LOOKUP_IDX("imx21-gpio.3", 27, "cs", 1, GPIO_ACTIVE_LOW),
|
||||
{ },
|
||||
},
|
||||
};
|
||||
|
||||
static void pca100_ac97_warm_reset(struct snd_ac97 *ac97)
|
||||
{
|
||||
mxc_gpio_mode(GPIO_PORTC | 20 | GPIO_GPIO | GPIO_OUT);
|
||||
gpio_set_value(GPIO_PORTC + 20, 1);
|
||||
udelay(2);
|
||||
gpio_set_value(GPIO_PORTC + 20, 0);
|
||||
mxc_gpio_mode(PC20_PF_SSI1_FS);
|
||||
msleep(2);
|
||||
}
|
||||
|
||||
static void pca100_ac97_cold_reset(struct snd_ac97 *ac97)
|
||||
{
|
||||
mxc_gpio_mode(GPIO_PORTC | 20 | GPIO_GPIO | GPIO_OUT); /* FS */
|
||||
gpio_set_value(GPIO_PORTC + 20, 0);
|
||||
mxc_gpio_mode(GPIO_PORTC | 22 | GPIO_GPIO | GPIO_OUT); /* TX */
|
||||
gpio_set_value(GPIO_PORTC + 22, 0);
|
||||
mxc_gpio_mode(GPIO_PORTC | 28 | GPIO_GPIO | GPIO_OUT); /* reset */
|
||||
gpio_set_value(GPIO_PORTC + 28, 0);
|
||||
udelay(10);
|
||||
gpio_set_value(GPIO_PORTC + 28, 1);
|
||||
mxc_gpio_mode(PC20_PF_SSI1_FS);
|
||||
mxc_gpio_mode(PC22_PF_SSI1_TXD);
|
||||
msleep(2);
|
||||
}
|
||||
|
||||
static const struct imx_ssi_platform_data pca100_ssi_pdata __initconst = {
|
||||
.ac97_reset = pca100_ac97_cold_reset,
|
||||
.ac97_warm_reset = pca100_ac97_warm_reset,
|
||||
.flags = IMX_SSI_USE_AC97,
|
||||
};
|
||||
|
||||
static int pca100_sdhc2_init(struct device *dev, irq_handler_t detect_irq,
|
||||
void *data)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = request_irq(gpio_to_irq(IMX_GPIO_NR(3, 29)), detect_irq,
|
||||
IRQF_TRIGGER_FALLING, "imx-mmc-detect", data);
|
||||
if (ret)
|
||||
printk(KERN_ERR
|
||||
"pca100: Failed to request irq for sd/mmc detection\n");
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void pca100_sdhc2_exit(struct device *dev, void *data)
|
||||
{
|
||||
free_irq(gpio_to_irq(IMX_GPIO_NR(3, 29)), data);
|
||||
}
|
||||
|
||||
static const struct imxmmc_platform_data sdhc_pdata __initconst = {
|
||||
.init = pca100_sdhc2_init,
|
||||
.exit = pca100_sdhc2_exit,
|
||||
};
|
||||
|
||||
static int otg_phy_init(struct platform_device *pdev)
|
||||
{
|
||||
gpio_set_value(OTG_PHY_CS_GPIO, 0);
|
||||
|
||||
mdelay(10);
|
||||
|
||||
return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
|
||||
}
|
||||
|
||||
static struct mxc_usbh_platform_data otg_pdata __initdata = {
|
||||
.init = otg_phy_init,
|
||||
.portsc = MXC_EHCI_MODE_ULPI,
|
||||
};
|
||||
|
||||
static int usbh2_phy_init(struct platform_device *pdev)
|
||||
{
|
||||
gpio_set_value(USBH2_PHY_CS_GPIO, 0);
|
||||
|
||||
mdelay(10);
|
||||
|
||||
return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
|
||||
}
|
||||
|
||||
static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
|
||||
.init = usbh2_phy_init,
|
||||
.portsc = MXC_EHCI_MODE_ULPI,
|
||||
};
|
||||
|
||||
static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
|
||||
.operating_mode = FSL_USB2_DR_DEVICE,
|
||||
.phy_mode = FSL_USB2_PHY_ULPI,
|
||||
};
|
||||
|
||||
static bool otg_mode_host __initdata;
|
||||
|
||||
static int __init pca100_otg_mode(char *options)
|
||||
{
|
||||
if (!strcmp(options, "host"))
|
||||
otg_mode_host = true;
|
||||
else if (!strcmp(options, "device"))
|
||||
otg_mode_host = false;
|
||||
else
|
||||
pr_info("otg_mode neither \"host\" nor \"device\". "
|
||||
"Defaulting to device\n");
|
||||
return 1;
|
||||
}
|
||||
__setup("otg_mode=", pca100_otg_mode);
|
||||
|
||||
/* framebuffer info */
|
||||
static struct imx_fb_videomode pca100_fb_modes[] = {
|
||||
{
|
||||
.mode = {
|
||||
.name = "EMERGING-ETV570G0DHU",
|
||||
.refresh = 60,
|
||||
.xres = 640,
|
||||
.yres = 480,
|
||||
.pixclock = 39722, /* in ps (25.175 MHz) */
|
||||
.hsync_len = 30,
|
||||
.left_margin = 114,
|
||||
.right_margin = 16,
|
||||
.vsync_len = 3,
|
||||
.upper_margin = 32,
|
||||
.lower_margin = 0,
|
||||
},
|
||||
/*
|
||||
* TFT
|
||||
* Pixel pol active high
|
||||
* HSYNC active low
|
||||
* VSYNC active low
|
||||
* use HSYNC for ACD count
|
||||
* line clock disable while idle
|
||||
* always enable line clock even if no data
|
||||
*/
|
||||
.pcr = 0xf0c08080,
|
||||
.bpp = 16,
|
||||
},
|
||||
};
|
||||
|
||||
static const struct imx_fb_platform_data pca100_fb_data __initconst = {
|
||||
.mode = pca100_fb_modes,
|
||||
.num_modes = ARRAY_SIZE(pca100_fb_modes),
|
||||
|
||||
.pwmr = 0x00A903FF,
|
||||
.lscr1 = 0x00120300,
|
||||
.dmacr = 0x00020010,
|
||||
};
|
||||
|
||||
static void __init pca100_init(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
imx27_soc_init();
|
||||
|
||||
ret = mxc_gpio_setup_multiple_pins(pca100_pins,
|
||||
ARRAY_SIZE(pca100_pins), "PCA100");
|
||||
if (ret)
|
||||
printk(KERN_ERR "pca100: Failed to setup pins (%d)\n", ret);
|
||||
|
||||
imx27_add_imx_uart0(&uart_pdata);
|
||||
|
||||
imx27_add_mxc_nand(&pca100_nand_board_info);
|
||||
|
||||
/* only the i2c master 1 is used on this CPU card */
|
||||
i2c_register_board_info(1, pca100_i2c_devices,
|
||||
ARRAY_SIZE(pca100_i2c_devices));
|
||||
|
||||
imx27_add_imx_i2c(1, &pca100_i2c1_data);
|
||||
|
||||
mxc_gpio_mode(GPIO_PORTD | 28 | GPIO_GPIO | GPIO_IN);
|
||||
mxc_gpio_mode(GPIO_PORTD | 27 | GPIO_GPIO | GPIO_IN);
|
||||
spi_register_board_info(pca100_spi_board_info,
|
||||
ARRAY_SIZE(pca100_spi_board_info));
|
||||
imx27_add_spi_imx0(&pca100_spi0_gpiod_table);
|
||||
|
||||
imx27_add_imx_fb(&pca100_fb_data);
|
||||
|
||||
imx27_add_fec(NULL);
|
||||
imx27_add_imx2_wdt();
|
||||
imx27_add_mxc_w1();
|
||||
}
|
||||
|
||||
static void __init pca100_late_init(void)
|
||||
{
|
||||
imx27_add_imx_ssi(0, &pca100_ssi_pdata);
|
||||
|
||||
imx27_add_mxc_mmc(1, &sdhc_pdata);
|
||||
|
||||
gpio_request(OTG_PHY_CS_GPIO, "usb-otg-cs");
|
||||
gpio_direction_output(OTG_PHY_CS_GPIO, 1);
|
||||
gpio_request(USBH2_PHY_CS_GPIO, "usb-host2-cs");
|
||||
gpio_direction_output(USBH2_PHY_CS_GPIO, 1);
|
||||
|
||||
if (otg_mode_host) {
|
||||
otg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
|
||||
ULPI_OTG_DRVVBUS_EXT);
|
||||
|
||||
if (otg_pdata.otg)
|
||||
imx27_add_mxc_ehci_otg(&otg_pdata);
|
||||
} else {
|
||||
gpio_set_value(OTG_PHY_CS_GPIO, 0);
|
||||
imx27_add_fsl_usb2_udc(&otg_device_pdata);
|
||||
}
|
||||
|
||||
usbh2_pdata.otg = imx_otg_ulpi_create(
|
||||
ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
|
||||
|
||||
if (usbh2_pdata.otg)
|
||||
imx27_add_mxc_ehci_hs(2, &usbh2_pdata);
|
||||
}
|
||||
|
||||
static void __init pca100_timer_init(void)
|
||||
{
|
||||
mx27_clocks_init(26000000);
|
||||
}
|
||||
|
||||
MACHINE_START(PCA100, "phyCARD-i.MX27")
|
||||
.atag_offset = 0x100,
|
||||
.map_io = mx27_map_io,
|
||||
.init_early = imx27_init_early,
|
||||
.init_irq = mx27_init_irq,
|
||||
.init_machine = pca100_init,
|
||||
.init_late = pca100_late_init,
|
||||
.init_time = pca100_timer_init,
|
||||
.restart = mxc_restart,
|
||||
MACHINE_END
|
||||
Loading…
Reference in New Issue
Block a user