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ARM: dts: apq8064: Add DT support for GSBI6 and for UART pin mux
This change adds DT support for GSBI6 and muxes the gpio pins as UART lines. Also defines a alias for serial port on these lines. Signed-off-by: Pramod Gurav <pramod.gurav@smartplayin.com> [Srinivas Kandagatla]: fix pinctrl location and rename alias correctly Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Andy Gross <agross@codeaurora.org>
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@ -7,6 +7,7 @@
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aliases {
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serial0 = &gsbi7_serial;
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serial1 = &gsbi6_serial;
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};
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soc {
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@ -115,6 +116,18 @@
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};
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};
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gsbi@16500000 {
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status = "ok";
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qcom,mode = <GSBI_PROT_I2C_UART>;
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serial@16540000 {
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status = "ok";
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pinctrl-names = "default";
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pinctrl-0 = <&uart_pins>;
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};
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};
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gsbi@16600000 {
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status = "ok";
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qcom,mode = <GSBI_PROT_I2C_UART>;
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@ -126,6 +126,13 @@
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function = "gsbi3";
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};
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};
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uart_pins: uart_pins {
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mux {
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pins = "gpio14", "gpio15", "gpio16", "gpio17";
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function = "gsbi6";
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};
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};
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};
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intc: interrupt-controller@2000000 {
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@ -248,7 +255,6 @@
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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i2c3: i2c@16280000 {
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compatible = "qcom,i2c-qup-v1.1.1";
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reg = <0x16280000 0x1000>;
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@ -259,6 +265,28 @@
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};
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};
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gsbi6: gsbi@16500000 {
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status = "disabled";
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compatible = "qcom,gsbi-v1.0.0";
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cell-index = <6>;
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reg = <0x16500000 0x03>;
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clocks = <&gcc GSBI6_H_CLK>;
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clock-names = "iface";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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gsbi6_serial: serial@16540000 {
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compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
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reg = <0x16540000 0x100>,
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<0x16500000 0x03>;
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interrupts = <0 156 0x0>;
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clocks = <&gcc GSBI6_UART_CLK>, <&gcc GSBI6_H_CLK>;
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clock-names = "core", "iface";
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status = "disabled";
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};
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};
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gsbi7: gsbi@16600000 {
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status = "disabled";
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compatible = "qcom,gsbi-v1.0.0";
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