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ARM: ixp4xx: Delete Omicron boardfiles
These boards are reported obsoleted by the manufacturer and no known community users exist. Cc: Richard Cochran <richardcochran@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
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42be2c98dd
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@ -163,25 +163,6 @@ config MACH_GTWX5715
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"High Speed" UART is n/c (as far as I can tell)
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20 Pin ARM/Xscale JTAG interface on J2
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config MACH_DEVIXP
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bool "Omicron DEVIXP"
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help
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Say 'Y' here if you want your kernel to support the DEVIXP
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board from OMICRON electronics GmbH.
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config MACH_MICCPT
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bool "Omicron MICCPT"
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depends on IXP4XX_PCI_LEGACY
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help
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Say 'Y' here if you want your kernel to support the MICCPT
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board from OMICRON electronics GmbH.
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config MACH_MIC256
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bool "Omicron MIC256"
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help
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Say 'Y' here if you want your kernel to support the MIC256
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board from OMICRON electronics GmbH.
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comment "IXP4xx Options"
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config IXP4XX_PCI_LEGACY
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@ -14,7 +14,6 @@ obj-pci-$(CONFIG_MACH_AVILA) += avila-pci.o
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obj-pci-$(CONFIG_MACH_IXDPG425) += ixdpg425-pci.o
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obj-pci-$(CONFIG_ARCH_ADI_COYOTE) += coyote-pci.o
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obj-pci-$(CONFIG_MACH_GTWX5715) += gtwx5715-pci.o
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obj-pci-$(CONFIG_MACH_MICCPT) += miccpt-pci.o
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obj-pci-$(CONFIG_MACH_GATEWAY7001) += gateway7001-pci.o
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obj-pci-$(CONFIG_MACH_WG302V2) += wg302v2-pci.o
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obj-pci-$(CONFIG_MACH_FSG) += fsg-pci.o
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@ -27,9 +26,6 @@ obj-$(CONFIG_MACH_AVILA) += avila-setup.o
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obj-$(CONFIG_MACH_IXDPG425) += coyote-setup.o
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obj-$(CONFIG_ARCH_ADI_COYOTE) += coyote-setup.o
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obj-$(CONFIG_MACH_GTWX5715) += gtwx5715-setup.o
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obj-$(CONFIG_MACH_DEVIXP) += omixp-setup.o
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obj-$(CONFIG_MACH_MICCPT) += omixp-setup.o
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obj-$(CONFIG_MACH_MIC256) += omixp-setup.o
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obj-$(CONFIG_MACH_GATEWAY7001) += gateway7001-setup.o
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obj-$(CONFIG_MACH_WG302V2) += wg302v2-setup.o
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obj-$(CONFIG_MACH_FSG) += fsg-setup.o
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@ -1,75 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* arch/arm/mach-ixp4xx/miccpt-pci.c
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*
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* MICCPT board-level PCI initialization
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*
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* Copyright (C) 2002 Intel Corporation.
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* Copyright (C) 2003-2004 MontaVista Software, Inc.
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* Copyright (C) 2006 OMICRON electronics GmbH
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*
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* Author: Michael Jochum <michael.jochum@omicron.at>
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*/
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/irq.h>
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#include <asm/mach/pci.h>
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#include <asm/irq.h>
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#include <mach/hardware.h>
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#include <asm/mach-types.h>
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#include "irqs.h"
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#define MAX_DEV 4
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#define IRQ_LINES 4
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/* PCI controller GPIO to IRQ pin mappings */
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#define INTA 1
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#define INTB 2
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#define INTC 3
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#define INTD 4
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void __init miccpt_pci_preinit(void)
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{
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irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
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irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
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irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
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irq_set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW);
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ixp4xx_pci_preinit();
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}
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static int __init miccpt_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
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{
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static int pci_irq_table[IRQ_LINES] = {
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IXP4XX_GPIO_IRQ(INTA),
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IXP4XX_GPIO_IRQ(INTB),
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IXP4XX_GPIO_IRQ(INTC),
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IXP4XX_GPIO_IRQ(INTD)
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};
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if (slot >= 1 && slot <= MAX_DEV && pin >= 1 && pin <= IRQ_LINES)
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return pci_irq_table[(slot + pin - 2) % 4];
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return -1;
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}
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struct hw_pci miccpt_pci __initdata = {
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.nr_controllers = 1,
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.ops = &ixp4xx_ops,
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.preinit = miccpt_pci_preinit,
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.setup = ixp4xx_setup,
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.map_irq = miccpt_map_irq,
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};
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int __init miccpt_pci_init(void)
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{
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if (machine_is_miccpt())
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pci_common_init(&miccpt_pci);
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return 0;
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}
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subsys_initcall(miccpt_pci_init);
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@ -1,298 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* arch/arm/mach-ixp4xx/omixp-setup.c
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*
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* omicron ixp4xx board setup
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* Copyright (C) 2009 OMICRON electronics GmbH
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*
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* based nslu2-setup.c, ixdp425-setup.c:
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* Copyright (C) 2003-2004 MontaVista Software, Inc.
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*/
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#include <linux/kernel.h>
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#include <linux/serial.h>
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#include <linux/serial_8250.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <linux/leds.h>
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#include <asm/setup.h>
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#include <asm/memory.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/flash.h>
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#include <mach/hardware.h>
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#include "irqs.h"
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static struct resource omixp_flash_resources[] = {
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{
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.flags = IORESOURCE_MEM,
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}, {
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.flags = IORESOURCE_MEM,
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},
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};
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static struct mtd_partition omixp_partitions[] = {
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{
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.name = "Recovery Bootloader",
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.size = 0x00020000,
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.offset = 0,
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}, {
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.name = "Calibration Data",
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.size = 0x00020000,
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.offset = 0x00020000,
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}, {
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.name = "Recovery FPGA",
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.size = 0x00020000,
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.offset = 0x00040000,
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}, {
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.name = "Release Bootloader",
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.size = 0x00020000,
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.offset = 0x00060000,
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}, {
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.name = "Release FPGA",
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.size = 0x00020000,
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.offset = 0x00080000,
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}, {
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.name = "Kernel",
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.size = 0x00160000,
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.offset = 0x000a0000,
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}, {
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.name = "Filesystem",
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.size = 0x00C00000,
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.offset = 0x00200000,
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}, {
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.name = "Persistent Storage",
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.size = 0x00200000,
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.offset = 0x00E00000,
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},
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};
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static struct flash_platform_data omixp_flash_data[] = {
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{
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.map_name = "cfi_probe",
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.parts = omixp_partitions,
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.nr_parts = ARRAY_SIZE(omixp_partitions),
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}, {
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.map_name = "cfi_probe",
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.parts = NULL,
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.nr_parts = 0,
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},
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};
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static struct platform_device omixp_flash_device[] = {
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{
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.name = "IXP4XX-Flash",
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.id = 0,
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.dev = {
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.platform_data = &omixp_flash_data[0],
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},
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.resource = &omixp_flash_resources[0],
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.num_resources = 1,
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}, {
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.name = "IXP4XX-Flash",
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.id = 1,
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.dev = {
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.platform_data = &omixp_flash_data[1],
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},
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.resource = &omixp_flash_resources[1],
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.num_resources = 1,
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},
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};
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/* Swap UART's - These boards have the console on UART2. The following
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* configuration is used:
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* ttyS0 .. UART2
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* ttyS1 .. UART1
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* This way standard images can be used with the kernel that expect
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* the console on ttyS0.
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*/
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static struct resource omixp_uart_resources[] = {
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{
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.start = IXP4XX_UART2_BASE_PHYS,
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.end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IXP4XX_UART1_BASE_PHYS,
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.end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct plat_serial8250_port omixp_uart_data[] = {
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{
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.mapbase = IXP4XX_UART2_BASE_PHYS,
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.membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
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.irq = IRQ_IXP4XX_UART2,
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.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
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.iotype = UPIO_MEM,
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.regshift = 2,
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.uartclk = IXP4XX_UART_XTAL,
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}, {
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.mapbase = IXP4XX_UART1_BASE_PHYS,
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.membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
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.irq = IRQ_IXP4XX_UART1,
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.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
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.iotype = UPIO_MEM,
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.regshift = 2,
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.uartclk = IXP4XX_UART_XTAL,
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}, {
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/* list termination */
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}
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};
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static struct platform_device omixp_uart = {
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.name = "serial8250",
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.id = PLAT8250_DEV_PLATFORM,
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.dev.platform_data = omixp_uart_data,
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.num_resources = 2,
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.resource = omixp_uart_resources,
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};
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static struct gpio_led mic256_led_pins[] = {
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{
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.name = "LED-A",
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.gpio = 7,
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},
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};
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static struct gpio_led_platform_data mic256_led_data = {
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.num_leds = ARRAY_SIZE(mic256_led_pins),
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.leds = mic256_led_pins,
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};
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static struct platform_device mic256_leds = {
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.name = "leds-gpio",
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.id = -1,
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.dev.platform_data = &mic256_led_data,
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};
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/* Built-in 10/100 Ethernet MAC interfaces */
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static struct resource ixp425_npeb_resources[] = {
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{
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.start = IXP4XX_EthB_BASE_PHYS,
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.end = IXP4XX_EthB_BASE_PHYS + 0x0fff,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct resource ixp425_npec_resources[] = {
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{
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.start = IXP4XX_EthC_BASE_PHYS,
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.end = IXP4XX_EthC_BASE_PHYS + 0x0fff,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct eth_plat_info ixdp425_plat_eth[] = {
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{
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.phy = 0,
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.rxq = 3,
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.txreadyq = 20,
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}, {
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.phy = 1,
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.rxq = 4,
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.txreadyq = 21,
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},
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};
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static struct platform_device ixdp425_eth[] = {
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{
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.name = "ixp4xx_eth",
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.id = IXP4XX_ETH_NPEB,
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.dev.platform_data = ixdp425_plat_eth,
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.num_resources = ARRAY_SIZE(ixp425_npeb_resources),
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.resource = ixp425_npeb_resources,
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}, {
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.name = "ixp4xx_eth",
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.id = IXP4XX_ETH_NPEC,
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.dev.platform_data = ixdp425_plat_eth + 1,
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.num_resources = ARRAY_SIZE(ixp425_npec_resources),
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.resource = ixp425_npec_resources,
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},
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};
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static struct platform_device *devixp_pldev[] __initdata = {
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&omixp_uart,
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&omixp_flash_device[0],
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&ixdp425_eth[0],
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&ixdp425_eth[1],
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};
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static struct platform_device *mic256_pldev[] __initdata = {
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&omixp_uart,
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&omixp_flash_device[0],
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&mic256_leds,
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&ixdp425_eth[0],
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&ixdp425_eth[1],
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};
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static struct platform_device *miccpt_pldev[] __initdata = {
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&omixp_uart,
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&omixp_flash_device[0],
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&omixp_flash_device[1],
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&ixdp425_eth[0],
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&ixdp425_eth[1],
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};
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static void __init omixp_init(void)
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{
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ixp4xx_sys_init();
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/* 16MiB Boot Flash */
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omixp_flash_resources[0].start = IXP4XX_EXP_BUS_BASE(0);
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omixp_flash_resources[0].end = IXP4XX_EXP_BUS_END(0);
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/* 32 MiB Data Flash */
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omixp_flash_resources[1].start = IXP4XX_EXP_BUS_BASE(2);
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omixp_flash_resources[1].end = IXP4XX_EXP_BUS_END(2);
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if (machine_is_devixp())
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platform_add_devices(devixp_pldev, ARRAY_SIZE(devixp_pldev));
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else if (machine_is_miccpt())
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platform_add_devices(miccpt_pldev, ARRAY_SIZE(miccpt_pldev));
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else if (machine_is_mic256())
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platform_add_devices(mic256_pldev, ARRAY_SIZE(mic256_pldev));
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}
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#ifdef CONFIG_MACH_DEVIXP
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MACHINE_START(DEVIXP, "Omicron DEVIXP")
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.atag_offset = 0x100,
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.map_io = ixp4xx_map_io,
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.init_early = ixp4xx_init_early,
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.init_irq = ixp4xx_init_irq,
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.init_time = ixp4xx_timer_init,
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.init_machine = omixp_init,
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.restart = ixp4xx_restart,
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MACHINE_END
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#endif
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#ifdef CONFIG_MACH_MICCPT
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MACHINE_START(MICCPT, "Omicron MICCPT")
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.atag_offset = 0x100,
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.map_io = ixp4xx_map_io,
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.init_early = ixp4xx_init_early,
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.init_irq = ixp4xx_init_irq,
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.init_time = ixp4xx_timer_init,
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.init_machine = omixp_init,
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#if defined(CONFIG_PCI)
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.dma_zone_size = SZ_64M,
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#endif
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.restart = ixp4xx_restart,
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MACHINE_END
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#endif
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#ifdef CONFIG_MACH_MIC256
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MACHINE_START(MIC256, "Omicron MIC256")
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.atag_offset = 0x100,
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.map_io = ixp4xx_map_io,
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.init_early = ixp4xx_init_early,
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.init_irq = ixp4xx_init_irq,
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.init_time = ixp4xx_timer_init,
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.init_machine = omixp_init,
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.restart = ixp4xx_restart,
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MACHINE_END
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#endif
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