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omapdss: Add new panel driver for Topolly td028ttec1 LCD.
Signed-off-by: Marek Belisko <marek@goldelico.com> Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> [tomi.valkeinen@ti.com: made a few funcs static] Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
This commit is contained in:
Marek Belisko
Tomi Valkeinen
parent
8900346d5c
commit
8623ec220b
@ -56,6 +56,12 @@ config DISPLAY_PANEL_SHARP_LS037V7DW01
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help
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LCD Panel used in TI's SDP3430 and EVM boards
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config DISPLAY_PANEL_TPO_TD028TTEC1
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tristate "TPO TD028TTEC1 LCD Panel"
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depends on SPI
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help
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LCD panel used in Openmoko.
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config DISPLAY_PANEL_TPO_TD043MTEA1
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tristate "TPO TD043MTEA1 LCD Panel"
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depends on SPI
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@ -8,5 +8,6 @@ obj-$(CONFIG_DISPLAY_PANEL_DSI_CM) += panel-dsi-cm.o
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obj-$(CONFIG_DISPLAY_PANEL_SONY_ACX565AKM) += panel-sony-acx565akm.o
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obj-$(CONFIG_DISPLAY_PANEL_LGPHILIPS_LB035Q02) += panel-lgphilips-lb035q02.o
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obj-$(CONFIG_DISPLAY_PANEL_SHARP_LS037V7DW01) += panel-sharp-ls037v7dw01.o
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obj-$(CONFIG_DISPLAY_PANEL_TPO_TD028TTEC1) += panel-tpo-td028ttec1.o
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obj-$(CONFIG_DISPLAY_PANEL_TPO_TD043MTEA1) += panel-tpo-td043mtea1.o
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obj-$(CONFIG_DISPLAY_PANEL_NEC_NL8048HL11) += panel-nec-nl8048hl11.o
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480
drivers/video/omap2/displays-new/panel-tpo-td028ttec1.c
Normal file
480
drivers/video/omap2/displays-new/panel-tpo-td028ttec1.c
Normal file
@ -0,0 +1,480 @@
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/*
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* Toppoly TD028TTEC1 panel support
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*
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* Copyright (C) 2008 Nokia Corporation
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* Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
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*
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* Neo 1973 code (jbt6k74.c):
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* Copyright (C) 2006-2007 by OpenMoko, Inc.
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* Author: Harald Welte <laforge@openmoko.org>
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*
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* Ported and adapted from Neo 1973 U-Boot by:
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* H. Nikolaus Schaller <hns@goldelico.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <linux/spi/spi.h>
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#include <linux/gpio.h>
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#include <video/omapdss.h>
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#include <video/omap-panel-data.h>
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struct panel_drv_data {
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struct omap_dss_device dssdev;
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struct omap_dss_device *in;
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int data_lines;
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struct omap_video_timings videomode;
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struct spi_device *spi_dev;
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};
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static struct omap_video_timings td028ttec1_panel_timings = {
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.x_res = 480,
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.y_res = 640,
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.pixel_clock = 22153,
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.hfp = 24,
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.hsw = 8,
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.hbp = 8,
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.vfp = 4,
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.vsw = 2,
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.vbp = 2,
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.vsync_level = OMAPDSS_SIG_ACTIVE_LOW,
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.hsync_level = OMAPDSS_SIG_ACTIVE_LOW,
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.data_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE,
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.de_level = OMAPDSS_SIG_ACTIVE_HIGH,
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.sync_pclk_edge = OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES,
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};
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#define JBT_COMMAND 0x000
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#define JBT_DATA 0x100
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static int jbt_ret_write_0(struct panel_drv_data *ddata, u8 reg)
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{
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int rc;
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u16 tx_buf = JBT_COMMAND | reg;
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rc = spi_write(ddata->spi_dev, (u8 *)&tx_buf,
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1*sizeof(u16));
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if (rc != 0)
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dev_err(&ddata->spi_dev->dev,
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"jbt_ret_write_0 spi_write ret %d\n", rc);
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return rc;
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}
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static int jbt_reg_write_1(struct panel_drv_data *ddata, u8 reg, u8 data)
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{
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int rc;
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u16 tx_buf[2];
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tx_buf[0] = JBT_COMMAND | reg;
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tx_buf[1] = JBT_DATA | data;
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rc = spi_write(ddata->spi_dev, (u8 *)tx_buf,
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2*sizeof(u16));
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if (rc != 0)
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dev_err(&ddata->spi_dev->dev,
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"jbt_reg_write_1 spi_write ret %d\n", rc);
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return rc;
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}
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static int jbt_reg_write_2(struct panel_drv_data *ddata, u8 reg, u16 data)
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{
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int rc;
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u16 tx_buf[3];
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tx_buf[0] = JBT_COMMAND | reg;
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tx_buf[1] = JBT_DATA | (data >> 8);
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tx_buf[2] = JBT_DATA | (data & 0xff);
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rc = spi_write(ddata->spi_dev, (u8 *)tx_buf,
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3*sizeof(u16));
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if (rc != 0)
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dev_err(&ddata->spi_dev->dev,
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"jbt_reg_write_2 spi_write ret %d\n", rc);
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return rc;
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}
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enum jbt_register {
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JBT_REG_SLEEP_IN = 0x10,
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JBT_REG_SLEEP_OUT = 0x11,
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JBT_REG_DISPLAY_OFF = 0x28,
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JBT_REG_DISPLAY_ON = 0x29,
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JBT_REG_RGB_FORMAT = 0x3a,
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JBT_REG_QUAD_RATE = 0x3b,
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JBT_REG_POWER_ON_OFF = 0xb0,
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JBT_REG_BOOSTER_OP = 0xb1,
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JBT_REG_BOOSTER_MODE = 0xb2,
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JBT_REG_BOOSTER_FREQ = 0xb3,
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JBT_REG_OPAMP_SYSCLK = 0xb4,
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JBT_REG_VSC_VOLTAGE = 0xb5,
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JBT_REG_VCOM_VOLTAGE = 0xb6,
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JBT_REG_EXT_DISPL = 0xb7,
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JBT_REG_OUTPUT_CONTROL = 0xb8,
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JBT_REG_DCCLK_DCEV = 0xb9,
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JBT_REG_DISPLAY_MODE1 = 0xba,
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JBT_REG_DISPLAY_MODE2 = 0xbb,
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JBT_REG_DISPLAY_MODE = 0xbc,
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JBT_REG_ASW_SLEW = 0xbd,
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JBT_REG_DUMMY_DISPLAY = 0xbe,
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JBT_REG_DRIVE_SYSTEM = 0xbf,
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JBT_REG_SLEEP_OUT_FR_A = 0xc0,
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JBT_REG_SLEEP_OUT_FR_B = 0xc1,
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JBT_REG_SLEEP_OUT_FR_C = 0xc2,
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JBT_REG_SLEEP_IN_LCCNT_D = 0xc3,
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JBT_REG_SLEEP_IN_LCCNT_E = 0xc4,
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JBT_REG_SLEEP_IN_LCCNT_F = 0xc5,
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JBT_REG_SLEEP_IN_LCCNT_G = 0xc6,
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JBT_REG_GAMMA1_FINE_1 = 0xc7,
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JBT_REG_GAMMA1_FINE_2 = 0xc8,
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JBT_REG_GAMMA1_INCLINATION = 0xc9,
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JBT_REG_GAMMA1_BLUE_OFFSET = 0xca,
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JBT_REG_BLANK_CONTROL = 0xcf,
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JBT_REG_BLANK_TH_TV = 0xd0,
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JBT_REG_CKV_ON_OFF = 0xd1,
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JBT_REG_CKV_1_2 = 0xd2,
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JBT_REG_OEV_TIMING = 0xd3,
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JBT_REG_ASW_TIMING_1 = 0xd4,
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JBT_REG_ASW_TIMING_2 = 0xd5,
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JBT_REG_HCLOCK_VGA = 0xec,
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JBT_REG_HCLOCK_QVGA = 0xed,
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};
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#define to_panel_data(p) container_of(p, struct panel_drv_data, dssdev)
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static int td028ttec1_panel_connect(struct omap_dss_device *dssdev)
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{
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struct panel_drv_data *ddata = to_panel_data(dssdev);
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struct omap_dss_device *in = ddata->in;
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int r;
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if (omapdss_device_is_connected(dssdev))
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return 0;
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r = in->ops.dpi->connect(in, dssdev);
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if (r)
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return r;
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return 0;
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}
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static void td028ttec1_panel_disconnect(struct omap_dss_device *dssdev)
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{
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struct panel_drv_data *ddata = to_panel_data(dssdev);
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struct omap_dss_device *in = ddata->in;
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if (!omapdss_device_is_connected(dssdev))
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return;
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in->ops.dpi->disconnect(in, dssdev);
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}
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static int td028ttec1_panel_enable(struct omap_dss_device *dssdev)
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{
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struct panel_drv_data *ddata = to_panel_data(dssdev);
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struct omap_dss_device *in = ddata->in;
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int r;
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if (!omapdss_device_is_connected(dssdev))
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return -ENODEV;
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if (omapdss_device_is_enabled(dssdev))
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return 0;
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in->ops.dpi->set_data_lines(in, ddata->data_lines);
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in->ops.dpi->set_timings(in, &ddata->videomode);
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r = in->ops.dpi->enable(in);
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if (r)
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return r;
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dev_dbg(dssdev->dev, "td028ttec1_panel_enable() - state %d\n",
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dssdev->state);
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/* three times command zero */
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r |= jbt_ret_write_0(ddata, 0x00);
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usleep_range(1000, 2000);
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r |= jbt_ret_write_0(ddata, 0x00);
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usleep_range(1000, 2000);
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r |= jbt_ret_write_0(ddata, 0x00);
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usleep_range(1000, 2000);
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if (r) {
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dev_warn(dssdev->dev, "transfer error\n");
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goto transfer_err;
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}
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/* deep standby out */
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r |= jbt_reg_write_1(ddata, JBT_REG_POWER_ON_OFF, 0x17);
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/* RGB I/F on, RAM write off, QVGA through, SIGCON enable */
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r |= jbt_reg_write_1(ddata, JBT_REG_DISPLAY_MODE, 0x80);
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/* Quad mode off */
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r |= jbt_reg_write_1(ddata, JBT_REG_QUAD_RATE, 0x00);
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/* AVDD on, XVDD on */
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r |= jbt_reg_write_1(ddata, JBT_REG_POWER_ON_OFF, 0x16);
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/* Output control */
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r |= jbt_reg_write_2(ddata, JBT_REG_OUTPUT_CONTROL, 0xfff9);
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/* Sleep mode off */
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r |= jbt_ret_write_0(ddata, JBT_REG_SLEEP_OUT);
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/* at this point we have like 50% grey */
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/* initialize register set */
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r |= jbt_reg_write_1(ddata, JBT_REG_DISPLAY_MODE1, 0x01);
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r |= jbt_reg_write_1(ddata, JBT_REG_DISPLAY_MODE2, 0x00);
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r |= jbt_reg_write_1(ddata, JBT_REG_RGB_FORMAT, 0x60);
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r |= jbt_reg_write_1(ddata, JBT_REG_DRIVE_SYSTEM, 0x10);
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r |= jbt_reg_write_1(ddata, JBT_REG_BOOSTER_OP, 0x56);
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r |= jbt_reg_write_1(ddata, JBT_REG_BOOSTER_MODE, 0x33);
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r |= jbt_reg_write_1(ddata, JBT_REG_BOOSTER_FREQ, 0x11);
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r |= jbt_reg_write_1(ddata, JBT_REG_BOOSTER_FREQ, 0x11);
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r |= jbt_reg_write_1(ddata, JBT_REG_OPAMP_SYSCLK, 0x02);
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r |= jbt_reg_write_1(ddata, JBT_REG_VSC_VOLTAGE, 0x2b);
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r |= jbt_reg_write_1(ddata, JBT_REG_VCOM_VOLTAGE, 0x40);
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r |= jbt_reg_write_1(ddata, JBT_REG_EXT_DISPL, 0x03);
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r |= jbt_reg_write_1(ddata, JBT_REG_DCCLK_DCEV, 0x04);
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/*
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* default of 0x02 in JBT_REG_ASW_SLEW responsible for 72Hz requirement
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* to avoid red / blue flicker
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*/
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r |= jbt_reg_write_1(ddata, JBT_REG_ASW_SLEW, 0x04);
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r |= jbt_reg_write_1(ddata, JBT_REG_DUMMY_DISPLAY, 0x00);
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r |= jbt_reg_write_1(ddata, JBT_REG_SLEEP_OUT_FR_A, 0x11);
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r |= jbt_reg_write_1(ddata, JBT_REG_SLEEP_OUT_FR_B, 0x11);
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r |= jbt_reg_write_1(ddata, JBT_REG_SLEEP_OUT_FR_C, 0x11);
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r |= jbt_reg_write_2(ddata, JBT_REG_SLEEP_IN_LCCNT_D, 0x2040);
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r |= jbt_reg_write_2(ddata, JBT_REG_SLEEP_IN_LCCNT_E, 0x60c0);
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r |= jbt_reg_write_2(ddata, JBT_REG_SLEEP_IN_LCCNT_F, 0x1020);
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r |= jbt_reg_write_2(ddata, JBT_REG_SLEEP_IN_LCCNT_G, 0x60c0);
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r |= jbt_reg_write_2(ddata, JBT_REG_GAMMA1_FINE_1, 0x5533);
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r |= jbt_reg_write_1(ddata, JBT_REG_GAMMA1_FINE_2, 0x00);
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r |= jbt_reg_write_1(ddata, JBT_REG_GAMMA1_INCLINATION, 0x00);
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r |= jbt_reg_write_1(ddata, JBT_REG_GAMMA1_BLUE_OFFSET, 0x00);
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r |= jbt_reg_write_2(ddata, JBT_REG_HCLOCK_VGA, 0x1f0);
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r |= jbt_reg_write_1(ddata, JBT_REG_BLANK_CONTROL, 0x02);
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r |= jbt_reg_write_2(ddata, JBT_REG_BLANK_TH_TV, 0x0804);
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r |= jbt_reg_write_1(ddata, JBT_REG_CKV_ON_OFF, 0x01);
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r |= jbt_reg_write_2(ddata, JBT_REG_CKV_1_2, 0x0000);
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r |= jbt_reg_write_2(ddata, JBT_REG_OEV_TIMING, 0x0d0e);
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r |= jbt_reg_write_2(ddata, JBT_REG_ASW_TIMING_1, 0x11a4);
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r |= jbt_reg_write_1(ddata, JBT_REG_ASW_TIMING_2, 0x0e);
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r |= jbt_ret_write_0(ddata, JBT_REG_DISPLAY_ON);
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dssdev->state = OMAP_DSS_DISPLAY_ACTIVE;
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transfer_err:
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return r ? -EIO : 0;
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}
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static void td028ttec1_panel_disable(struct omap_dss_device *dssdev)
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{
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struct panel_drv_data *ddata = to_panel_data(dssdev);
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struct omap_dss_device *in = ddata->in;
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if (!omapdss_device_is_enabled(dssdev))
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return;
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dev_dbg(dssdev->dev, "td028ttec1_panel_disable()\n");
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jbt_ret_write_0(ddata, JBT_REG_DISPLAY_OFF);
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jbt_reg_write_2(ddata, JBT_REG_OUTPUT_CONTROL, 0x8002);
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jbt_ret_write_0(ddata, JBT_REG_SLEEP_IN);
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jbt_reg_write_1(ddata, JBT_REG_POWER_ON_OFF, 0x00);
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in->ops.dpi->disable(in);
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dssdev->state = OMAP_DSS_DISPLAY_DISABLED;
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}
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static void td028ttec1_panel_set_timings(struct omap_dss_device *dssdev,
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struct omap_video_timings *timings)
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{
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struct panel_drv_data *ddata = to_panel_data(dssdev);
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struct omap_dss_device *in = ddata->in;
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ddata->videomode = *timings;
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dssdev->panel.timings = *timings;
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in->ops.dpi->set_timings(in, timings);
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}
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static void td028ttec1_panel_get_timings(struct omap_dss_device *dssdev,
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struct omap_video_timings *timings)
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{
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struct panel_drv_data *ddata = to_panel_data(dssdev);
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*timings = ddata->videomode;
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}
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static int td028ttec1_panel_check_timings(struct omap_dss_device *dssdev,
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struct omap_video_timings *timings)
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{
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struct panel_drv_data *ddata = to_panel_data(dssdev);
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struct omap_dss_device *in = ddata->in;
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return in->ops.dpi->check_timings(in, timings);
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}
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static struct omap_dss_driver td028ttec1_ops = {
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.connect = td028ttec1_panel_connect,
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.disconnect = td028ttec1_panel_disconnect,
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.enable = td028ttec1_panel_enable,
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.disable = td028ttec1_panel_disable,
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||||
.set_timings = td028ttec1_panel_set_timings,
|
||||
.get_timings = td028ttec1_panel_get_timings,
|
||||
.check_timings = td028ttec1_panel_check_timings,
|
||||
};
|
||||
|
||||
static int td028ttec1_panel_probe_pdata(struct spi_device *spi)
|
||||
{
|
||||
const struct panel_tpo_td028ttec1_platform_data *pdata;
|
||||
struct panel_drv_data *ddata = dev_get_drvdata(&spi->dev);
|
||||
struct omap_dss_device *dssdev, *in;
|
||||
|
||||
pdata = dev_get_platdata(&spi->dev);
|
||||
|
||||
in = omap_dss_find_output(pdata->source);
|
||||
if (in == NULL) {
|
||||
dev_err(&spi->dev, "failed to find video source '%s'\n",
|
||||
pdata->source);
|
||||
return -EPROBE_DEFER;
|
||||
}
|
||||
|
||||
ddata->in = in;
|
||||
|
||||
ddata->data_lines = pdata->data_lines;
|
||||
|
||||
dssdev = &ddata->dssdev;
|
||||
dssdev->name = pdata->name;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int td028ttec1_panel_probe(struct spi_device *spi)
|
||||
{
|
||||
struct panel_drv_data *ddata;
|
||||
struct omap_dss_device *dssdev;
|
||||
int r;
|
||||
|
||||
dev_dbg(&spi->dev, "%s\n", __func__);
|
||||
|
||||
spi->bits_per_word = 9;
|
||||
spi->mode = SPI_MODE_3;
|
||||
|
||||
r = spi_setup(spi);
|
||||
if (r < 0) {
|
||||
dev_err(&spi->dev, "spi_setup failed: %d\n", r);
|
||||
return r;
|
||||
}
|
||||
|
||||
ddata = devm_kzalloc(&spi->dev, sizeof(*ddata), GFP_KERNEL);
|
||||
if (ddata == NULL)
|
||||
return -ENOMEM;
|
||||
|
||||
dev_set_drvdata(&spi->dev, ddata);
|
||||
|
||||
ddata->spi_dev = spi;
|
||||
|
||||
if (dev_get_platdata(&spi->dev)) {
|
||||
r = td028ttec1_panel_probe_pdata(spi);
|
||||
if (r)
|
||||
return r;
|
||||
} else {
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
ddata->videomode = td028ttec1_panel_timings;
|
||||
|
||||
dssdev = &ddata->dssdev;
|
||||
dssdev->dev = &spi->dev;
|
||||
dssdev->driver = &td028ttec1_ops;
|
||||
dssdev->type = OMAP_DISPLAY_TYPE_DPI;
|
||||
dssdev->owner = THIS_MODULE;
|
||||
dssdev->panel.timings = ddata->videomode;
|
||||
dssdev->phy.dpi.data_lines = ddata->data_lines;
|
||||
|
||||
r = omapdss_register_display(dssdev);
|
||||
if (r) {
|
||||
dev_err(&spi->dev, "Failed to register panel\n");
|
||||
goto err_reg;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
err_reg:
|
||||
omap_dss_put_device(ddata->in);
|
||||
return r;
|
||||
}
|
||||
|
||||
static int td028ttec1_panel_remove(struct spi_device *spi)
|
||||
{
|
||||
struct panel_drv_data *ddata = dev_get_drvdata(&spi->dev);
|
||||
struct omap_dss_device *dssdev = &ddata->dssdev;
|
||||
struct omap_dss_device *in = ddata->in;
|
||||
|
||||
dev_dbg(&ddata->spi_dev->dev, "%s\n", __func__);
|
||||
|
||||
omapdss_unregister_display(dssdev);
|
||||
|
||||
td028ttec1_panel_disable(dssdev);
|
||||
td028ttec1_panel_disconnect(dssdev);
|
||||
|
||||
omap_dss_put_device(in);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct spi_driver td028ttec1_spi_driver = {
|
||||
.probe = td028ttec1_panel_probe,
|
||||
.remove = td028ttec1_panel_remove,
|
||||
|
||||
.driver = {
|
||||
.name = "panel-tpo-td028ttec1",
|
||||
.owner = THIS_MODULE,
|
||||
},
|
||||
};
|
||||
|
||||
module_spi_driver(td028ttec1_spi_driver);
|
||||
|
||||
MODULE_AUTHOR("H. Nikolaus Schaller <hns@goldelico.com>");
|
||||
MODULE_DESCRIPTION("Toppoly TD028TTEC1 panel driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
@ -238,4 +238,17 @@ struct panel_nec_nl8048hl11_platform_data {
|
||||
int qvga_gpio;
|
||||
};
|
||||
|
||||
/**
|
||||
* panel-tpo-td028ttec1 platform data
|
||||
* @name: name for display entity
|
||||
* @source: name of the display entity used as a video source
|
||||
* @data_lines: number of DPI datalines
|
||||
*/
|
||||
struct panel_tpo_td028ttec1_platform_data {
|
||||
const char *name;
|
||||
const char *source;
|
||||
|
||||
int data_lines;
|
||||
};
|
||||
|
||||
#endif /* __OMAP_PANEL_DATA_H */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user