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sh: Cleanup IRQ disabling for hardirq handlers.
The generic hardirq layer already takes care of a lot of the appropriate locking and disabling for us, no need to duplicate it in the handlers.. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
parent
ba463937ef
commit
8599cf0592
@ -19,6 +19,7 @@
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* IRQ functions for a Hitachi Big Sur Evaluation Board.
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*
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*/
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#undef DEBUG
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#include <linux/sched.h>
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#include <linux/module.h>
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@ -41,10 +42,8 @@
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#undef BIGSUR_DEBUG
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#ifdef BIGSUR_DEBUG
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#define DPRINTK(args...) printk(args)
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#define DIPRINTK(n, args...) if (BIGSUR_DEBUG>(n)) printk(args)
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#else
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#define DPRINTK(args...)
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#define DIPRINTK(n, args...)
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#endif /* BIGSUR_DEBUG */
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@ -60,45 +59,39 @@ extern int hd64465_irq_demux(int irq);
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/* Level 1 IRQ routines */
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static void disable_bigsur_l1irq(unsigned int irq)
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{
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unsigned long flags;
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unsigned char mask;
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unsigned int mask_port = ((irq - BIGSUR_IRQ_LOW)/8) ? BIGSUR_IRLMR1 : BIGSUR_IRLMR0;
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unsigned char bit = (1 << ((irq - MGATE_IRQ_LOW)%8) );
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if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) {
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DPRINTK("Disable L1 IRQ %d\n", irq);
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pr_debug("Disable L1 IRQ %d\n", irq);
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DIPRINTK(2,"disable_bigsur_l1irq: IMR=0x%08x mask=0x%x\n",
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mask_port, bit);
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local_irq_save(flags);
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/* Disable IRQ - set mask bit */
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mask = inb(mask_port) | bit;
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outb(mask, mask_port);
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local_irq_restore(flags);
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return;
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}
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DPRINTK("disable_bigsur_l1irq: Invalid IRQ %d\n", irq);
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pr_debug("disable_bigsur_l1irq: Invalid IRQ %d\n", irq);
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}
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static void enable_bigsur_l1irq(unsigned int irq)
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{
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unsigned long flags;
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unsigned char mask;
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unsigned int mask_port = ((irq - BIGSUR_IRQ_LOW)/8) ? BIGSUR_IRLMR1 : BIGSUR_IRLMR0;
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unsigned char bit = (1 << ((irq - MGATE_IRQ_LOW)%8) );
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if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) {
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DPRINTK("Enable L1 IRQ %d\n", irq);
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pr_debug("Enable L1 IRQ %d\n", irq);
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DIPRINTK(2,"enable_bigsur_l1irq: IMR=0x%08x mask=0x%x\n",
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mask_port, bit);
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local_irq_save(flags);
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/* Enable L1 IRQ - clear mask bit */
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mask = inb(mask_port) & ~bit;
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outb(mask, mask_port);
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local_irq_restore(flags);
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return;
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}
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DPRINTK("enable_bigsur_l1irq: Invalid IRQ %d\n", irq);
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pr_debug("enable_bigsur_l1irq: Invalid IRQ %d\n", irq);
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}
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@ -126,51 +119,45 @@ static const u32 imr_offset = BIGSUR_IMR0 - BIGSUR_IMR1;
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/* Level 2 IRQ routines */
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static void disable_bigsur_l2irq(unsigned int irq)
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{
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unsigned long flags;
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unsigned char mask;
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unsigned char bit = 1 << ((irq-BIGSUR_2NDLVL_IRQ_LOW)%8);
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unsigned int mask_port = imr_base - REG_NUM(irq)*imr_offset;
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if(irq >= BIGSUR_2NDLVL_IRQ_LOW && irq < BIGSUR_2NDLVL_IRQ_HIGH) {
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DPRINTK("Disable L2 IRQ %d\n", irq);
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if(irq >= BIGSUR_2NDLVL_IRQ_LOW && irq < BIGSUR_2NDLVL_IRQ_HIGH) {
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pr_debug("Disable L2 IRQ %d\n", irq);
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DIPRINTK(2,"disable_bigsur_l2irq: IMR=0x%08x mask=0x%x\n",
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mask_port, bit);
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local_irq_save(flags);
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/* Disable L2 IRQ - set mask bit */
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mask = inb(mask_port) | bit;
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outb(mask, mask_port);
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local_irq_restore(flags);
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return;
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}
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DPRINTK("disable_bigsur_l2irq: Invalid IRQ %d\n", irq);
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pr_debug("disable_bigsur_l2irq: Invalid IRQ %d\n", irq);
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}
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static void enable_bigsur_l2irq(unsigned int irq)
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{
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unsigned long flags;
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unsigned char mask;
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unsigned char bit = 1 << ((irq-BIGSUR_2NDLVL_IRQ_LOW)%8);
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unsigned int mask_port = imr_base - REG_NUM(irq)*imr_offset;
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if(irq >= BIGSUR_2NDLVL_IRQ_LOW && irq < BIGSUR_2NDLVL_IRQ_HIGH) {
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DPRINTK("Enable L2 IRQ %d\n", irq);
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if(irq >= BIGSUR_2NDLVL_IRQ_LOW && irq < BIGSUR_2NDLVL_IRQ_HIGH) {
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pr_debug("Enable L2 IRQ %d\n", irq);
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DIPRINTK(2,"enable_bigsur_l2irq: IMR=0x%08x mask=0x%x\n",
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mask_port, bit);
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local_irq_save(flags);
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/* Enable L2 IRQ - clear mask bit */
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mask = inb(mask_port) & ~bit;
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outb(mask, mask_port);
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local_irq_restore(flags);
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return;
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}
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DPRINTK("enable_bigsur_l2irq: Invalid IRQ %d\n", irq);
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pr_debug("enable_bigsur_l2irq: Invalid IRQ %d\n", irq);
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}
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static void mask_and_ack_bigsur(unsigned int irq)
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{
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DPRINTK("mask_and_ack_bigsur IRQ %d\n", irq);
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pr_debug("mask_and_ack_bigsur IRQ %d\n", irq);
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if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH)
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disable_bigsur_l1irq(irq);
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else
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@ -179,7 +166,7 @@ static void mask_and_ack_bigsur(unsigned int irq)
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static void end_bigsur_irq(unsigned int irq)
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{
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DPRINTK("end_bigsur_irq IRQ %d\n", irq);
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pr_debug("end_bigsur_irq IRQ %d\n", irq);
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if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) {
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if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH)
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enable_bigsur_l1irq(irq);
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@ -193,7 +180,7 @@ static unsigned int startup_bigsur_irq(unsigned int irq)
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u8 mask;
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u32 reg;
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DPRINTK("startup_bigsur_irq IRQ %d\n", irq);
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pr_debug("startup_bigsur_irq IRQ %d\n", irq);
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if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) {
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/* Enable the L1 IRQ */
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@ -218,7 +205,7 @@ static unsigned int startup_bigsur_irq(unsigned int irq)
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static void shutdown_bigsur_irq(unsigned int irq)
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{
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DPRINTK("shutdown_bigsur_irq IRQ %d\n", irq);
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pr_debug("shutdown_bigsur_irq IRQ %d\n", irq);
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if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH)
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disable_bigsur_l1irq(irq);
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else
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@ -260,7 +247,7 @@ static void make_bigsur_l1isr(unsigned int irq) {
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disable_bigsur_l1irq(irq);
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return;
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}
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DPRINTK("make_bigsur_l1isr: bad irq, %d\n", irq);
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pr_debug("make_bigsur_l1isr: bad irq, %d\n", irq);
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return;
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}
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@ -277,7 +264,7 @@ static void make_bigsur_l2isr(unsigned int irq) {
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disable_bigsur_l2irq(irq);
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return;
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}
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DPRINTK("make_bigsur_l2isr: bad irq, %d\n", irq);
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pr_debug("make_bigsur_l2isr: bad irq, %d\n", irq);
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return;
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}
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@ -10,7 +10,6 @@
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*/
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#include <linux/irq.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/dreamcast/sysasic.h>
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@ -57,29 +56,23 @@
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/* Disable the hardware event by masking its bit in its EMR */
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static inline void disable_systemasic_irq(unsigned int irq)
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{
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unsigned long flags;
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__u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2);
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__u32 mask;
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local_irq_save(flags);
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mask = inl(emr);
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mask &= ~(1 << EVENT_BIT(irq));
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outl(mask, emr);
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local_irq_restore(flags);
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}
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/* Enable the hardware event by setting its bit in its EMR */
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static inline void enable_systemasic_irq(unsigned int irq)
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{
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unsigned long flags;
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__u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2);
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__u32 mask;
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local_irq_save(flags);
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mask = inl(emr);
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mask |= (1 << EVENT_BIT(irq));
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outl(mask, emr);
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local_irq_restore(flags);
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}
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/* Acknowledge a hardware event by writing its bit back to its ESR */
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@ -39,30 +39,24 @@ static unsigned int startup_landisk_irq(unsigned int irq)
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static void disable_landisk_irq(unsigned int irq)
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{
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unsigned long flags;
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unsigned char val;
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unsigned char mask = 0xff ^ (0x01 << (irq - 5));
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/* Set the priority in IPR to 0 */
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local_irq_save(flags);
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val = ctrl_inb(PA_IMASK);
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val &= mask;
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ctrl_outb(val, PA_IMASK);
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local_irq_restore(flags);
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}
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static void enable_landisk_irq(unsigned int irq)
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{
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unsigned long flags;
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unsigned char val;
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unsigned char value = (0x01 << (irq - 5));
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/* Set priority in IPR back to original value */
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local_irq_save(flags);
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val = ctrl_inb(PA_IMASK);
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val |= value;
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ctrl_outb(val, PA_IMASK);
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local_irq_restore(flags);
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}
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static void ack_landisk_irq(unsigned int irq)
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@ -80,9 +80,6 @@ volatile unsigned long irq_err_count;
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static void disable_mpc1211_irq(unsigned int irq)
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{
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unsigned long flags;
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save_and_cli(flags);
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if( irq < 8) {
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m_irq_mask |= (1 << irq);
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outb(m_irq_mask,I8259_M_MR);
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@ -90,16 +87,11 @@ static void disable_mpc1211_irq(unsigned int irq)
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s_irq_mask |= (1 << (irq - 8));
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outb(s_irq_mask,I8259_S_MR);
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}
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restore_flags(flags);
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}
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static void enable_mpc1211_irq(unsigned int irq)
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{
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unsigned long flags;
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save_and_cli(flags);
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if( irq < 8) {
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m_irq_mask &= ~(1 << irq);
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outb(m_irq_mask,I8259_M_MR);
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@ -107,7 +99,6 @@ static void enable_mpc1211_irq(unsigned int irq)
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s_irq_mask &= ~(1 << (irq - 8));
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outb(s_irq_mask,I8259_S_MR);
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}
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restore_flags(flags);
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}
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static inline int mpc1211_irq_real(unsigned int irq)
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@ -131,10 +122,6 @@ static inline int mpc1211_irq_real(unsigned int irq)
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static void mask_and_ack_mpc1211(unsigned int irq)
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{
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unsigned long flags;
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save_and_cli(flags);
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if(irq < 8) {
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if(m_irq_mask & (1<<irq)){
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if(!mpc1211_irq_real(irq)){
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@ -162,7 +149,6 @@ static void mask_and_ack_mpc1211(unsigned int irq)
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outb(0x60+(irq-8),I8259_S_CR); /* EOI */
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outb(0x60+2,I8259_M_CR);
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}
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restore_flags(flags);
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}
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static void end_mpc1211_irq(unsigned int irq)
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@ -35,30 +35,24 @@ static unsigned int startup_hs7751rvoip_irq(unsigned int irq)
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static void disable_hs7751rvoip_irq(unsigned int irq)
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{
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unsigned long flags;
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unsigned short val;
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unsigned short mask = 0xffff ^ (0x0001 << mask_pos[irq]);
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/* Set the priority in IPR to 0 */
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local_irq_save(flags);
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val = ctrl_inw(IRLCNTR3);
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val &= mask;
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ctrl_outw(val, IRLCNTR3);
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local_irq_restore(flags);
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}
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static void enable_hs7751rvoip_irq(unsigned int irq)
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{
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unsigned long flags;
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unsigned short val;
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unsigned short value = (0x0001 << mask_pos[irq]);
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/* Set priority in IPR back to original value */
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local_irq_save(flags);
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val = ctrl_inw(IRLCNTR3);
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val |= value;
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ctrl_outw(val, IRLCNTR3);
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local_irq_restore(flags);
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}
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static void ack_hs7751rvoip_irq(unsigned int irq)
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@ -39,30 +39,24 @@ static unsigned int startup_r7780rp_irq(unsigned int irq)
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static void disable_r7780rp_irq(unsigned int irq)
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{
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unsigned long flags;
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unsigned short val;
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unsigned short mask = 0xffff ^ (0x0001 << mask_pos[irq]);
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/* Set the priority in IPR to 0 */
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local_irq_save(flags);
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val = ctrl_inw(IRLCNTR1);
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val &= mask;
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ctrl_outw(val, IRLCNTR1);
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local_irq_restore(flags);
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}
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static void enable_r7780rp_irq(unsigned int irq)
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{
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unsigned long flags;
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unsigned short val;
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unsigned short value = (0x0001 << mask_pos[irq]);
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/* Set priority in IPR back to original value */
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local_irq_save(flags);
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val = ctrl_inw(IRLCNTR1);
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val |= value;
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ctrl_outw(val, IRLCNTR1);
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local_irq_restore(flags);
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}
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static void ack_r7780rp_irq(unsigned int irq)
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@ -41,30 +41,24 @@ static unsigned int startup_rts7751r2d_irq(unsigned int irq)
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static void disable_rts7751r2d_irq(unsigned int irq)
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{
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unsigned long flags;
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unsigned short val;
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unsigned short mask = 0xffff ^ (0x0001 << mask_pos[irq]);
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/* Set the priority in IPR to 0 */
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local_irq_save(flags);
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val = ctrl_inw(IRLCNTR1);
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val &= mask;
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ctrl_outw(val, IRLCNTR1);
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local_irq_restore(flags);
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}
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static void enable_rts7751r2d_irq(unsigned int irq)
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{
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unsigned long flags;
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unsigned short val;
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unsigned short value = (0x0001 << mask_pos[irq]);
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/* Set priority in IPR back to original value */
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local_irq_save(flags);
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val = ctrl_inw(IRLCNTR1);
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val |= value;
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ctrl_outw(val, IRLCNTR1);
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local_irq_restore(flags);
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}
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int rts7751r2d_irq_demux(int irq)
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@ -57,12 +57,9 @@ static void shutdown_systemh_irq(unsigned int irq)
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static void disable_systemh_irq(unsigned int irq)
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{
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if (systemh_irq_mask_register) {
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unsigned long flags;
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unsigned long val, mask = 0x01 << 1;
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/* Clear the "irq"th bit in the mask and set it in the request */
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local_irq_save(flags);
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val = ctrl_inl((unsigned long)systemh_irq_mask_register);
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val &= ~mask;
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ctrl_outl(val, (unsigned long)systemh_irq_mask_register);
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@ -70,23 +67,18 @@ static void disable_systemh_irq(unsigned int irq)
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val = ctrl_inl((unsigned long)systemh_irq_request_register);
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val |= mask;
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ctrl_outl(val, (unsigned long)systemh_irq_request_register);
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local_irq_restore(flags);
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}
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}
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static void enable_systemh_irq(unsigned int irq)
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{
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if (systemh_irq_mask_register) {
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unsigned long flags;
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unsigned long val, mask = 0x01 << 1;
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/* Set "irq"th bit in the mask register */
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local_irq_save(flags);
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val = ctrl_inl((unsigned long)systemh_irq_mask_register);
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val |= mask;
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ctrl_outl(val, (unsigned long)systemh_irq_mask_register);
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local_irq_restore(flags);
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}
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}
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@ -11,14 +11,12 @@
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <asm/system.h>
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#include <asm/io.h>
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#include <asm/microdev.h>
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#define NUM_EXTERNAL_IRQS 16 /* IRL0 .. IRL15 */
|
||||
|
||||
|
||||
static const struct {
|
||||
unsigned char fpgaIrq;
|
||||
unsigned char mapped;
|
||||
@ -93,53 +91,42 @@ static struct hw_interrupt_type microdev_irq_type = {
|
||||
|
||||
static void disable_microdev_irq(unsigned int irq)
|
||||
{
|
||||
unsigned int flags;
|
||||
unsigned int fpgaIrq;
|
||||
|
||||
if (irq >= NUM_EXTERNAL_IRQS) return;
|
||||
if (!fpgaIrqTable[irq].mapped) return;
|
||||
if (irq >= NUM_EXTERNAL_IRQS)
|
||||
return;
|
||||
if (!fpgaIrqTable[irq].mapped)
|
||||
return;
|
||||
|
||||
fpgaIrq = fpgaIrqTable[irq].fpgaIrq;
|
||||
|
||||
/* disable interrupts */
|
||||
local_irq_save(flags);
|
||||
|
||||
/* disable interupts on the FPGA INTC register */
|
||||
/* disable interupts on the FPGA INTC register */
|
||||
ctrl_outl(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTDSB_REG);
|
||||
|
||||
/* restore interrupts */
|
||||
local_irq_restore(flags);
|
||||
}
|
||||
|
||||
static void enable_microdev_irq(unsigned int irq)
|
||||
{
|
||||
unsigned long priorityReg, priorities, pri;
|
||||
unsigned int flags;
|
||||
unsigned int fpgaIrq;
|
||||
|
||||
|
||||
if (irq >= NUM_EXTERNAL_IRQS) return;
|
||||
if (!fpgaIrqTable[irq].mapped) return;
|
||||
if (unlikely(irq >= NUM_EXTERNAL_IRQS))
|
||||
return;
|
||||
if (unlikely(!fpgaIrqTable[irq].mapped))
|
||||
return;
|
||||
|
||||
pri = 15 - irq;
|
||||
|
||||
fpgaIrq = fpgaIrqTable[irq].fpgaIrq;
|
||||
priorityReg = MICRODEV_FPGA_INTPRI_REG(fpgaIrq);
|
||||
|
||||
/* disable interrupts */
|
||||
local_irq_save(flags);
|
||||
|
||||
/* set priority for the interrupt */
|
||||
/* set priority for the interrupt */
|
||||
priorities = ctrl_inl(priorityReg);
|
||||
priorities &= ~MICRODEV_FPGA_INTPRI_MASK(fpgaIrq);
|
||||
priorities |= MICRODEV_FPGA_INTPRI_LEVEL(fpgaIrq, pri);
|
||||
ctrl_outl(priorities, priorityReg);
|
||||
|
||||
/* enable interupts on the FPGA INTC register */
|
||||
/* enable interupts on the FPGA INTC register */
|
||||
ctrl_outl(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTENB_REG);
|
||||
|
||||
/* restore interrupts */
|
||||
local_irq_restore(flags);
|
||||
}
|
||||
|
||||
/* This functions sets the desired irq handler to be a MicroDev type */
|
||||
@ -158,9 +145,7 @@ static void mask_and_ack_microdev(unsigned int irq)
|
||||
static void end_microdev_irq(unsigned int irq)
|
||||
{
|
||||
if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
|
||||
{
|
||||
enable_microdev_irq(irq);
|
||||
}
|
||||
}
|
||||
|
||||
extern void __init init_microdev_irq(void)
|
||||
@ -171,9 +156,7 @@ extern void __init init_microdev_irq(void)
|
||||
ctrl_outl(~0ul, MICRODEV_FPGA_INTDSB_REG);
|
||||
|
||||
for (i = 0; i < NUM_EXTERNAL_IRQS; i++)
|
||||
{
|
||||
make_microdev_irq(i);
|
||||
}
|
||||
}
|
||||
|
||||
extern void microdev_print_fpga_intc_status(void)
|
||||
|
@ -11,35 +11,28 @@
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/irq.h>
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/hd64461.h>
|
||||
|
||||
static void disable_hd64461_irq(unsigned int irq)
|
||||
{
|
||||
unsigned long flags;
|
||||
unsigned short nimr;
|
||||
unsigned short mask = 1 << (irq - HD64461_IRQBASE);
|
||||
|
||||
local_irq_save(flags);
|
||||
nimr = inw(HD64461_NIMR);
|
||||
nimr |= mask;
|
||||
outw(nimr, HD64461_NIMR);
|
||||
local_irq_restore(flags);
|
||||
}
|
||||
|
||||
static void enable_hd64461_irq(unsigned int irq)
|
||||
{
|
||||
unsigned long flags;
|
||||
unsigned short nimr;
|
||||
unsigned short mask = 1 << (irq - HD64461_IRQBASE);
|
||||
|
||||
local_irq_save(flags);
|
||||
nimr = inw(HD64461_NIMR);
|
||||
nimr &= ~mask;
|
||||
outw(nimr, HD64461_NIMR);
|
||||
local_irq_restore(flags);
|
||||
}
|
||||
|
||||
static void mask_and_ack_hd64461(unsigned int irq)
|
||||
|
@ -25,31 +25,25 @@
|
||||
|
||||
static void disable_hd64465_irq(unsigned int irq)
|
||||
{
|
||||
unsigned long flags;
|
||||
unsigned short nimr;
|
||||
unsigned short mask = 1 << (irq - HD64465_IRQ_BASE);
|
||||
|
||||
pr_debug("disable_hd64465_irq(%d): mask=%x\n", irq, mask);
|
||||
local_irq_save(flags);
|
||||
nimr = inw(HD64465_REG_NIMR);
|
||||
nimr |= mask;
|
||||
outw(nimr, HD64465_REG_NIMR);
|
||||
local_irq_restore(flags);
|
||||
}
|
||||
|
||||
|
||||
static void enable_hd64465_irq(unsigned int irq)
|
||||
{
|
||||
unsigned long flags;
|
||||
unsigned short nimr;
|
||||
unsigned short mask = 1 << (irq - HD64465_IRQ_BASE);
|
||||
|
||||
pr_debug("enable_hd64465_irq(%d): mask=%x\n", irq, mask);
|
||||
local_irq_save(flags);
|
||||
nimr = inw(HD64465_REG_NIMR);
|
||||
nimr &= ~mask;
|
||||
outw(nimr, HD64465_REG_NIMR);
|
||||
local_irq_restore(flags);
|
||||
}
|
||||
|
||||
|
||||
|
@ -36,32 +36,26 @@
|
||||
|
||||
static void disable_voyagergx_irq(unsigned int irq)
|
||||
{
|
||||
unsigned long flags, val;
|
||||
unsigned long mask = 1 << (irq - VOYAGER_IRQ_BASE);
|
||||
unsigned long val;
|
||||
unsigned long mask = 1 << (irq - VOYAGER_IRQ_BASE);
|
||||
|
||||
pr_debug("disable_voyagergx_irq(%d): mask=%x\n", irq, mask);
|
||||
local_irq_save(flags);
|
||||
val = inl(VOYAGER_INT_MASK);
|
||||
val &= ~mask;
|
||||
outl(val, VOYAGER_INT_MASK);
|
||||
local_irq_restore(flags);
|
||||
}
|
||||
|
||||
|
||||
static void enable_voyagergx_irq(unsigned int irq)
|
||||
{
|
||||
unsigned long flags, val;
|
||||
unsigned long mask = 1 << (irq - VOYAGER_IRQ_BASE);
|
||||
unsigned long val;
|
||||
unsigned long mask = 1 << (irq - VOYAGER_IRQ_BASE);
|
||||
|
||||
pr_debug("disable_voyagergx_irq(%d): mask=%x\n", irq, mask);
|
||||
local_irq_save(flags);
|
||||
val = inl(VOYAGER_INT_MASK);
|
||||
val |= mask;
|
||||
outl(val, VOYAGER_INT_MASK);
|
||||
local_irq_restore(flags);
|
||||
}
|
||||
|
||||
|
||||
static void mask_and_ack_voyagergx(unsigned int irq)
|
||||
{
|
||||
disable_voyagergx_irq(irq);
|
||||
@ -94,7 +88,8 @@ static struct hw_interrupt_type voyagergx_irq_type = {
|
||||
.end = end_voyagergx_irq,
|
||||
};
|
||||
|
||||
static irqreturn_t voyagergx_interrupt(int irq, void *dev_id, struct pt_regs *regs)
|
||||
static irqreturn_t voyagergx_interrupt(int irq, void *dev_id,
|
||||
struct pt_regs *regs)
|
||||
{
|
||||
printk(KERN_INFO
|
||||
"VoyagerGX: spurious interrupt, status: 0x%x\n",
|
||||
@ -102,9 +97,6 @@ static irqreturn_t voyagergx_interrupt(int irq, void *dev_id, struct pt_regs *re
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
|
||||
/*====================================================*/
|
||||
|
||||
static struct {
|
||||
int (*func)(int, void *);
|
||||
void *dev;
|
||||
|
@ -57,31 +57,27 @@ static struct hw_interrupt_type ipr_irq_type = {
|
||||
|
||||
static void disable_ipr_irq(unsigned int irq)
|
||||
{
|
||||
unsigned long val, flags;
|
||||
unsigned long val;
|
||||
unsigned int addr = ipr_data[irq].addr;
|
||||
unsigned short mask = 0xffff ^ (0x0f << ipr_data[irq].shift);
|
||||
|
||||
/* Set the priority in IPR to 0 */
|
||||
local_irq_save(flags);
|
||||
val = ctrl_inw(addr);
|
||||
val &= mask;
|
||||
ctrl_outw(val, addr);
|
||||
local_irq_restore(flags);
|
||||
}
|
||||
|
||||
static void enable_ipr_irq(unsigned int irq)
|
||||
{
|
||||
unsigned long val, flags;
|
||||
unsigned long val;
|
||||
unsigned int addr = ipr_data[irq].addr;
|
||||
int priority = ipr_data[irq].priority;
|
||||
unsigned short value = (priority << ipr_data[irq].shift);
|
||||
|
||||
/* Set priority in IPR back to original value */
|
||||
local_irq_save(flags);
|
||||
val = ctrl_inw(addr);
|
||||
val |= value;
|
||||
ctrl_outw(val, addr);
|
||||
local_irq_restore(flags);
|
||||
}
|
||||
|
||||
static void mask_and_ack_ipr(unsigned int irq)
|
||||
|
@ -52,32 +52,26 @@ static void shutdown_maskreg_irq(unsigned int irq)
|
||||
|
||||
static void disable_maskreg_irq(unsigned int irq)
|
||||
{
|
||||
unsigned long flags;
|
||||
unsigned short val, mask = 0x01 << irq;
|
||||
|
||||
BUG_ON(!irq_mask_register);
|
||||
|
||||
/* Set "irq"th bit */
|
||||
local_irq_save(flags);
|
||||
val = ctrl_inw(irq_mask_register);
|
||||
val |= mask;
|
||||
ctrl_outw(val, irq_mask_register);
|
||||
local_irq_restore(flags);
|
||||
}
|
||||
|
||||
static void enable_maskreg_irq(unsigned int irq)
|
||||
{
|
||||
unsigned long flags;
|
||||
unsigned short val, mask = ~(0x01 << irq);
|
||||
|
||||
BUG_ON(!irq_mask_register);
|
||||
|
||||
/* Clear "irq"th bit */
|
||||
local_irq_save(flags);
|
||||
val = ctrl_inw(irq_mask_register);
|
||||
val &= mask;
|
||||
ctrl_outw(val, irq_mask_register);
|
||||
local_irq_restore(flags);
|
||||
}
|
||||
|
||||
static void mask_and_ack_maskreg(unsigned int irq)
|
||||
|
@ -48,26 +48,22 @@ static struct hw_interrupt_type pint_irq_type = {
|
||||
|
||||
static void disable_pint_irq(unsigned int irq)
|
||||
{
|
||||
unsigned long val, flags;
|
||||
unsigned long val;
|
||||
|
||||
local_irq_save(flags);
|
||||
val = ctrl_inw(INTC_INTER);
|
||||
val &= ~(1 << (irq - PINT_IRQ_BASE));
|
||||
ctrl_outw(val, INTC_INTER); /* disable PINTn */
|
||||
portcr_mask &= ~(3 << (irq - PINT_IRQ_BASE)*2);
|
||||
local_irq_restore(flags);
|
||||
}
|
||||
|
||||
static void enable_pint_irq(unsigned int irq)
|
||||
{
|
||||
unsigned long val, flags;
|
||||
unsigned long val;
|
||||
|
||||
local_irq_save(flags);
|
||||
val = ctrl_inw(INTC_INTER);
|
||||
val |= 1 << (irq - PINT_IRQ_BASE);
|
||||
ctrl_outw(val, INTC_INTER); /* enable PINTn */
|
||||
portcr_mask |= 3 << (irq - PINT_IRQ_BASE)*2;
|
||||
local_irq_restore(flags);
|
||||
}
|
||||
|
||||
static void mask_and_ack_pint(unsigned int irq)
|
||||
|
Loading…
Reference in New Issue
Block a user