From 8570043e2cc659f375336fb8141917ca1b050234 Mon Sep 17 00:00:00 2001 From: Esben Haabendal Date: Wed, 20 Jun 2018 09:34:36 +0200 Subject: [PATCH] spi: spi-fsl-dspi: Fixup regmap configuration MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Mark volatile registers to avoid caching bugs. Note: SPI_MCR is marked volatile because of CLR_TXF and CLR_RXF bits. Signed-off-by: Esben Haabendal Acked-by: Martin Hundebøll Signed-off-by: Mark Brown --- drivers/spi/spi-fsl-dspi.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c index 0630962ce442..1c1070114246 100644 --- a/drivers/spi/spi-fsl-dspi.c +++ b/drivers/spi/spi-fsl-dspi.c @@ -943,11 +943,23 @@ static int dspi_resume(struct device *dev) static SIMPLE_DEV_PM_OPS(dspi_pm, dspi_suspend, dspi_resume); +static const struct regmap_range dspi_volatile_ranges[] = { + regmap_reg_range(SPI_MCR, SPI_TCR), + regmap_reg_range(SPI_SR, SPI_SR), + regmap_reg_range(SPI_PUSHR, SPI_RXFR3), +}; + +static const struct regmap_access_table dspi_volatile_table = { + .yes_ranges = dspi_volatile_ranges, + .n_yes_ranges = ARRAY_SIZE(dspi_volatile_ranges), +}; + static const struct regmap_config dspi_regmap_config = { .reg_bits = 32, .val_bits = 32, .reg_stride = 4, .max_register = 0x88, + .volatile_table = &dspi_volatile_table, }; static void dspi_init(struct fsl_dspi *dspi)