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powerpc/security: Add a security feature for STF barrier
Rather than tying this mitigation to RFI L1D flush requirement, add a new bit for it. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20210503130243.891868-3-npiggin@gmail.com
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@ -92,6 +92,9 @@ static inline bool security_ftr_enabled(u64 feature)
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// The L1-D cache should be flushed after user accesses from the kernel
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#define SEC_FTR_L1D_FLUSH_UACCESS 0x0000000000008000ull
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// The STF flush should be executed on privilege state switch
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#define SEC_FTR_STF_BARRIER 0x0000000000010000ull
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// Features enabled by default
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#define SEC_FTR_DEFAULT \
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(SEC_FTR_L1D_FLUSH_HV | \
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@ -99,6 +102,7 @@ static inline bool security_ftr_enabled(u64 feature)
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SEC_FTR_BNDS_CHK_SPEC_BAR | \
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SEC_FTR_L1D_FLUSH_ENTRY | \
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SEC_FTR_L1D_FLUSH_UACCESS | \
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SEC_FTR_STF_BARRIER | \
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SEC_FTR_FAVOUR_SECURITY)
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#endif /* _ASM_POWERPC_SECURITY_FEATURES_H */
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@ -300,9 +300,7 @@ static void stf_barrier_enable(bool enable)
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void setup_stf_barrier(void)
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{
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enum stf_barrier_type type;
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bool enable, hv;
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hv = cpu_has_feature(CPU_FTR_HVMODE);
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bool enable;
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/* Default to fallback in case fw-features are not available */
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if (cpu_has_feature(CPU_FTR_ARCH_300))
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@ -315,8 +313,7 @@ void setup_stf_barrier(void)
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type = STF_BARRIER_NONE;
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enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) &&
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(security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR) ||
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(security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV) && hv));
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security_ftr_enabled(SEC_FTR_STF_BARRIER);
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if (type == STF_BARRIER_FALLBACK) {
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pr_info("stf-barrier: fallback barrier available\n");
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