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ath9k_hw: prevent reset control register zeroing on AR9003 reset

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Also, no need for the udelay(2) on AR9003 hardware.

Signed-off-by: Senthil Balasubramanian <senthilkumar@atheros.com>
Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Senthil Balasubramanian 2010-04-15 17:38:30 -04:00 committed by John W. Linville
parent 1f3f061840
commit 84e2169b0f
1 changed files with 4 additions and 2 deletions
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6
drivers/net/wireless/ath/ath9k/hw.c
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@ -1385,9 +1385,11 @@ static bool ath9k_hw_set_reset_power_on(struct ath_hw *ah)
REG_WRITE(ah, AR_RC, AR_RC_AHB);
REG_WRITE(ah, AR_RTC_RESET, 0);
udelay(2);
if (!AR_SREV_9100(ah))
if (!AR_SREV_9300_20_OR_LATER(ah))
udelay(2);
if (!AR_SREV_9100(ah) && !AR_SREV_9300_20_OR_LATER(ah))
REG_WRITE(ah, AR_RC, 0);
REG_WRITE(ah, AR_RTC_RESET, 1);