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arm64: Use 42-bit address space with 64K pages
This patch expands the VA_BITS to 42 when the 64K page configuration is enabled allowing 2TB kernel linear mapping. Linux still uses 2 levels of page tables in this configuration with pgd now being a full page. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Will Deacon <will.deacon@arm.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com>
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@ -21,7 +21,7 @@ The swapper_pgd_dir address is written to TTBR1 and never written to
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TTBR0.
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TTBR0.
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AArch64 Linux memory layout:
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AArch64 Linux memory layout with 4KB pages:
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Start End Size Use
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Start End Size Use
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-----------------------------------------------------------------------
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-----------------------------------------------------------------------
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@ -46,6 +46,31 @@ ffffffbffc000000 ffffffbfffffffff 64MB modules
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ffffffc000000000 ffffffffffffffff 256GB kernel logical memory map
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ffffffc000000000 ffffffffffffffff 256GB kernel logical memory map
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AArch64 Linux memory layout with 64KB pages:
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Start End Size Use
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-----------------------------------------------------------------------
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0000000000000000 000003ffffffffff 4TB user
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fffffc0000000000 fffffdfbfffeffff ~2TB vmalloc
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fffffdfbffff0000 fffffdfbffffffff 64KB [guard page]
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fffffdfc00000000 fffffdfdffffffff 8GB vmemmap
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fffffdfe00000000 fffffdfffbbfffff ~8GB [guard, future vmmemap]
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fffffdfffbc00000 fffffdfffbdfffff 2MB earlyprintk device
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fffffdfffbe00000 fffffdfffbe0ffff 64KB PCI I/O space
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fffffdfffbe10000 fffffdfffbffffff ~2MB [guard]
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fffffdfffc000000 fffffdffffffffff 64MB modules
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fffffe0000000000 ffffffffffffffff 2TB kernel logical memory map
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Translation table lookup with 4KB pages:
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Translation table lookup with 4KB pages:
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+--------+--------+--------+--------+--------+--------+--------+--------+
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+--------+--------+--------+--------+--------+--------+--------+--------+
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@ -33,18 +33,23 @@
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#define UL(x) _AC(x, UL)
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#define UL(x) _AC(x, UL)
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/*
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/*
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* PAGE_OFFSET - the virtual address of the start of the kernel image.
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* PAGE_OFFSET - the virtual address of the start of the kernel image (top
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* (VA_BITS - 1))
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* VA_BITS - the maximum number of bits for virtual addresses.
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* VA_BITS - the maximum number of bits for virtual addresses.
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* TASK_SIZE - the maximum size of a user space task.
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* TASK_SIZE - the maximum size of a user space task.
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* TASK_UNMAPPED_BASE - the lower boundary of the mmap VM area.
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* TASK_UNMAPPED_BASE - the lower boundary of the mmap VM area.
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* The module space lives between the addresses given by TASK_SIZE
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* The module space lives between the addresses given by TASK_SIZE
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* and PAGE_OFFSET - it must be within 128MB of the kernel text.
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* and PAGE_OFFSET - it must be within 128MB of the kernel text.
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*/
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*/
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#define PAGE_OFFSET UL(0xffffffc000000000)
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#ifdef CONFIG_ARM64_64K_PAGES
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#define VA_BITS (42)
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#else
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#define VA_BITS (39)
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#endif
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#define PAGE_OFFSET (UL(0xffffffffffffffff) << (VA_BITS - 1))
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#define MODULES_END (PAGE_OFFSET)
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#define MODULES_END (PAGE_OFFSET)
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#define MODULES_VADDR (MODULES_END - SZ_64M)
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#define MODULES_VADDR (MODULES_END - SZ_64M)
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#define EARLYCON_IOBASE (MODULES_VADDR - SZ_4M)
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#define EARLYCON_IOBASE (MODULES_VADDR - SZ_4M)
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#define VA_BITS (39)
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#define TASK_SIZE_64 (UL(1) << VA_BITS)
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#define TASK_SIZE_64 (UL(1) << VA_BITS)
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#ifdef CONFIG_COMPAT
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#ifdef CONFIG_COMPAT
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@ -21,10 +21,10 @@
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* 8192 entries of 8 bytes each, occupying a 64KB page. Levels 0 and 1 are not
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* 8192 entries of 8 bytes each, occupying a 64KB page. Levels 0 and 1 are not
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* used. The 2nd level table (PGD for Linux) can cover a range of 4TB, each
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* used. The 2nd level table (PGD for Linux) can cover a range of 4TB, each
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* entry representing 512MB. The user and kernel address spaces are limited to
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* entry representing 512MB. The user and kernel address spaces are limited to
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* 512GB and therefore we only use 1024 entries in the PGD.
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* 4TB in the 64KB page configuration.
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*/
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*/
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#define PTRS_PER_PTE 8192
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#define PTRS_PER_PTE 8192
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#define PTRS_PER_PGD 1024
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#define PTRS_PER_PGD 8192
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/*
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/*
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* PGDIR_SHIFT determines the size a top-level page table entry can map.
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* PGDIR_SHIFT determines the size a top-level page table entry can map.
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@ -33,7 +33,7 @@
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/*
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/*
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* VMALLOC and SPARSEMEM_VMEMMAP ranges.
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* VMALLOC and SPARSEMEM_VMEMMAP ranges.
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*/
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*/
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#define VMALLOC_START UL(0xffffff8000000000)
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#define VMALLOC_START (UL(0xffffffffffffffff) << VA_BITS)
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#define VMALLOC_END (PAGE_OFFSET - UL(0x400000000) - SZ_64K)
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#define VMALLOC_END (PAGE_OFFSET - UL(0x400000000) - SZ_64K)
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#define vmemmap ((struct page *)(VMALLOC_END + SZ_64K))
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#define vmemmap ((struct page *)(VMALLOC_END + SZ_64K))
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