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parisc architecture fixes and enhancements for kernel v6.6-rc2:
* fix reference to exported symbols for parisc64 [Masahiro Yamada] * Block-TLB (BTLB) support on 32-bit CPUs * sparse and build-warning fixes -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQS86RI+GtKfB8BJu973ErUQojoPXwUCZQDAAwAKCRD3ErUQojoP X5wDAP4jxLxuVnUCpV5hUdFoJC5lkRM2LigbWDSfDQGHaycr0QD+NerBYX8Ejo6n x0zHqqtBBe1fgU0QfRdwHeE7hlOiigI= =FDci -----END PGP SIGNATURE----- Merge tag 'parisc-for-6.6-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux Pull parisc architecture fixes from Helge Deller: - fix reference to exported symbols for parisc64 [Masahiro Yamada] - Block-TLB (BTLB) support on 32-bit CPUs - sparse and build-warning fixes * tag 'parisc-for-6.6-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux: linux/export: fix reference to exported functions for parisc64 parisc: BTLB: Initialize BTLB tables at CPU startup parisc: firmware: Simplify calling non-PA20 functions parisc: BTLB: _edata symbol has to be page aligned for BTLB support parisc: BTLB: Add BTLB insert and purge firmware function wrappers parisc: BTLB: Clear possibly existing BTLB entries parisc: Prepare for Block-TLB support on 32-bit kernel parisc: shmparam.h: Document aliasing requirements of PA-RISC parisc: irq: Make irq_stack_union static to avoid sparse warning parisc: drivers: Fix sparse warning parisc: iosapic.c: Fix sparse warnings parisc: ccio-dma: Fix sparse warnings parisc: sba-iommu: Fix sparse warnigs parisc: sba: Fix compile warning wrt list of SBA devices parisc: sba_iommu: Fix build warning if procfs if disabled
This commit is contained in:
Linus Torvalds
commit
847165d7c8
@ -37,6 +37,7 @@ extern int split_tlb;
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extern int dcache_stride;
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extern int icache_stride;
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extern struct pdc_cache_info cache_info;
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extern struct pdc_btlb_info btlb_info;
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void parisc_setup_cache_timing(void);
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#define pdtlb(sr, addr) asm volatile("pdtlb 0(%%sr%0,%1)" \
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@ -1,8 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef ASM_PARISC_MCKINLEY_H
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#define ASM_PARISC_MCKINLEY_H
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/* declared in arch/parisc/kernel/setup.c */
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extern struct proc_dir_entry * proc_mckinley_root;
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#endif /*ASM_PARISC_MCKINLEY_H*/
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@ -44,10 +44,11 @@ int pdc_model_capabilities(unsigned long *capabilities);
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int pdc_model_platform_info(char *orig_prod_num, char *current_prod_num, char *serial_no);
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int pdc_cache_info(struct pdc_cache_info *cache);
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int pdc_spaceid_bits(unsigned long *space_bits);
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#ifndef CONFIG_PA20
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int pdc_btlb_info(struct pdc_btlb_info *btlb);
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int pdc_btlb_insert(unsigned long long vpage, unsigned long physpage, unsigned long len,
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unsigned long entry_info, unsigned long slot);
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int pdc_btlb_purge_all(void);
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int pdc_mem_map_hpa(struct pdc_memory_map *r_addr, struct pdc_module_path *mod_path);
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#endif /* !CONFIG_PA20 */
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int pdc_pim_toc11(struct pdc_toc_pim_11 *ret);
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int pdc_pim_toc20(struct pdc_toc_pim_20 *ret);
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int pdc_lan_station_id(char *lan_addr, unsigned long net_hpa);
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@ -310,6 +310,7 @@ extern void do_syscall_trace_exit(struct pt_regs *);
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struct seq_file;
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extern void early_trap_init(void);
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extern void collect_boot_cpu_data(void);
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extern void btlb_init_per_cpu(void);
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extern int show_cpuinfo (struct seq_file *m, void *v);
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/* driver code in driver/parisc */
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@ -29,7 +29,7 @@
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struct ioc {
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void __iomem *ioc_hpa; /* I/O MMU base address */
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char *res_map; /* resource map, bit == pdir entry */
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u64 *pdir_base; /* physical base address */
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__le64 *pdir_base; /* physical base address */
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unsigned long ibase; /* pdir IOV Space base - shared w/lba_pci */
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unsigned long imask; /* pdir IOV Space mask - shared w/lba_pci */
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#ifdef ZX1_SUPPORT
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@ -86,6 +86,9 @@ struct sba_device {
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struct ioc ioc[MAX_IOC];
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};
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/* list of SBA's in system, see drivers/parisc/sba_iommu.c */
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extern struct sba_device *sba_list;
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#define ASTRO_RUNWAY_PORT 0x582
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#define IKE_MERCED_PORT 0x803
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#define REO_MERCED_PORT 0x804
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@ -110,7 +113,7 @@ static inline int IS_PLUTO(struct parisc_device *d) {
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#define SBA_PDIR_VALID_BIT 0x8000000000000000ULL
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#define SBA_AGPGART_COOKIE 0x0000badbadc0ffeeULL
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#define SBA_AGPGART_COOKIE (__force __le64) 0x0000badbadc0ffeeULL
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#define SBA_FUNC_ID 0x0000 /* function id */
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#define SBA_FCLASS 0x0008 /* function class, bist, header, rev... */
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@ -2,6 +2,21 @@
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#ifndef _ASMPARISC_SHMPARAM_H
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#define _ASMPARISC_SHMPARAM_H
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/*
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* PA-RISC uses virtually indexed & physically tagged (VIPT) caches
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* which has strict requirements when two pages to the same physical
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* address are accessed through different mappings. Read the section
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* "Address Aliasing" in the arch docs for more detail:
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* PA-RISC 1.1 (page 3-6):
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* https://parisc.wiki.kernel.org/images-parisc/6/68/Pa11_acd.pdf
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* PA-RISC 2.0 (page F-5):
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* https://parisc.wiki.kernel.org/images-parisc/7/73/Parisc2.0.pdf
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*
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* For Linux we allow kernel and userspace to map pages on page size
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* granularity (SHMLBA) but have to ensure that, if two pages are
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* mapped to the same physical address, the virtual and physical
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* addresses modulo SHM_COLOUR are identical.
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*/
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#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */
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#define SHM_COLOUR 0x00400000 /* shared mappings colouring */
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@ -275,6 +275,8 @@ int main(void)
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* and kernel data on physical huge pages */
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#ifdef CONFIG_HUGETLB_PAGE
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DEFINE(HUGEPAGE_SIZE, 1UL << REAL_HPAGE_SHIFT);
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#elif !defined(CONFIG_64BIT)
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DEFINE(HUGEPAGE_SIZE, 4*1024*1024);
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#else
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DEFINE(HUGEPAGE_SIZE, PAGE_SIZE);
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#endif
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@ -58,7 +58,7 @@ int pa_serialize_tlb_flushes __ro_after_init;
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struct pdc_cache_info cache_info __ro_after_init;
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#ifndef CONFIG_PA20
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static struct pdc_btlb_info btlb_info __ro_after_init;
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struct pdc_btlb_info btlb_info __ro_after_init;
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#endif
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DEFINE_STATIC_KEY_TRUE(parisc_has_cache);
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@ -264,12 +264,6 @@ parisc_cache_init(void)
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icache_stride = CAFL_STRIDE(cache_info.ic_conf);
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#undef CAFL_STRIDE
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#ifndef CONFIG_PA20
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if (pdc_btlb_info(&btlb_info) < 0) {
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memset(&btlb_info, 0, sizeof btlb_info);
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}
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#endif
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if ((boot_cpu_data.pdc.capabilities & PDC_MODEL_NVA_MASK) ==
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PDC_MODEL_NVA_UNSUPPORTED) {
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printk(KERN_WARNING "parisc_cache_init: Only equivalent aliasing supported!\n");
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@ -925,9 +925,9 @@ static __init void qemu_header(void)
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pr_info("#define PARISC_MODEL \"%s\"\n\n",
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boot_cpu_data.pdc.sys_model_name);
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#define p ((unsigned long *)&boot_cpu_data.pdc.model)
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pr_info("#define PARISC_PDC_MODEL 0x%lx, 0x%lx, 0x%lx, "
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"0x%lx, 0x%lx, 0x%lx, 0x%lx, 0x%lx, 0x%lx\n\n",
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#define p ((unsigned long *)&boot_cpu_data.pdc.model)
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p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7], p[8]);
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#undef p
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@ -687,7 +687,6 @@ int pdc_spaceid_bits(unsigned long *space_bits)
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return retval;
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}
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#ifndef CONFIG_PA20
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/**
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* pdc_btlb_info - Return block TLB information.
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* @btlb: The return buffer.
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@ -696,18 +695,51 @@ int pdc_spaceid_bits(unsigned long *space_bits)
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*/
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int pdc_btlb_info(struct pdc_btlb_info *btlb)
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{
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int retval;
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int retval;
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unsigned long flags;
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spin_lock_irqsave(&pdc_lock, flags);
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retval = mem_pdc_call(PDC_BLOCK_TLB, PDC_BTLB_INFO, __pa(pdc_result), 0);
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memcpy(btlb, pdc_result, sizeof(*btlb));
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spin_unlock_irqrestore(&pdc_lock, flags);
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if (IS_ENABLED(CONFIG_PA20))
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return PDC_BAD_PROC;
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if(retval < 0) {
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btlb->max_size = 0;
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}
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return retval;
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spin_lock_irqsave(&pdc_lock, flags);
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retval = mem_pdc_call(PDC_BLOCK_TLB, PDC_BTLB_INFO, __pa(pdc_result), 0);
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memcpy(btlb, pdc_result, sizeof(*btlb));
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spin_unlock_irqrestore(&pdc_lock, flags);
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if(retval < 0) {
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btlb->max_size = 0;
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}
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return retval;
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}
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int pdc_btlb_insert(unsigned long long vpage, unsigned long physpage, unsigned long len,
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unsigned long entry_info, unsigned long slot)
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{
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int retval;
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unsigned long flags;
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if (IS_ENABLED(CONFIG_PA20))
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return PDC_BAD_PROC;
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spin_lock_irqsave(&pdc_lock, flags);
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retval = mem_pdc_call(PDC_BLOCK_TLB, PDC_BTLB_INSERT, (unsigned long) (vpage >> 32),
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(unsigned long) vpage, physpage, len, entry_info, slot);
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spin_unlock_irqrestore(&pdc_lock, flags);
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return retval;
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}
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int pdc_btlb_purge_all(void)
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{
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int retval;
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unsigned long flags;
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if (IS_ENABLED(CONFIG_PA20))
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return PDC_BAD_PROC;
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spin_lock_irqsave(&pdc_lock, flags);
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retval = mem_pdc_call(PDC_BLOCK_TLB, PDC_BTLB_PURGE_ALL);
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spin_unlock_irqrestore(&pdc_lock, flags);
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return retval;
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}
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/**
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@ -728,6 +760,9 @@ int pdc_mem_map_hpa(struct pdc_memory_map *address,
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int retval;
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unsigned long flags;
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if (IS_ENABLED(CONFIG_PA20))
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return PDC_BAD_PROC;
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spin_lock_irqsave(&pdc_lock, flags);
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memcpy(pdc_result2, mod_path, sizeof(*mod_path));
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retval = mem_pdc_call(PDC_MEM_MAP, PDC_MEM_MAP_HPA, __pa(pdc_result),
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@ -737,7 +772,6 @@ int pdc_mem_map_hpa(struct pdc_memory_map *address,
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return retval;
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}
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#endif /* !CONFIG_PA20 */
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/**
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* pdc_lan_station_id - Get the LAN address.
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@ -180,10 +180,10 @@ $pgt_fill_loop:
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std %dp,0x18(%r10)
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#endif
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#ifdef CONFIG_64BIT
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/* Get PDCE_PROC for monarch CPU. */
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#define MEM_PDC_LO 0x388
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#define MEM_PDC_HI 0x35C
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#ifdef CONFIG_64BIT
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/* Get PDCE_PROC for monarch CPU. */
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ldw MEM_PDC_LO(%r0),%r3
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ldw MEM_PDC_HI(%r0),%r10
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depd %r10, 31, 32, %r3 /* move to upper word */
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@ -270,6 +270,16 @@ stext_pdc_ret:
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mtctl %r6,%cr30 /* restore task thread info */
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#endif
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#ifndef CONFIG_64BIT
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/* clear all BTLBs */
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ldi PDC_BLOCK_TLB,%arg0
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load32 PA(stext_pdc_btlb_ret), %rp
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ldw MEM_PDC_LO(%r0),%r3
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bv (%r3)
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ldi PDC_BTLB_PURGE_ALL,%arg1
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stext_pdc_btlb_ret:
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#endif
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/* PARANOID: clear user scratch/user space SR's */
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mtsp %r0,%sr0
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mtsp %r0,%sr1
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@ -365,7 +365,7 @@ union irq_stack_union {
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volatile unsigned int lock[1];
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};
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DEFINE_PER_CPU(union irq_stack_union, irq_stack_union) = {
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static DEFINE_PER_CPU(union irq_stack_union, irq_stack_union) = {
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.slock = { 1,1,1,1 },
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};
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#endif
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@ -368,6 +368,8 @@ int init_per_cpu(int cpunum)
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/* FUTURE: Enable Performance Monitor : ccr bit 0x20 */
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init_percpu_prof(cpunum);
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btlb_init_per_cpu();
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return ret;
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}
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@ -154,6 +154,7 @@ SECTIONS
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}
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/* End of data section */
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. = ALIGN(PAGE_SIZE);
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_edata = .;
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/* BSS */
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@ -32,6 +32,7 @@
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#include <asm/sections.h>
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#include <asm/msgbuf.h>
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#include <asm/sparsemem.h>
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#include <asm/asm-offsets.h>
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extern int data_start;
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extern void parisc_kernel_start(void); /* Kernel entry point in head.S */
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@ -720,6 +721,77 @@ void __init paging_init(void)
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parisc_bootmem_free();
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}
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static void alloc_btlb(unsigned long start, unsigned long end, int *slot,
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unsigned long entry_info)
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{
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const int slot_max = btlb_info.fixed_range_info.num_comb;
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int min_num_pages = btlb_info.min_size;
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unsigned long size;
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/* map at minimum 4 pages */
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if (min_num_pages < 4)
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min_num_pages = 4;
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size = HUGEPAGE_SIZE;
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while (start < end && *slot < slot_max && size >= PAGE_SIZE) {
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/* starting address must have same alignment as size! */
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/* if correctly aligned and fits in double size, increase */
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if (((start & (2 * size - 1)) == 0) &&
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(end - start) >= (2 * size)) {
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size <<= 1;
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continue;
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}
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/* if current size alignment is too big, try smaller size */
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if ((start & (size - 1)) != 0) {
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size >>= 1;
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continue;
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}
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if ((end - start) >= size) {
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if ((size >> PAGE_SHIFT) >= min_num_pages)
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pdc_btlb_insert(start >> PAGE_SHIFT, __pa(start) >> PAGE_SHIFT,
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size >> PAGE_SHIFT, entry_info, *slot);
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(*slot)++;
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start += size;
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continue;
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}
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size /= 2;
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continue;
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}
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}
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void btlb_init_per_cpu(void)
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{
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unsigned long s, t, e;
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int slot;
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/* BTLBs are not available on 64-bit CPUs */
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if (IS_ENABLED(CONFIG_PA20))
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return;
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else if (pdc_btlb_info(&btlb_info) < 0) {
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memset(&btlb_info, 0, sizeof btlb_info);
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}
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/* insert BLTLBs for code and data segments */
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s = (uintptr_t) dereference_function_descriptor(&_stext);
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e = (uintptr_t) dereference_function_descriptor(&_etext);
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t = (uintptr_t) dereference_function_descriptor(&_sdata);
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BUG_ON(t != e);
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/* code segments */
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slot = 0;
|
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alloc_btlb(s, e, &slot, 0x13800000);
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|
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/* sanity check */
|
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t = (uintptr_t) dereference_function_descriptor(&_edata);
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e = (uintptr_t) dereference_function_descriptor(&__bss_start);
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BUG_ON(t != e);
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/* data segments */
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s = (uintptr_t) dereference_function_descriptor(&_sdata);
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e = (uintptr_t) dereference_function_descriptor(&__bss_stop);
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alloc_btlb(s, e, &slot, 0x11800000);
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}
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#ifdef CONFIG_PA20
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/*
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|
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@ -394,8 +394,6 @@ find_quicksilver(struct device *dev, void *data)
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static int __init
|
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parisc_agp_init(void)
|
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{
|
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extern struct sba_device *sba_list;
|
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|
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int err = -1;
|
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struct parisc_device *sba = NULL, *lba = NULL;
|
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struct lba_device *lbadev = NULL;
|
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|
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@ -214,7 +214,7 @@ struct ioa_registers {
|
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struct ioc {
|
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struct ioa_registers __iomem *ioc_regs; /* I/O MMU base address */
|
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u8 *res_map; /* resource map, bit == pdir entry */
|
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u64 *pdir_base; /* physical base address */
|
||||
__le64 *pdir_base; /* physical base address */
|
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u32 pdir_size; /* bytes, function of IOV Space size */
|
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u32 res_hint; /* next available IOVP -
|
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circular search */
|
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@ -339,7 +339,7 @@ ccio_alloc_range(struct ioc *ioc, struct device *dev, size_t size)
|
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BUG_ON(pages_needed == 0);
|
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BUG_ON((pages_needed * IOVP_SIZE) > DMA_CHUNK_SIZE);
|
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|
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DBG_RES("%s() size: %d pages_needed %d\n",
|
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DBG_RES("%s() size: %zu pages_needed %d\n",
|
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__func__, size, pages_needed);
|
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|
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/*
|
||||
@ -427,7 +427,7 @@ ccio_free_range(struct ioc *ioc, dma_addr_t iova, unsigned long pages_mapped)
|
||||
BUG_ON((pages_mapped * IOVP_SIZE) > DMA_CHUNK_SIZE);
|
||||
BUG_ON(pages_mapped > BITS_PER_LONG);
|
||||
|
||||
DBG_RES("%s(): res_idx: %d pages_mapped %d\n",
|
||||
DBG_RES("%s(): res_idx: %d pages_mapped %lu\n",
|
||||
__func__, res_idx, pages_mapped);
|
||||
|
||||
#ifdef CCIO_COLLECT_STATS
|
||||
@ -543,7 +543,7 @@ static u32 hint_lookup[] = {
|
||||
* index are bits 12:19 of the value returned by LCI.
|
||||
*/
|
||||
static void
|
||||
ccio_io_pdir_entry(u64 *pdir_ptr, space_t sid, unsigned long vba,
|
||||
ccio_io_pdir_entry(__le64 *pdir_ptr, space_t sid, unsigned long vba,
|
||||
unsigned long hints)
|
||||
{
|
||||
register unsigned long pa;
|
||||
@ -719,7 +719,7 @@ ccio_map_single(struct device *dev, void *addr, size_t size,
|
||||
unsigned long flags;
|
||||
dma_addr_t iovp;
|
||||
dma_addr_t offset;
|
||||
u64 *pdir_start;
|
||||
__le64 *pdir_start;
|
||||
unsigned long hint = hint_lookup[(int)direction];
|
||||
|
||||
BUG_ON(!dev);
|
||||
@ -746,8 +746,8 @@ ccio_map_single(struct device *dev, void *addr, size_t size,
|
||||
|
||||
pdir_start = &(ioc->pdir_base[idx]);
|
||||
|
||||
DBG_RUN("%s() 0x%p -> 0x%lx size: %0x%x\n",
|
||||
__func__, addr, (long)iovp | offset, size);
|
||||
DBG_RUN("%s() %px -> %#lx size: %zu\n",
|
||||
__func__, addr, (long)(iovp | offset), size);
|
||||
|
||||
/* If not cacheline aligned, force SAFE_DMA on the whole mess */
|
||||
if((size % L1_CACHE_BYTES) || ((unsigned long)addr % L1_CACHE_BYTES))
|
||||
@ -805,7 +805,7 @@ ccio_unmap_page(struct device *dev, dma_addr_t iova, size_t size,
|
||||
return;
|
||||
}
|
||||
|
||||
DBG_RUN("%s() iovp 0x%lx/%x\n",
|
||||
DBG_RUN("%s() iovp %#lx/%zx\n",
|
||||
__func__, (long)iova, size);
|
||||
|
||||
iova ^= offset; /* clear offset bits */
|
||||
@ -1283,7 +1283,7 @@ ccio_ioc_init(struct ioc *ioc)
|
||||
iova_space_size>>20,
|
||||
iov_order + PAGE_SHIFT);
|
||||
|
||||
ioc->pdir_base = (u64 *)__get_free_pages(GFP_KERNEL,
|
||||
ioc->pdir_base = (__le64 *)__get_free_pages(GFP_KERNEL,
|
||||
get_order(ioc->pdir_size));
|
||||
if(NULL == ioc->pdir_base) {
|
||||
panic("%s() could not allocate I/O Page Table\n", __func__);
|
||||
|
||||
@ -14,13 +14,13 @@
|
||||
static inline unsigned int
|
||||
iommu_fill_pdir(struct ioc *ioc, struct scatterlist *startsg, int nents,
|
||||
unsigned long hint,
|
||||
void (*iommu_io_pdir_entry)(u64 *, space_t, unsigned long,
|
||||
void (*iommu_io_pdir_entry)(__le64 *, space_t, unsigned long,
|
||||
unsigned long))
|
||||
{
|
||||
struct scatterlist *dma_sg = startsg; /* pointer to current DMA */
|
||||
unsigned int n_mappings = 0;
|
||||
unsigned long dma_offset = 0, dma_len = 0;
|
||||
u64 *pdirp = NULL;
|
||||
__le64 *pdirp = NULL;
|
||||
|
||||
/* Horrible hack. For efficiency's sake, dma_sg starts one
|
||||
* entry below the true start (it is immediately incremented
|
||||
@ -31,8 +31,8 @@ iommu_fill_pdir(struct ioc *ioc, struct scatterlist *startsg, int nents,
|
||||
unsigned long vaddr;
|
||||
long size;
|
||||
|
||||
DBG_RUN_SG(" %d : %08lx/%05x %p/%05x\n", nents,
|
||||
(unsigned long)sg_dma_address(startsg), cnt,
|
||||
DBG_RUN_SG(" %d : %08lx %p/%05x\n", nents,
|
||||
(unsigned long)sg_dma_address(startsg),
|
||||
sg_virt(startsg), startsg->length
|
||||
);
|
||||
|
||||
|
||||
@ -202,9 +202,9 @@ static inline void iosapic_write(void __iomem *iosapic, unsigned int reg, u32 va
|
||||
|
||||
static DEFINE_SPINLOCK(iosapic_lock);
|
||||
|
||||
static inline void iosapic_eoi(void __iomem *addr, unsigned int data)
|
||||
static inline void iosapic_eoi(__le32 __iomem *addr, __le32 data)
|
||||
{
|
||||
__raw_writel(data, addr);
|
||||
__raw_writel((__force u32)data, addr);
|
||||
}
|
||||
|
||||
/*
|
||||
|
||||
@ -118,8 +118,8 @@ struct iosapic_irt {
|
||||
struct vector_info {
|
||||
struct iosapic_info *iosapic; /* I/O SAPIC this vector is on */
|
||||
struct irt_entry *irte; /* IRT entry */
|
||||
u32 __iomem *eoi_addr; /* precalculate EOI reg address */
|
||||
u32 eoi_data; /* IA64: ? PA: swapped txn_data */
|
||||
__le32 __iomem *eoi_addr; /* precalculate EOI reg address */
|
||||
__le32 eoi_data; /* IA64: ? PA: swapped txn_data */
|
||||
int txn_irq; /* virtual IRQ number for processor */
|
||||
ulong txn_addr; /* IA64: id_eid PA: partial HPA */
|
||||
u32 txn_data; /* CPU interrupt bit */
|
||||
|
||||
@ -46,8 +46,6 @@
|
||||
#include <linux/module.h>
|
||||
|
||||
#include <asm/ropes.h>
|
||||
#include <asm/mckinley.h> /* for proc_mckinley_root */
|
||||
#include <asm/runway.h> /* for proc_runway_root */
|
||||
#include <asm/page.h> /* for PAGE0 */
|
||||
#include <asm/pdc.h> /* for PDC_MODEL_* */
|
||||
#include <asm/pdcpat.h> /* for is_pdc_pat() */
|
||||
@ -122,7 +120,7 @@ MODULE_PARM_DESC(sba_reserve_agpgart, "Reserve half of IO pdir as AGPGART");
|
||||
#endif
|
||||
|
||||
static struct proc_dir_entry *proc_runway_root __ro_after_init;
|
||||
struct proc_dir_entry *proc_mckinley_root __ro_after_init;
|
||||
static struct proc_dir_entry *proc_mckinley_root __ro_after_init;
|
||||
|
||||
/************************************
|
||||
** SBA register read and write support
|
||||
@ -204,7 +202,7 @@ static void
|
||||
sba_dump_pdir_entry(struct ioc *ioc, char *msg, uint pide)
|
||||
{
|
||||
/* start printing from lowest pde in rval */
|
||||
u64 *ptr = &(ioc->pdir_base[pide & (~0U * BITS_PER_LONG)]);
|
||||
__le64 *ptr = &(ioc->pdir_base[pide & (~0U * BITS_PER_LONG)]);
|
||||
unsigned long *rptr = (unsigned long *) &(ioc->res_map[(pide >>3) & ~(sizeof(unsigned long) - 1)]);
|
||||
uint rcnt;
|
||||
|
||||
@ -571,7 +569,7 @@ typedef unsigned long space_t;
|
||||
*/
|
||||
|
||||
static void
|
||||
sba_io_pdir_entry(u64 *pdir_ptr, space_t sid, unsigned long vba,
|
||||
sba_io_pdir_entry(__le64 *pdir_ptr, space_t sid, unsigned long vba,
|
||||
unsigned long hint)
|
||||
{
|
||||
u64 pa; /* physical address */
|
||||
@ -615,7 +613,7 @@ static void
|
||||
sba_mark_invalid(struct ioc *ioc, dma_addr_t iova, size_t byte_cnt)
|
||||
{
|
||||
u32 iovp = (u32) SBA_IOVP(ioc,iova);
|
||||
u64 *pdir_ptr = &ioc->pdir_base[PDIR_INDEX(iovp)];
|
||||
__le64 *pdir_ptr = &ioc->pdir_base[PDIR_INDEX(iovp)];
|
||||
|
||||
#ifdef ASSERT_PDIR_SANITY
|
||||
/* Assert first pdir entry is set.
|
||||
@ -716,7 +714,7 @@ sba_map_single(struct device *dev, void *addr, size_t size,
|
||||
unsigned long flags;
|
||||
dma_addr_t iovp;
|
||||
dma_addr_t offset;
|
||||
u64 *pdir_start;
|
||||
__le64 *pdir_start;
|
||||
int pide;
|
||||
|
||||
ioc = GET_IOC(dev);
|
||||
@ -1434,7 +1432,7 @@ sba_ioc_init(struct parisc_device *sba, struct ioc *ioc, int ioc_num)
|
||||
|
||||
ioc->pdir_size = pdir_size = (iova_space_size/IOVP_SIZE) * sizeof(u64);
|
||||
|
||||
DBG_INIT("%s() hpa 0x%lx mem %ldMB IOV %dMB (%d bits)\n",
|
||||
DBG_INIT("%s() hpa %px mem %ldMB IOV %dMB (%d bits)\n",
|
||||
__func__,
|
||||
ioc->ioc_hpa,
|
||||
(unsigned long) totalram_pages() >> (20 - PAGE_SHIFT),
|
||||
@ -1471,7 +1469,7 @@ sba_ioc_init(struct parisc_device *sba, struct ioc *ioc, int ioc_num)
|
||||
ioc->iovp_mask = ~(iova_space_mask + PAGE_SIZE - 1);
|
||||
#endif
|
||||
|
||||
DBG_INIT("%s() IOV base 0x%lx mask 0x%0lx\n",
|
||||
DBG_INIT("%s() IOV base %#lx mask %#0lx\n",
|
||||
__func__, ioc->ibase, ioc->imask);
|
||||
|
||||
/*
|
||||
@ -1583,7 +1581,7 @@ printk("sba_hw_init(): mem_boot 0x%x 0x%x 0x%x 0x%x\n", PAGE0->mem_boot.hpa,
|
||||
|
||||
if (!IS_PLUTO(sba_dev->dev)) {
|
||||
ioc_ctl = READ_REG(sba_dev->sba_hpa+IOC_CTRL);
|
||||
DBG_INIT("%s() hpa 0x%lx ioc_ctl 0x%Lx ->",
|
||||
DBG_INIT("%s() hpa %px ioc_ctl 0x%Lx ->",
|
||||
__func__, sba_dev->sba_hpa, ioc_ctl);
|
||||
ioc_ctl &= ~(IOC_CTRL_RM | IOC_CTRL_NC | IOC_CTRL_CE);
|
||||
ioc_ctl |= IOC_CTRL_DD | IOC_CTRL_D4 | IOC_CTRL_TC;
|
||||
@ -1668,14 +1666,14 @@ printk("sba_hw_init(): mem_boot 0x%x 0x%x 0x%x 0x%x\n", PAGE0->mem_boot.hpa,
|
||||
/* flush out the last writes */
|
||||
READ_REG(sba_dev->ioc[i].ioc_hpa + ROPE7_CTL);
|
||||
|
||||
DBG_INIT(" ioc[%d] ROPE_CFG 0x%Lx ROPE_DBG 0x%Lx\n",
|
||||
DBG_INIT(" ioc[%d] ROPE_CFG %#lx ROPE_DBG %lx\n",
|
||||
i,
|
||||
READ_REG(sba_dev->ioc[i].ioc_hpa + 0x40),
|
||||
READ_REG(sba_dev->ioc[i].ioc_hpa + 0x50)
|
||||
(unsigned long) READ_REG(sba_dev->ioc[i].ioc_hpa + 0x40),
|
||||
(unsigned long) READ_REG(sba_dev->ioc[i].ioc_hpa + 0x50)
|
||||
);
|
||||
DBG_INIT(" STATUS_CONTROL 0x%Lx FLUSH_CTRL 0x%Lx\n",
|
||||
READ_REG(sba_dev->ioc[i].ioc_hpa + 0x108),
|
||||
READ_REG(sba_dev->ioc[i].ioc_hpa + 0x400)
|
||||
DBG_INIT(" STATUS_CONTROL %#lx FLUSH_CTRL %#lx\n",
|
||||
(unsigned long) READ_REG(sba_dev->ioc[i].ioc_hpa + 0x108),
|
||||
(unsigned long) READ_REG(sba_dev->ioc[i].ioc_hpa + 0x400)
|
||||
);
|
||||
|
||||
if (IS_PLUTO(sba_dev->dev)) {
|
||||
@ -1739,7 +1737,7 @@ sba_common_init(struct sba_device *sba_dev)
|
||||
#ifdef ASSERT_PDIR_SANITY
|
||||
/* Mark first bit busy - ie no IOVA 0 */
|
||||
sba_dev->ioc[i].res_map[0] = 0x80;
|
||||
sba_dev->ioc[i].pdir_base[0] = 0xeeffc0addbba0080ULL;
|
||||
sba_dev->ioc[i].pdir_base[0] = (__force __le64) 0xeeffc0addbba0080ULL;
|
||||
#endif
|
||||
|
||||
/* Third (and last) part of PIRANHA BUG */
|
||||
@ -1899,9 +1897,7 @@ static int __init sba_driver_callback(struct parisc_device *dev)
|
||||
int i;
|
||||
char *version;
|
||||
void __iomem *sba_addr = ioremap(dev->hpa.start, SBA_FUNC_SIZE);
|
||||
#ifdef CONFIG_PROC_FS
|
||||
struct proc_dir_entry *root;
|
||||
#endif
|
||||
struct proc_dir_entry *root __maybe_unused;
|
||||
|
||||
sba_dump_ranges(sba_addr);
|
||||
|
||||
@ -1967,7 +1963,6 @@ static int __init sba_driver_callback(struct parisc_device *dev)
|
||||
|
||||
hppa_dma_ops = &sba_ops;
|
||||
|
||||
#ifdef CONFIG_PROC_FS
|
||||
switch (dev->id.hversion) {
|
||||
case PLUTO_MCKINLEY_PORT:
|
||||
if (!proc_mckinley_root)
|
||||
@ -1985,7 +1980,6 @@ static int __init sba_driver_callback(struct parisc_device *dev)
|
||||
|
||||
proc_create_single("sba_iommu", 0, root, sba_proc_info);
|
||||
proc_create_single("sba_iommu-bitmap", 0, root, sba_proc_bitmap_info);
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
@ -52,6 +52,8 @@
|
||||
|
||||
#ifdef CONFIG_IA64
|
||||
#define KSYM_FUNC(name) @fptr(name)
|
||||
#elif defined(CONFIG_PARISC) && defined(CONFIG_64BIT)
|
||||
#define KSYM_FUNC(name) P%name
|
||||
#else
|
||||
#define KSYM_FUNC(name) name
|
||||
#endif
|
||||
|
||||
@ -1228,6 +1228,15 @@ static void check_export_symbol(struct module *mod, struct elf_info *elf,
|
||||
*/
|
||||
s->is_func = (ELF_ST_TYPE(sym->st_info) == STT_FUNC);
|
||||
|
||||
/*
|
||||
* For parisc64, symbols prefixed $$ from the library have the symbol type
|
||||
* STT_LOPROC. They should be handled as functions too.
|
||||
*/
|
||||
if (elf->hdr->e_ident[EI_CLASS] == ELFCLASS64 &&
|
||||
elf->hdr->e_machine == EM_PARISC &&
|
||||
ELF_ST_TYPE(sym->st_info) == STT_LOPROC)
|
||||
s->is_func = true;
|
||||
|
||||
if (match(secname, PATTERNS(INIT_SECTIONS)))
|
||||
warn("%s: %s: EXPORT_SYMBOL used for init symbol. Remove __init or EXPORT_SYMBOL.\n",
|
||||
mod->name, name);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user