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clk: renesas: r8a77995: Remove non-existent SSP clocks

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The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Dec 22, 2017, and
Feb 28, 2018) removed the SSPSRC, SSP1, and SSP2 clocks on R-Car D3, as
this SoC does not have a Stream and Security Processor.

As these definitions were never used, they can just be removed.
The freed slots in the DT bindings header must not be reused, though.

Fixes: 714c53aa2e ("clk: renesas: Add r8a77995 CPG Core Clock Definitions")
Fixes: d71e851d82 ("clk: renesas: cpg-mssr: Add R8A77995 support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
Geert Uytterhoeven 2018-11-20 16:46:38 +01:00
parent a5883a387f
commit 846dbb405b
2 changed files with 2 additions and 3 deletions
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1
drivers/clk/renesas/r8a77995-cpg-mssr.c
View File

@ -42,7 +42,6 @@ enum clk_ids {
CLK_S2,
CLK_S3,
CLK_SDSRC,
CLK_SSPSRC,
CLK_RINT,
CLK_OCO,

4
include/dt-bindings/clock/r8a77995-cpg-mssr.h
View File

@ -35,8 +35,8 @@
#define R8A77995_CLK_CRD2 24
#define R8A77995_CLK_SD0H 25
#define R8A77995_CLK_SD0 26
#define R8A77995_CLK_SSP2 27
#define R8A77995_CLK_SSP1 28
/* CLK_SSP2 was removed */
/* CLK_SSP1 was removed */
#define R8A77995_CLK_RPC 29
#define R8A77995_CLK_RPCD2 30
#define R8A77995_CLK_ZA2 31