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[MIPS] rbtx4927: Fix some gcc warnings and a section mismatch.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
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d4414cc48b
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@ -79,7 +79,7 @@ static unsigned char backplane_pci_irq[4][4] = {
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TX4927_IRQ_IOC_PCIC}
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TX4927_IRQ_IOC_PCIC}
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};
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};
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int pci_get_irq(struct pci_dev *dev, int pin)
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static int pci_get_irq(const struct pci_dev *dev, int pin)
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{
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{
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unsigned char irq = pin;
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unsigned char irq = pin;
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@ -262,8 +262,6 @@ u32 bit2num(u32 num)
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int toshiba_rbtx4927_irq_nested(int sw_irq)
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int toshiba_rbtx4927_irq_nested(int sw_irq)
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{
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{
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u32 level3;
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u32 level3;
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u32 level4;
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u32 level5;
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level3 = reg_rd08(TOSHIBA_RBTX4927_IOC_INTR_STAT) & 0x1f;
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level3 = reg_rd08(TOSHIBA_RBTX4927_IOC_INTR_STAT) & 0x1f;
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if (level3) {
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if (level3) {
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@ -275,6 +273,8 @@ int toshiba_rbtx4927_irq_nested(int sw_irq)
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#ifdef CONFIG_TOSHIBA_FPCIB0
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#ifdef CONFIG_TOSHIBA_FPCIB0
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{
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{
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if (tx4927_using_backplane) {
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if (tx4927_using_backplane) {
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u32 level4;
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u32 level5;
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outb(0x0A, 0x20);
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outb(0x0A, 0x20);
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level4 = inb(0x20) & 0xff;
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level4 = inb(0x20) & 0xff;
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if (level4) {
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if (level4) {
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@ -159,58 +159,6 @@ int tx4927_pci66 = 0; /* 0:auto */
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char *toshiba_name = "";
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char *toshiba_name = "";
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#ifdef CONFIG_PCI
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#ifdef CONFIG_PCI
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static void tx4927_pcierr_interrupt(int irq, void *dev_id)
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{
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#ifdef CONFIG_BLK_DEV_IDEPCI
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/* ignore MasterAbort for ide probing... */
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if (irq == TX4927_IRQ_IRC_PCIERR &&
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((tx4927_pcicptr->pcistatus >> 16) & 0xf900) ==
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PCI_STATUS_REC_MASTER_ABORT) {
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tx4927_pcicptr->pcistatus =
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(tx4927_pcicptr->
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pcistatus & 0x0000ffff) | (PCI_STATUS_REC_MASTER_ABORT
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<< 16);
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return;
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}
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#endif
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printk("PCI error interrupt (irq 0x%x).\n", irq);
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printk("pcistat:%04x, g2pstatus:%08lx, pcicstatus:%08lx\n",
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(unsigned short) (tx4927_pcicptr->pcistatus >> 16),
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tx4927_pcicptr->g2pstatus, tx4927_pcicptr->pcicstatus);
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printk("ccfg:%08lx, tear:%02lx_%08lx\n",
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(unsigned long) tx4927_ccfgptr->ccfg,
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(unsigned long) (tx4927_ccfgptr->tear >> 32),
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(unsigned long) tx4927_ccfgptr->tear);
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show_regs(get_irq_regs());
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}
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void __init toshiba_rbtx4927_pci_irq_init(void)
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{
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return;
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}
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void tx4927_reset_pci_pcic(void)
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{
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/* Reset PCI Bus */
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*tx4927_pcireset_ptr = 1;
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/* Reset PCIC */
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tx4927_ccfgptr->clkctr |= TX4927_CLKCTR_PCIRST;
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udelay(10000);
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/* clear PCIC reset */
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tx4927_ccfgptr->clkctr &= ~TX4927_CLKCTR_PCIRST;
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*tx4927_pcireset_ptr = 0;
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}
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#endif /* CONFIG_PCI */
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#ifdef CONFIG_PCI
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void print_pci_status(void)
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{
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printk("PCI STATUS %lx\n", tx4927_pcicptr->pcistatus);
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printk("PCIC STATUS %lx\n", tx4927_pcicptr->pcicstatus);
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}
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extern struct pci_controller tx4927_controller;
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extern struct pci_controller tx4927_controller;
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static struct pci_dev *fake_pci_dev(struct pci_controller *hose,
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static struct pci_dev *fake_pci_dev(struct pci_controller *hose,
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@ -239,10 +187,8 @@ static int early_##rw##_config_##size(struct pci_controller *hose, \
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}
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}
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EARLY_PCI_OP(read, byte, u8 *)
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EARLY_PCI_OP(read, byte, u8 *)
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EARLY_PCI_OP(read, word, u16 *)
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EARLY_PCI_OP(read, dword, u32 *)
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EARLY_PCI_OP(read, dword, u32 *)
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EARLY_PCI_OP(write, byte, u8)
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EARLY_PCI_OP(write, byte, u8)
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EARLY_PCI_OP(write, word, u16)
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EARLY_PCI_OP(write, dword, u32)
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EARLY_PCI_OP(write, dword, u32)
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static int __init tx4927_pcibios_init(void)
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static int __init tx4927_pcibios_init(void)
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@ -269,7 +215,9 @@ static int __init tx4927_pcibios_init(void)
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u8 v08_64;
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u8 v08_64;
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u32 v32_b0;
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u32 v32_b0;
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u8 v08_e1;
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u8 v08_e1;
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#ifdef TOSHIBA_RBTX4927_SETUP_DEBUG
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char *s = " sb/isa --";
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char *s = " sb/isa --";
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#endif
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TOSHIBA_RBTX4927_SETUP_DPRINTK
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TOSHIBA_RBTX4927_SETUP_DPRINTK
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(TOSHIBA_RBTX4927_SETUP_PCIBIOS, ":%s beg\n",
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(TOSHIBA_RBTX4927_SETUP_PCIBIOS, ":%s beg\n",
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@ -354,7 +302,9 @@ static int __init tx4927_pcibios_init(void)
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u8 v08_41;
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u8 v08_41;
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u8 v08_43;
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u8 v08_43;
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u8 v08_5c;
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u8 v08_5c;
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#ifdef TOSHIBA_RBTX4927_SETUP_DEBUG
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char *s = " sb/ide --";
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char *s = " sb/ide --";
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#endif
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TOSHIBA_RBTX4927_SETUP_DPRINTK
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TOSHIBA_RBTX4927_SETUP_DPRINTK
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(TOSHIBA_RBTX4927_SETUP_PCIBIOS, ":%s beg\n",
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(TOSHIBA_RBTX4927_SETUP_PCIBIOS, ":%s beg\n",
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