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[media] fintek-cir: add support for newer chip version
Acked-by: Jarod Wilson <jarod@redhat.com> Reviewed-by: Jarod Wilson <jarod@redhat.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
This commit is contained in:
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@ -117,7 +117,7 @@ static u8 fintek_cir_reg_read(struct fintek_dev *fintek, u8 offset)
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static void cir_dump_regs(struct fintek_dev *fintek)
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static void cir_dump_regs(struct fintek_dev *fintek)
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{
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{
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fintek_config_mode_enable(fintek);
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fintek_config_mode_enable(fintek);
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fintek_select_logical_dev(fintek, LOGICAL_DEV_CIR);
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fintek_select_logical_dev(fintek, fintek->logical_dev_cir);
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pr_reg("%s: Dump CIR logical device registers:\n", FINTEK_DRIVER_NAME);
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pr_reg("%s: Dump CIR logical device registers:\n", FINTEK_DRIVER_NAME);
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pr_reg(" * CR CIR BASE ADDR: 0x%x\n",
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pr_reg(" * CR CIR BASE ADDR: 0x%x\n",
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@ -143,7 +143,7 @@ static int fintek_hw_detect(struct fintek_dev *fintek)
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u8 chip_major, chip_minor;
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u8 chip_major, chip_minor;
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u8 vendor_major, vendor_minor;
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u8 vendor_major, vendor_minor;
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u8 portsel, ir_class;
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u8 portsel, ir_class;
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u16 vendor;
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u16 vendor, chip;
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int ret = 0;
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int ret = 0;
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fintek_config_mode_enable(fintek);
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fintek_config_mode_enable(fintek);
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@ -176,6 +176,7 @@ static int fintek_hw_detect(struct fintek_dev *fintek)
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chip_major = fintek_cr_read(fintek, GCR_CHIP_ID_HI);
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chip_major = fintek_cr_read(fintek, GCR_CHIP_ID_HI);
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chip_minor = fintek_cr_read(fintek, GCR_CHIP_ID_LO);
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chip_minor = fintek_cr_read(fintek, GCR_CHIP_ID_LO);
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chip = chip_major << 8 | chip_minor;
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vendor_major = fintek_cr_read(fintek, GCR_VENDOR_ID_HI);
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vendor_major = fintek_cr_read(fintek, GCR_VENDOR_ID_HI);
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vendor_minor = fintek_cr_read(fintek, GCR_VENDOR_ID_LO);
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vendor_minor = fintek_cr_read(fintek, GCR_VENDOR_ID_LO);
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@ -192,6 +193,15 @@ static int fintek_hw_detect(struct fintek_dev *fintek)
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fintek->chip_major = chip_major;
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fintek->chip_major = chip_major;
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fintek->chip_minor = chip_minor;
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fintek->chip_minor = chip_minor;
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fintek->chip_vendor = vendor;
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fintek->chip_vendor = vendor;
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/*
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* Newer reviews of this chipset uses port 8 instead of 5
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*/
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if ((chip != 0x0408) || (chip != 0x0804))
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fintek->logical_dev_cir = LOGICAL_DEV_CIR_REV2;
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else
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fintek->logical_dev_cir = LOGICAL_DEV_CIR_REV1;
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spin_unlock_irqrestore(&fintek->fintek_lock, flags);
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spin_unlock_irqrestore(&fintek->fintek_lock, flags);
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return ret;
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return ret;
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@ -200,7 +210,7 @@ static int fintek_hw_detect(struct fintek_dev *fintek)
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static void fintek_cir_ldev_init(struct fintek_dev *fintek)
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static void fintek_cir_ldev_init(struct fintek_dev *fintek)
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{
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{
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/* Select CIR logical device and enable */
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/* Select CIR logical device and enable */
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fintek_select_logical_dev(fintek, LOGICAL_DEV_CIR);
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fintek_select_logical_dev(fintek, fintek->logical_dev_cir);
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fintek_cr_write(fintek, LOGICAL_DEV_ENABLE, CIR_CR_DEV_EN);
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fintek_cr_write(fintek, LOGICAL_DEV_ENABLE, CIR_CR_DEV_EN);
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/* Write allocated CIR address and IRQ information to hardware */
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/* Write allocated CIR address and IRQ information to hardware */
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@ -381,7 +391,7 @@ static irqreturn_t fintek_cir_isr(int irq, void *data)
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fit_dbg_verbose("%s firing", __func__);
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fit_dbg_verbose("%s firing", __func__);
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fintek_config_mode_enable(fintek);
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fintek_config_mode_enable(fintek);
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fintek_select_logical_dev(fintek, LOGICAL_DEV_CIR);
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fintek_select_logical_dev(fintek, fintek->logical_dev_cir);
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fintek_config_mode_disable(fintek);
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fintek_config_mode_disable(fintek);
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/*
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/*
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@ -422,7 +432,7 @@ static void fintek_enable_cir(struct fintek_dev *fintek)
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fintek_config_mode_enable(fintek);
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fintek_config_mode_enable(fintek);
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/* enable the CIR logical device */
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/* enable the CIR logical device */
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fintek_select_logical_dev(fintek, LOGICAL_DEV_CIR);
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fintek_select_logical_dev(fintek, fintek->logical_dev_cir);
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fintek_cr_write(fintek, LOGICAL_DEV_ENABLE, CIR_CR_DEV_EN);
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fintek_cr_write(fintek, LOGICAL_DEV_ENABLE, CIR_CR_DEV_EN);
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fintek_config_mode_disable(fintek);
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fintek_config_mode_disable(fintek);
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@ -439,7 +449,7 @@ static void fintek_disable_cir(struct fintek_dev *fintek)
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fintek_config_mode_enable(fintek);
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fintek_config_mode_enable(fintek);
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/* disable the CIR logical device */
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/* disable the CIR logical device */
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fintek_select_logical_dev(fintek, LOGICAL_DEV_CIR);
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fintek_select_logical_dev(fintek, fintek->logical_dev_cir);
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fintek_cr_write(fintek, LOGICAL_DEV_DISABLE, CIR_CR_DEV_EN);
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fintek_cr_write(fintek, LOGICAL_DEV_DISABLE, CIR_CR_DEV_EN);
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fintek_config_mode_disable(fintek);
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fintek_config_mode_disable(fintek);
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@ -611,7 +621,7 @@ static int fintek_suspend(struct pnp_dev *pdev, pm_message_t state)
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fintek_config_mode_enable(fintek);
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fintek_config_mode_enable(fintek);
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/* disable cir logical dev */
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/* disable cir logical dev */
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fintek_select_logical_dev(fintek, LOGICAL_DEV_CIR);
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fintek_select_logical_dev(fintek, fintek->logical_dev_cir);
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fintek_cr_write(fintek, LOGICAL_DEV_DISABLE, CIR_CR_DEV_EN);
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fintek_cr_write(fintek, LOGICAL_DEV_DISABLE, CIR_CR_DEV_EN);
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fintek_config_mode_disable(fintek);
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fintek_config_mode_disable(fintek);
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@ -634,7 +644,7 @@ static int fintek_resume(struct pnp_dev *pdev)
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/* Enable CIR logical device */
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/* Enable CIR logical device */
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fintek_config_mode_enable(fintek);
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fintek_config_mode_enable(fintek);
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fintek_select_logical_dev(fintek, LOGICAL_DEV_CIR);
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fintek_select_logical_dev(fintek, fintek->logical_dev_cir);
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fintek_cr_write(fintek, LOGICAL_DEV_ENABLE, CIR_CR_DEV_EN);
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fintek_cr_write(fintek, LOGICAL_DEV_ENABLE, CIR_CR_DEV_EN);
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fintek_config_mode_disable(fintek);
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fintek_config_mode_disable(fintek);
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@ -88,6 +88,7 @@ struct fintek_dev {
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u8 chip_major;
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u8 chip_major;
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u8 chip_minor;
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u8 chip_minor;
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u16 chip_vendor;
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u16 chip_vendor;
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u8 logical_dev_cir;
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/* hardware features */
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/* hardware features */
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bool hw_learning_capable;
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bool hw_learning_capable;
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@ -172,7 +173,8 @@ struct fintek_dev {
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#define LOGICAL_DEV_ENABLE 0x01
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#define LOGICAL_DEV_ENABLE 0x01
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/* Logical device number of the CIR function */
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/* Logical device number of the CIR function */
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#define LOGICAL_DEV_CIR 0x05
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#define LOGICAL_DEV_CIR_REV1 0x05
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#define LOGICAL_DEV_CIR_REV2 0x08
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/* CIR Logical Device (LDN 0x08) config registers */
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/* CIR Logical Device (LDN 0x08) config registers */
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#define CIR_CR_COMMAND_INDEX 0x04
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#define CIR_CR_COMMAND_INDEX 0x04
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