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dmaengine: jz4780: Fix error handling/signedness issues
There are a some signedness bugs such as testing for < 0 on unsigned return values. Additionally there are some cases where functions which should return NULL on error actually return a PTR_ERR value which can result in oopses on error. Fix these issues. Signed-off-by: Alex Smith <alex.smith@imgtec.com> Cc: Vinod Koul <vinod.koul@intel.com> Cc: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> Cc: dmaengine@vger.kernel.org Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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@ -250,7 +250,7 @@ static uint32_t jz4780_dma_transfer_size(unsigned long val, uint32_t *shift)
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}
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}
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static uint32_t jz4780_dma_setup_hwdesc(struct jz4780_dma_chan *jzchan,
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static int jz4780_dma_setup_hwdesc(struct jz4780_dma_chan *jzchan,
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struct jz4780_dma_hwdesc *desc, dma_addr_t addr, size_t len,
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enum dma_transfer_direction direction)
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{
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@ -301,6 +301,7 @@ static uint32_t jz4780_dma_setup_hwdesc(struct jz4780_dma_chan *jzchan,
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desc->dcm |= width << JZ_DMA_DCM_DP_SHIFT;
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desc->dtc = len >> jzchan->transfer_shift;
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return 0;
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}
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static struct dma_async_tx_descriptor *jz4780_dma_prep_slave_sg(
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@ -319,12 +320,11 @@ static struct dma_async_tx_descriptor *jz4780_dma_prep_slave_sg(
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for (i = 0; i < sg_len; i++) {
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err = jz4780_dma_setup_hwdesc(jzchan, &desc->desc[i],
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sg_dma_address(&sgl[i]),
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sg_dma_len(&sgl[i]),
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direction);
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sg_dma_address(&sgl[i]),
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sg_dma_len(&sgl[i]),
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direction);
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if (err < 0)
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return ERR_PTR(err);
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return NULL;
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desc->desc[i].dcm |= JZ_DMA_DCM_TIE;
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@ -366,9 +366,9 @@ static struct dma_async_tx_descriptor *jz4780_dma_prep_dma_cyclic(
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for (i = 0; i < periods; i++) {
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err = jz4780_dma_setup_hwdesc(jzchan, &desc->desc[i], buf_addr,
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period_len, direction);
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period_len, direction);
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if (err < 0)
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return ERR_PTR(err);
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return NULL;
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buf_addr += period_len;
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@ -417,7 +417,7 @@ struct dma_async_tx_descriptor *jz4780_dma_prep_dma_memcpy(
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tsz << JZ_DMA_DCM_TSZ_SHIFT |
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JZ_DMA_WIDTH_32_BIT << JZ_DMA_DCM_SP_SHIFT |
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JZ_DMA_WIDTH_32_BIT << JZ_DMA_DCM_DP_SHIFT;
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desc->desc[0].dtc = len >> ord;
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desc->desc[0].dtc = len >> jzchan->transfer_shift;
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return vchan_tx_prep(&jzchan->vchan, &desc->vdesc, flags);
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}
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@ -580,8 +580,8 @@ static enum dma_status jz4780_dma_tx_status(struct dma_chan *chan,
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txstate->residue = 0;
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if (vdesc && jzchan->desc && vdesc == &jzchan->desc->vdesc
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&& jzchan->desc->status & (JZ_DMA_DCS_AR | JZ_DMA_DCS_HLT))
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status = DMA_ERROR;
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&& jzchan->desc->status & (JZ_DMA_DCS_AR | JZ_DMA_DCS_HLT))
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status = DMA_ERROR;
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spin_unlock_irqrestore(&jzchan->vchan.lock, flags);
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return status;
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@ -756,17 +756,19 @@ static int jz4780_dma_probe(struct platform_device *pdev)
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if (IS_ERR(jzdma->base))
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return PTR_ERR(jzdma->base);
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jzdma->irq = platform_get_irq(pdev, 0);
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if (jzdma->irq < 0) {
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ret = platform_get_irq(pdev, 0);
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if (ret < 0) {
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dev_err(dev, "failed to get IRQ: %d\n", ret);
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return jzdma->irq;
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return ret;
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}
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jzdma->irq = ret;
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ret = devm_request_irq(dev, jzdma->irq, jz4780_dma_irq_handler, 0,
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dev_name(dev), jzdma);
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if (ret) {
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dev_err(dev, "failed to request IRQ %u!\n", jzdma->irq);
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return -EINVAL;
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return ret;
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}
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jzdma->clk = devm_clk_get(dev, NULL);
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@ -803,7 +805,6 @@ static int jz4780_dma_probe(struct platform_device *pdev)
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dd->directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV);
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dd->residue_granularity = DMA_RESIDUE_GRANULARITY_BURST;
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/*
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* Enable DMA controller, mark all channels as not programmable.
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* Also set the FMSC bit - it increases MSC performance, so it makes
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