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RISC-V Fixes for 6.6-rc2

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* A fix to align kexec'd kernels to PMD boundries.
 * The T-Head dcache.cva encoding was incorrect, it has been fixed to
   invalidate all caches (as opposed to just the L1).
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCAAxFiEEKzw3R0RoQ7JKlDp6LhMZ81+7GIkFAmUEdAsTHHBhbG1lckBk
 YWJiZWx0LmNvbQAKCRAuExnzX7sYiRGqD/9D3uDELPxiODfpmEnocQp+l+2oa566
 R3YkIdTxatuVwakfoVNe3eHiyt2Buy4eKMs8Ymg//vQUUsISZFBF3ni7Wii7Bzwb
 MfhMZz/8IHF+Qzwgvu9vz/t5mVRHMgdMQ3nG/sKYxCSVo9soUw6HqjidF4CfK8ty
 6/gbvfn7zE7IUZi2flMrSZ03vfz7GYEoXgiydcQi5umNslzM0Fbi7WLM7Z9DHyeU
 f9WWU2A4U1ZFaiKJVs6B5oiT7BRluVAp+OSMbFd5S4AEURY6j8gWw2vHPs1DIRg0
 lX4lYtImXupor7U9z6lUwMuDJfQ1MVBrrd3DaPEepK4FuzggJ66IlCX/PqHva4dD
 aPMpJfeEIjuJgkxAdKPKQNvk1S1M3TPEyeCTUt8mv8dXAcQjqv5N2m90j28pfJcl
 7HMe6axVI8Tas21c6qMyJmSnKatJRJYEceR7+RS4B8Gu3IWS3qKJHYoRNNGM5bSz
 1XtmFa7SbDREkhR6oD1nL7ufxLu94Sdam/dU28Hq6Eg4T8GQdHi0/HwZePY2kd6+
 QZY8gHx/4348ej7HLKijAGVTdR2hO0bgPBXjG/p+NsWMW9MN207vqjfUxpPNJYOv
 miKSQC5qH3sTbEG4Vf28tEgKc5XBKyYmreFuNjoEqMfKmI5R1Azjs2HCc7cPcvws
 wn3ykSPr6JrnmA==
 =ES2t
 -----END PGP SIGNATURE-----

Merge tag 'riscv-for-linus-6.6-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

Pull RISC-V fixes from Palmer Dabbelt:

 - A fix to align kexec'd kernels to PMD boundries

 - The T-Head dcache.cva encoding was incorrect, it has been fixed to
   invalidate all caches (as opposed to just the L1)

* tag 'riscv-for-linus-6.6-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
  riscv: errata: fix T-Head dcache.cva encoding
  riscv: kexec: Align the kexeced kernel entry
This commit is contained in:
Linus Torvalds 2023-09-15 12:33:01 -07:00
commit 82210979f3
2 changed files with 9 additions and 3 deletions
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4
arch/riscv/include/asm/errata_list.h
View File

@ -105,7 +105,7 @@ asm volatile(ALTERNATIVE( \
* | 31 - 25 | 24 - 20 | 19 - 15 | 14 - 12 | 11 - 7 | 6 - 0 |
* 0000001 01001 rs1 000 00000 0001011
* dcache.cva rs1 (clean, virtual address)
* 0000001 00100 rs1 000 00000 0001011
* 0000001 00101 rs1 000 00000 0001011
*
* dcache.cipa rs1 (clean then invalidate, physical address)
* | 31 - 25 | 24 - 20 | 19 - 15 | 14 - 12 | 11 - 7 | 6 - 0 |
@ -118,7 +118,7 @@ asm volatile(ALTERNATIVE( \
* 0000000 11001 00000 000 00000 0001011
*/
#define THEAD_inval_A0 ".long 0x0265000b"
#define THEAD_clean_A0 ".long 0x0245000b"
#define THEAD_clean_A0 ".long 0x0255000b"
#define THEAD_flush_A0 ".long 0x0275000b"
#define THEAD_SYNC_S ".long 0x0190000b"

8
arch/riscv/kernel/elf_kexec.c
View File

@ -98,7 +98,13 @@ static int elf_find_pbase(struct kimage *image, unsigned long kernel_len,
kbuf.image = image;
kbuf.buf_min = lowest_paddr;
kbuf.buf_max = ULONG_MAX;
kbuf.buf_align = PAGE_SIZE;
/*
* Current riscv boot protocol requires 2MB alignment for
* RV64 and 4MB alignment for RV32
*
*/
kbuf.buf_align = PMD_SIZE;
kbuf.mem = KEXEC_BUF_MEM_UNKNOWN;
kbuf.memsz = ALIGN(kernel_len, PAGE_SIZE);
kbuf.top_down = false;