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net/mlx5e: Fix endianness when calculating pedit mask first bit

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The field mask value is provided in network byte order and has to
be converted to host byte order before calculating pedit mask
first bit.

Fixes: 88f30bbcba ("net/mlx5e: Bit sized fields rewrite support")
Signed-off-by: Maor Dickman <maord@nvidia.com>
Reviewed-by: Roi Dayan <roid@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
This commit is contained in:
Maor Dickman 2020-09-02 16:49:52 +03:00 committed by Saeed Mahameed
parent 6cec0229ab
commit 82198d8bcd
1 changed files with 21 additions and 13 deletions
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34
drivers/net/ethernet/mellanox/mlx5/core/en_tc.c
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@ -2624,6 +2624,22 @@ static struct mlx5_fields fields[] = {
OFFLOAD(UDP_DPORT, 16, U16_MAX, udp.dest, 0, udp_dport), OFFLOAD(UDP_DPORT, 16, U16_MAX, udp.dest, 0, udp_dport),
}; };
static unsigned long mask_to_le(unsigned long mask, int size)
{
__be32 mask_be32;
__be16 mask_be16;
if (size == 32) {
mask_be32 = (__force __be32)(mask);
mask = (__force unsigned long)cpu_to_le32(be32_to_cpu(mask_be32));
} else if (size == 16) {
mask_be32 = (__force __be32)(mask);
mask_be16 = *(__be16 *)&mask_be32;
mask = (__force unsigned long)cpu_to_le16(be16_to_cpu(mask_be16));
}
return mask;
}
static int offload_pedit_fields(struct mlx5e_priv *priv, static int offload_pedit_fields(struct mlx5e_priv *priv,
int namespace, int namespace,
struct pedit_headers_action *hdrs, struct pedit_headers_action *hdrs,
@ -2637,9 +2653,7 @@ static int offload_pedit_fields(struct mlx5e_priv *priv,
u32 *s_masks_p, *a_masks_p, s_mask, a_mask; u32 *s_masks_p, *a_masks_p, s_mask, a_mask;
struct mlx5e_tc_mod_hdr_acts *mod_acts; struct mlx5e_tc_mod_hdr_acts *mod_acts;
struct mlx5_fields *f; struct mlx5_fields *f;
unsigned long mask; unsigned long mask, field_mask;
__be32 mask_be32;
__be16 mask_be16;
int err; int err;
u8 cmd; u8 cmd;
@ -2705,14 +2719,7 @@ static int offload_pedit_fields(struct mlx5e_priv *priv,
if (skip) if (skip)
continue; continue;
if (f->field_bsize == 32) { mask = mask_to_le(mask, f->field_bsize);
mask_be32 = (__force __be32)(mask);
mask = (__force unsigned long)cpu_to_le32(be32_to_cpu(mask_be32));
} else if (f->field_bsize == 16) {
mask_be32 = (__force __be32)(mask);
mask_be16 = *(__be16 *)&mask_be32;
mask = (__force unsigned long)cpu_to_le16(be16_to_cpu(mask_be16));
}
first = find_first_bit(&mask, f->field_bsize); first = find_first_bit(&mask, f->field_bsize);
next_z = find_next_zero_bit(&mask, f->field_bsize, first); next_z = find_next_zero_bit(&mask, f->field_bsize, first);
@ -2743,9 +2750,10 @@ static int offload_pedit_fields(struct mlx5e_priv *priv,
if (cmd == MLX5_ACTION_TYPE_SET) { if (cmd == MLX5_ACTION_TYPE_SET) {
int start; int start;
field_mask = mask_to_le(f->field_mask, f->field_bsize);
/* if field is bit sized it can start not from first bit */ /* if field is bit sized it can start not from first bit */
start = find_first_bit((unsigned long *)&f->field_mask, start = find_first_bit(&field_mask, f->field_bsize);
f->field_bsize);
MLX5_SET(set_action_in, action, offset, first - start); MLX5_SET(set_action_in, action, offset, first - start);
/* length is num of bits to be written, zero means length of 32 */ /* length is num of bits to be written, zero means length of 32 */